Remove sycldevice target triple from tests

KornevNikita · vmaksimo · commit e052082af3ee · 2021-08-16T10:54:42.000+03:00
This is a patch to update tests in scope of patch intel#3929 that removes sycldevice triple environment component, so this triple should be also removed from tests. Original commit: KhronosGroup/SPIRV-LLVM-Translator@36ee44b
diff --git a/llvm-spirv/test/DebugInfo/RecursiveDebugInfo.ll b/llvm-spirv/test/DebugInfo/RecursiveDebugInfo.ll
@@ -52,7 +52,7 @@
 ; CHECK: [[FNC_TY1]] = !DIDerivedType(tag: DW_TAG_typedef, name: "vec_it", {{.+}}, baseType: [[IT_VEC]])
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" = type { i8 }
 %struct._ZTS8iteratorI6vectorE.iterator = type { i32 addrspace(4)* }
diff --git a/llvm-spirv/test/SpecConstants/bool-spirv-specconstant.ll b/llvm-spirv/test/SpecConstants/bool-spirv-specconstant.ll
@@ -9,7 +9,7 @@
 ; CHECK: Select [[#]] [[#]] [[#BOOL_CONST]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" = type { %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" }
 %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" = type { [1 x i64] }
diff --git a/llvm-spirv/test/SpecConstants/long-spec-const-composite.ll b/llvm-spirv/test/SpecConstants/long-spec-const-composite.ll
@@ -9,7 +9,7 @@
 ; RUN: not llvm-spirv %t.bc -o %t.spv 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-SPIRV: Capability LongConstantCompositeINTEL 
 ; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
diff --git a/llvm-spirv/test/custom_class.ll b/llvm-spirv/test/custom_class.ll
@@ -28,7 +28,7 @@
 
 ; ModuleID = 'custom_class.ll'
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %class._ZTS11CustomClass.CustomClass = type { i32 }
 %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" = type { i8 }
diff --git a/llvm-spirv/test/llvm-intrinsics/abs.ll b/llvm-spirv/test/llvm-intrinsics/abs.ll
@@ -8,7 +8,7 @@
 ; CHECK: ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} s_abs
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 ; Function Attrs: norecurse nounwind readnone
 define dso_local spir_kernel void @test(i32 %a, <4 x i32> %b) local_unnamed_addr #0 !kernel_arg_buffer_location !5 {
diff --git a/llvm-spirv/test/llvm-intrinsics/constrained-arithmetic.ll b/llvm-spirv/test/llvm-intrinsics/constrained-arithmetic.ll
@@ -28,7 +28,7 @@
 ; CHECK: FRem
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 ; Function Attrs: norecurse nounwind strictfp
 define dso_local spir_kernel void @test(float %a, i32 %in, i32 %ui) local_unnamed_addr #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_base_type !7 !kernel_arg_type_qual !8 !kernel_arg_buffer_location !9 {
diff --git a/llvm-spirv/test/llvm-intrinsics/constrained-comparison.ll b/llvm-spirv/test/llvm-intrinsics/constrained-comparison.ll
@@ -19,7 +19,7 @@
 ;CHECK: Unordered
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 ; Function Attrs: norecurse nounwind strictfp
 define dso_local spir_kernel void @test(float %a) local_unnamed_addr #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_base_type !7 !kernel_arg_type_qual !8 !kernel_arg_buffer_location !9 {
diff --git a/llvm-spirv/test/llvm-intrinsics/constrained-convert.ll b/llvm-spirv/test/llvm-intrinsics/constrained-convert.ll
@@ -27,7 +27,7 @@
 ;CHECK: FConvert {{[0-9]+}} [[ft]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 ; Function Attrs: norecurse nounwind strictfp
 define dso_local spir_kernel void @test(float %a, i32 %in, i32 %ui) local_unnamed_addr #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_base_type !7 !kernel_arg_type_qual !8 !kernel_arg_buffer_location !9 {
diff --git a/llvm-spirv/test/llvm-intrinsics/ctpop.ll b/llvm-spirv/test/llvm-intrinsics/ctpop.ll
@@ -11,7 +11,7 @@
 ; CHECK: BitCount {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 ; Function Attrs: norecurse nounwind readnone
 define dso_local spir_kernel void @test(i8 %x8, i16 %x16, i32 %x32, i64 %x64, <2 x i32> %x2i32) local_unnamed_addr #0 !kernel_arg_buffer_location !5 {
diff --git a/llvm-spirv/test/llvm-intrinsics/invariant.ll b/llvm-spirv/test/llvm-intrinsics/invariant.ll
@@ -9,7 +9,7 @@
 
 source_filename = "<stdin>"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 @WGSharedVar = internal addrspace(3) constant i64 0, align 8
 
diff --git a/llvm-spirv/test/long-type-struct.ll b/llvm-spirv/test/long-type-struct.ll
diff --git a/llvm-spirv/test/negative/invalid-constant-generic-cast.ll b/llvm-spirv/test/negative/invalid-constant-generic-cast.ll
@@ -5,7 +5,7 @@
 
 source_filename = "sample.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind writeonly
 define dso_local spir_func void @_Z10kernel_funPi(i32 addrspace(4)* %ptr) {
diff --git a/llvm-spirv/test/negative/invalid-device-local-cast.ll b/llvm-spirv/test/negative/invalid-device-local-cast.ll
@@ -5,7 +5,7 @@
 
 source_filename = "sample.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind writeonly
 define dso_local spir_func void @_Z10kernel_funPi(i32 addrspace(5)* %ptr) {
diff --git a/llvm-spirv/test/negative/invalid-private-global-cast.ll b/llvm-spirv/test/negative/invalid-private-global-cast.ll
@@ -5,7 +5,7 @@
 
 source_filename = "sample.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind writeonly
 define dso_local spir_func void @_Z10kernel_funPi(i32 addrspace(1)* %ptr) {
diff --git a/llvm-spirv/test/negative/unsup_invoke_instr.ll b/llvm-spirv/test/negative/unsup_invoke_instr.ll
@@ -6,7 +6,7 @@
 ; CHECK: InvalidInstruction: Can't translate llvm instruction:
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 $"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE6Kernel" = comdat any
 
diff --git a/llvm-spirv/test/pointer_type_mapping.ll b/llvm-spirv/test/pointer_type_mapping.ll
@@ -10,7 +10,7 @@
 ; ModuleID = 'sycl_test.bc'
 source_filename = "sycl_test.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %struct._ZTS4Args.Args = type { %struct._ZTS6Object.Object addrspace(4)* }
 %struct._ZTS6Object.Object = type { i32 (%struct._ZTS6Object.Object addrspace(4)*, i32)* }
diff --git a/llvm-spirv/test/spec_const_decoration.ll b/llvm-spirv/test/spec_const_decoration.ll
@@ -7,7 +7,7 @@
 
 source_filename = "llvm-link"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" = type { %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" }
 %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" = type { [1 x i64] }
diff --git a/llvm-spirv/test/transcoding/AtomicFAddEXT.ll b/llvm-spirv/test/transcoding/AtomicFAddEXT.ll
@@ -14,7 +14,7 @@
 ; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-SPIRV: Capability AtomicFloat32AddEXT
 ; CHECK-SPIRV: Capability AtomicFloat64AddEXT
diff --git a/llvm-spirv/test/transcoding/AtomicFMaxEXT.ll b/llvm-spirv/test/transcoding/AtomicFMaxEXT.ll
@@ -14,7 +14,7 @@
 ; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-SPIRV: Capability AtomicFloat32MinMaxEXT
 ; CHECK-SPIRV: Capability AtomicFloat64MinMaxEXT
diff --git a/llvm-spirv/test/transcoding/AtomicFMinEXT.ll b/llvm-spirv/test/transcoding/AtomicFMinEXT.ll
@@ -14,7 +14,7 @@
 ; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-SPIRV: Capability AtomicFloat32MinMaxEXT
 ; CHECK-SPIRV: Capability AtomicFloat64MinMaxEXT
diff --git a/llvm-spirv/test/transcoding/BitReversePref.ll b/llvm-spirv/test/transcoding/BitReversePref.ll
@@ -6,7 +6,7 @@
 ;CHECK: FunctionCall [[#]] [[#]] [[#FUNC_NAME]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/DecorationAlignment.ll b/llvm-spirv/test/transcoding/DecorationAlignment.ll
@@ -5,7 +5,7 @@
 ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-SPIRV: Decorate [[ALIGNMENT:[0-9]+]] Alignment 16
 ; CHECk-SPIRV: FunctionParameter {{[0-9]+}} [[ALIGNMENT]]
diff --git a/llvm-spirv/test/transcoding/ForwardPtr.ll b/llvm-spirv/test/transcoding/ForwardPtr.ll
@@ -16,7 +16,7 @@
 ; CHECK-LLVM: %structArgSec = type { %class.A addrspace(4)* }
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %struct.FuncArg = type { %class.A addrspace(4)* }
 %class.A = type { %class.ArgFirst, %structArgSec }
diff --git a/llvm-spirv/test/transcoding/GlobalFunAnnotate.ll b/llvm-spirv/test/transcoding/GlobalFunAnnotate.ll
@@ -10,7 +10,7 @@
 ;CHECK-LLVM: @llvm.global.annotations = appending global [1 x { i8*, i8*, i8*, i32, i8* }] [{ i8*, i8*, i8*, i32, i8* } { i8* bitcast (void ()* @foo to i8*), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @0, i32 0, i32 0), i8* undef, i32 undef, i8* undef }], section "llvm.metadata"
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 @.str = private unnamed_addr constant [23 x i8] c"annotation_on_function\00", section "llvm.metadata"
 @.str.1 = private unnamed_addr constant [6 x i8] c"an.cl\00", section "llvm.metadata"
diff --git a/llvm-spirv/test/transcoding/InfiniteLoopMetadataPlacement.ll b/llvm-spirv/test/transcoding/InfiniteLoopMetadataPlacement.ll
@@ -8,7 +8,7 @@
 ; ModuleID = 'llvm_loop_test.cpp'
 source_filename = "llvm_loop_test.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 $_ZTS12WhileOneTest = comdat any
 
diff --git a/llvm-spirv/test/transcoding/IntelFPGAFunctionAttributes.ll b/llvm-spirv/test/transcoding/IntelFPGAFunctionAttributes.ll
@@ -77,7 +77,7 @@
 ; ModuleID = 'kernel-attrs.cpp'
 source_filename = "kernel-attrs.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %class._ZTS3Foo.Foo = type { i8 }
 %"class._ZTSZ3barvE3$_0.anon" = type { i8 }
diff --git a/llvm-spirv/test/transcoding/IntelFPGAMemoryAccesses.ll b/llvm-spirv/test/transcoding/IntelFPGAMemoryAccesses.ll
@@ -60,7 +60,7 @@
 ; CHECK-SPIRV: Decorate {{[0-9]+}} PrefetchINTEL 0
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 %struct._ZTS5State.State = type { float, i32 }
diff --git a/llvm-spirv/test/transcoding/IntelFPGAReg.ll b/llvm-spirv/test/transcoding/IntelFPGAReg.ll
@@ -88,7 +88,7 @@
 ; CHECK-LLVM-DAG: @[[STR14:[0-9]+]] = {{.*}}__builtin_intel_fpga_reg
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %struct._ZTS2st.st = type { i32, float }
 %union._ZTS2un.un = type { i32 }
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGAIVDepLoopAttr.ll b/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGAIVDepLoopAttr.ll
@@ -84,7 +84,7 @@
 ; RUN: FileCheck < %t.rev.ll %s --check-prefixes=CHECK-LLVM,CHECK-LLVM-MD-OP2
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGAIVDepLoopAttrOnClosure.ll b/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGAIVDepLoopAttrOnClosure.ll
@@ -79,7 +79,7 @@
 ; CHECK-SPIRV: TypePointer [[TYPE_SFLN_INT_PTR:[0-9]+]] {{[0-9]+}} [[TYPE_INT_PTR]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %struct._ZTS15__wrapper_class.__wrapper_class = type { [10 x i32] }
 %struct._ZTS15__wrapper_class.__wrapper_class.0 = type { [10 x i32] }
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll b/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll
@@ -114,7 +114,7 @@
 ; ModuleID = 'FPGALoopMergeInst.cpp'
 source_filename = "FPGALoopMergeInst.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll b/llvm-spirv/test/transcoding/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll
@@ -34,7 +34,7 @@
 ; ModuleID = 'intel-fpga-loops.cpp'
 source_filename = "intel-fpga-loops.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %class.anon = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll b/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll
@@ -15,7 +15,7 @@
 ; ModuleID = 'optimized_intel_restrict.bc'
 source_filename = "intel_restrict.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr {
 entry:
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll b/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll
@@ -68,7 +68,7 @@
 ; ModuleID = 'optimized_intel_restrict.bc'
 source_filename = "intel_restrict.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll b/llvm-spirv/test/transcoding/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll
@@ -72,7 +72,7 @@
 ; ModuleID = 'optimized_intel_restrict.bc'
 source_filename = "intel_restrict.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
diff --git a/llvm-spirv/test/transcoding/SPV_INTEL_variable_length_array/vla_spec_const.ll b/llvm-spirv/test/transcoding/SPV_INTEL_variable_length_array/vla_spec_const.ll
@@ -57,7 +57,7 @@
 ; CHECK-SPIRV: ReturnValue [[#SPEC_CONST]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" = type { %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" }
 %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" = type { i8 }
diff --git a/llvm-spirv/test/transcoding/SpecConstantComposite.ll b/llvm-spirv/test/transcoding/SpecConstantComposite.ll
@@ -23,7 +23,7 @@
 
 source_filename = "./SpecConstantComposite.ll"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %struct._ZTS3POD.POD = type { [2 x %struct._ZTS1A.A], %"class._ZTSN2cl4sycl3vecIiLi2EEE.cl::sycl::vec" }
 %struct._ZTS1A.A = type { i32, float }
diff --git a/llvm-spirv/test/transcoding/annotation_dbg_info_drop.ll b/llvm-spirv/test/transcoding/annotation_dbg_info_drop.ll
@@ -14,7 +14,7 @@
 ; ModuleID = 'annotation_dbg_info_drop.cpp'
 source_filename = "annotation_dbg_info_drop.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" = type { i64 }
 %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_d.s_d" = type { [8 x i32] }
diff --git a/llvm-spirv/test/transcoding/builtin_vars_arithmetics.ll b/llvm-spirv/test/transcoding/builtin_vars_arithmetics.ll
@@ -75,7 +75,7 @@
 ; CHECK-LLVM  %21 = sub <3 x i64> %[[GlobSizeVec]], %[[GOffSetVec]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSN2cl4sycl5rangeILi2EEE.cl::sycl::range" = type { %"class._ZTSN2cl4sycl6detail5arrayILi2EEE.cl::sycl::detail::array" }
 %"class._ZTSN2cl4sycl6detail5arrayILi2EEE.cl::sycl::detail::array" = type { [2 x i64] }
diff --git a/llvm-spirv/test/transcoding/builtin_vars_opt.ll b/llvm-spirv/test/transcoding/builtin_vars_opt.ll
@@ -55,7 +55,7 @@
 ; CHECK-LLVM-SPV: call spir_func i32 @_Z30__spirv_BuiltInSubgroupMaxSizev()
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" = type { %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" }
 %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" = type { [1 x i64] }
diff --git a/llvm-spirv/test/transcoding/capability-arbitrary-precision-fixed-point-numbers.ll b/llvm-spirv/test/transcoding/capability-arbitrary-precision-fixed-point-numbers.ll
@@ -179,7 +179,7 @@
 ; ModuleID = 'ap_fixed.cpp'
 source_filename = "ap_fixed.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/capability-arbitrary-precision-floating-point.ll b/llvm-spirv/test/transcoding/capability-arbitrary-precision-floating-point.ll
@@ -469,7 +469,7 @@
 ; CHECK-SPIRV: 2 TypeBool [[Ty_Bool:[0-9]+]]
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-linux-sycldevice"
+target triple = "spir64-unknown-linux"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/intel_fpga_lsu_optimized.ll b/llvm-spirv/test/transcoding/intel_fpga_lsu_optimized.ll
@@ -57,7 +57,7 @@
 ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" = type { %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" }
 %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" = type { [1 x i64] }
diff --git a/llvm-spirv/test/transcoding/intel_usm_addrspaces.ll b/llvm-spirv/test/transcoding/intel_usm_addrspaces.ll
@@ -32,7 +32,7 @@
 ; ModuleID = 'intel_usm_addrspaces.cpp'
 source_filename = "intel_usm_addrspaces.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 %"class._ZTSZ4mainE3$_0.anon" = type { i8 }
 
diff --git a/llvm-spirv/test/transcoding/readonly.ll b/llvm-spirv/test/transcoding/readonly.ll
@@ -10,7 +10,7 @@
 ; ModuleID = 'readonly.bc'
 source_filename = "readonly.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spir64-unknown-unknown-sycldevice"
+target triple = "spir64-unknown-unknown"
 
 ; CHECK-LLVM: spir_kernel void @_ZTSZ4mainE15kernel_function(i32 addrspace(1)* readonly %{{.*}})
 ; Function Attrs: norecurse nounwind readonly willreturn
diff --git a/llvm-spirv/test/transcoding/sycl_array_zero_init.ll b/llvm-spirv/test/transcoding/sycl_array_zero_init.ll
