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Merged
merged 10 commits into from
May 23, 2025

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@cascade812 cascade812 commented May 9, 2025

This PR adds torch async tp using compilation pass.
It requires below config to run

config = CompilationConfig(
    level=3,
    compile_sizes=[4, 8, 16],
    splitting_ops=[],
)
config.pass_config.enable_async_tp= True

llm = LLM(model="llama/Llama-3.2-1B-Instruct",
          enforce_eager=False,
          tensor_parallel_size=2,
          dtype=torch.float16,
          compilation_config=config)

If use vllm serve, add -O '{"level":3, "compile_sizes": [4, 8, 16], "pass_config": {"enable_async_tp": true}}'

Some benchmark results on 2 GPUs of A100.

model = unsloth/Meta-Llama-3.1-8B-Instruct
tp_size = 2
batch_size = 1
input_len=2048
output_len=1

Latency is slightly higher when enable async tp with input len is 2048.

python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 2048 --batch-size 1 --tensor-parallel-size 2 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [2048], "pass_config": {"enable_async_tp": true}}' --no-enable-prefix-caching
Avg latency: 0.19084931214650472 seconds
10% percentile latency: 0.18976202309131623 seconds
25% percentile latency: 0.1900753453373909 seconds
50% percentile latency: 0.1905977502465248 seconds
75% percentile latency: 0.19149887561798096 seconds
90% percentile latency: 0.19235587865114212 seconds
99% percentile latency: 0.19316918954253195 seconds
python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 2048 --batch-size 1 --tensor-parallel-size 2 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [2048], "pass_config": {"enable_async_tp": false}}' --no-enable-prefix-caching &> benchmark.log

Avg latency: 0.18629603137572606 seconds
10% percentile latency: 0.18520110249519348 seconds
25% percentile latency: 0.18542765080928802 seconds
50% percentile latency: 0.18612460047006607 seconds
75% percentile latency: 0.1871374361217022 seconds
90% percentile latency: 0.18730796426534652 seconds
99% percentile latency: 0.18765324756503104 seconds

Latency is almost the same when enable async tp with input len is 8192.

python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 2 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192], "pass_config": {"enable_async_tp": true}}' --no-enable-prefix-caching &> benchmark.log
Avg latency: 0.7484328990181287 seconds
10% percentile latency: 0.7470755681395531 seconds
25% percentile latency: 0.7476142570376396 seconds
50% percentile latency: 0.7484151422977448 seconds
75% percentile latency: 0.7493306994438171 seconds
90% percentile latency: 0.749718876183033 seconds
99% percentile latency: 0.7499414524435997 seconds
python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 2 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192], "pass_config": {"enable_async_tp": false}}' --no-enable-prefix-caching

Avg latency: 0.761994085709254 seconds
10% percentile latency: 0.7605385079979896 seconds
25% percentile latency: 0.7606241554021835 seconds
50% percentile latency: 0.7613658607006073 seconds
75% percentile latency: 0.7634274959564209 seconds
90% percentile latency: 0.7639447942376136 seconds
99% percentile latency: 0.7645426994562149 seconds

I think we can test this feature on a more demanding workload, like a 70B model across 4 GPUs.

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This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @cascade812.

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@mergify mergify bot added the needs-rebase label May 9, 2025
@cascade812 cascade812 changed the title Add torch async tensor parallelism using compilation pass Add async tensor parallelism using compilation pass May 9, 2025
@cascade812 cascade812 changed the title Add async tensor parallelism using compilation pass [Feature]Add async tensor parallelism using compilation pass May 10, 2025
Signed-off-by: cascade812 <cascade812@outlook.com>
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This is what I'm seeing on a 4xH200 system:

vLLM main:

python benchmarks/benchmark_latency.py --model meta-llama/Llama-3.1-70B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 4 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192]}' --no-enable-prefix-caching

Avg latency: 0.5901695430278778 seconds
10% percentile latency: 0.5880581809207797 seconds
25% percentile latency: 0.5890177926048636 seconds
50% percentile latency: 0.5897573744878173 seconds
75% percentile latency: 0.5918027735315263 seconds
90% percentile latency: 0.5927275052294135 seconds
99% percentile latency: 0.5936225369013846 seconds

This PR:

python benchmarks/benchmark_latency.py --model meta-llama/Llama-3.1-70B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 4 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192], "pass_config": {"enable_async_tp": true, "enable_sequence_parallelism": true}}' --no-enable-prefix-caching

Avg latency: 0.5260226292535662 seconds
10% percentile latency: 0.5204391019418836 seconds
25% percentile latency: 0.5236838199198246 seconds
50% percentile latency: 0.5270518623292446 seconds
75% percentile latency: 0.5288312714546919 seconds
90% percentile latency: 0.5301465425640345 seconds
99% percentile latency: 0.5310012844949961 seconds

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cascade812 commented May 13, 2025

It also shows ~10% latency reduce on 4 X A100 (40GB) for 8B LLM.

python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 4 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192]' --no-enable-prefix-caching

Avg latency: 0.19637128477916121 seconds
10% percentile latency: 0.19597571501508354 seconds
25% percentile latency: 0.19614936946891248 seconds
50% percentile latency: 0.1963466382585466 seconds
75% percentile latency: 0.19650844135321677 seconds
90% percentile latency: 0.19685424230992793 seconds
99% percentile latency: 0.19704130258411168 seconds

With async tp enabled

python benchmarks/benchmark_latency.py --model unsloth/Meta-Llama-3.1-8B-Instruct --output-len 1 --input-len 8192 --batch-size 1 --tensor-parallel-size 4 --load-format dummy --num_iters_warmup 5 --num_iters 15 -O '{"level":3, "compile_sizes": [8192], "pass_config": {"enable_async_tp": true, "enable_sequence_parallelism": true}}' --no-enable-prefix-caching

Avg latency: 0.17523012173672517 seconds
10% percentile latency: 0.17482020873576404 seconds
25% percentile latency: 0.17494881455786526 seconds
50% percentile latency: 0.1752709816209972 seconds
75% percentile latency: 0.1755139627493918 seconds
90% percentile latency: 0.1756236758083105 seconds
99% percentile latency: 0.17574628297239542 seconds

Signed-off-by: cascade812 <cascade812@outlook.com>
Signed-off-by: cascade812 <cascade812@outlook.com>
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Hi! Is it necessary to always set sequence_parallelism to true?

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Great PR! Concise and effective. I only had a few cleanup comments.

@cascade812
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Hi! Is it necessary to always set sequence_parallelism to true?

No need. sequence parallelism is enabled by default if enable_async_tp is true.

Signed-off-by: cascade812 <cascade812@outlook.com>
Signed-off-by: cascade812 <cascade812@outlook.com>
Signed-off-by: cascade812 <cascade812@outlook.com>
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This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @cascade812.

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Signed-off-by: cascade812 <cascade812@outlook.com>
@mergify mergify bot removed the needs-rebase label May 17, 2025
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Very nice work

@tlrmchlsmth tlrmchlsmth added the ready ONLY add when PR is ready to merge/full CI is needed label May 18, 2025
Signed-off-by: cascade812 <cascade812@outlook.com>
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Can you merge from main to fix the CI failures?

Signed-off-by: cascade812 <cascade812@outlook.com>
@DarkLight1337 DarkLight1337 enabled auto-merge (squash) May 23, 2025 03:50
@vllm-bot vllm-bot merged commit 71ea614 into vllm-project:main May 23, 2025
92 of 94 checks passed
@cascade812 cascade812 deleted the asynctp branch May 23, 2025 16:56
zzzyq pushed a commit to zzzyq/vllm that referenced this pull request May 24, 2025
…oject#17882)

Signed-off-by: cascade812 <cascade812@outlook.com>
Signed-off-by: Yuqi Zhang <yuqizhang@google.com>
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Hi, didn't it work with Qwen3-MoE series? I'm so confused about why all the all_reduce ops did not split into reduce_scatter and all_gather on latest main. @cascade812

gshtras added a commit to ROCm/vllm that referenced this pull request May 27, 2025
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Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>

* [Neuron] Remove bypass on EAGLEConfig and add a test (vllm-project#18514)

Signed-off-by: Elaine Zhao <elaineyz@amazon.com>

* [Bugfix][Benchmarks] Fix a benchmark of deepspeed-mii backend to use api_key (vllm-project#17291)

Signed-off-by: Teruaki Ishizaki <teruaki.ishizaki@ntt.com>

* [Misc] Replace `cuda` hard code with `current_platform` (vllm-project#16983)

Signed-off-by: shen-shanshan <467638484@qq.com>

* [Hardware] correct method signatures for HPU,ROCm,XPU (vllm-project#18551)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [V1] [Bugfix] eagle bugfix and enable correct lm_head for multimodal (vllm-project#18034)

Signed-off-by: Ronald Xu <ronaldxu@amazon.com>

* [Feature]Add async tensor parallelism using compilation pass (vllm-project#17882)

Signed-off-by: cascade812 <cascade812@outlook.com>

* [Doc] Update quickstart and install for cu128 using `--torch-backend=auto` (vllm-project#18505)

Signed-off-by: mgoin <mgoin64@gmail.com>

* [Feature][V1]: suupports cached_tokens in response usage (vllm-project#18149)

Co-authored-by: simon-mo <xmo@berkeley.edu>

* [Bugfix] Add half type support in reshape_and_cache_cpu_impl on x86 cpu platform (vllm-project#18430)

Signed-off-by: Yuqi Zhang <yuqizhang@google.com>
Co-authored-by: Yuqi Zhang <yuqizhang@google.com>

* Migrate docs from Sphinx to MkDocs (vllm-project#18145)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* Revert "[V1] [Bugfix] eagle bugfix and enable correct lm_head for multimodal (vllm-project#18034)" (vllm-project#18600)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Bugfix][Model] Fix baichuan model loader for tp (vllm-project#18597)

Signed-off-by: Mengqing Cao <cmq0113@163.com>

* [V0][Bugfix] Fix parallel sampling performance regression when guided decoding is enabled (vllm-project#17731)

Signed-off-by: Madeesh Kannan <shadeMe@users.noreply.github.com>
Co-authored-by: Russell Bryant <rbryant@redhat.com>

* Add myself as docs code owner (vllm-project#18605)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [Hardware][CPU] Update intel_extension_for_pytorch 2.7.0 and move to `requirements/cpu.txt`  (vllm-project#18542)

Signed-off-by: Kay Yan <kay.yan@daocloud.io>

* [CI] fix kv_cache_type argument (vllm-project#18594)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [Doc] Fix indent of contributing to vllm (vllm-project#18611)

Signed-off-by: Zerohertz <ohg3417@gmail.com>

* Replace `{func}` with mkdocs style links (vllm-project#18610)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [CI/Build] Fix V1 flag being set in entrypoints tests (vllm-project#18598)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* Fix examples with code blocks in docs (vllm-project#18609)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [Bugfix] Fix transformers model impl ignored for mixtral quant (vllm-project#18602)

Signed-off-by: Tristan Leclercq <tristanleclercq@gmail.com>

* Include private attributes in API documentation (vllm-project#18614)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [Misc] add Haystack integration (vllm-project#18601)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [Bugfix][Build/CI] Fixup CUDA compiler version check for CUDA_SUPPORTED_ARCHS (vllm-project#18579)

* [Doc] Fix markdown list indentation for MkDocs rendering (vllm-project#18620)

Signed-off-by: Zerohertz <ohg3417@gmail.com>

* [Doc] Use a different color for the announcement (vllm-project#18616)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* Refactor pplx init logic to make it modular (prepare for deepep) (vllm-project#18200)

Signed-off-by: youkaichao <youkaichao@gmail.com>

* Fix figures in design doc (vllm-project#18612)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [Docs] Change mkdocs to not use directory urls (vllm-project#18622)

Signed-off-by: mgoin <mgoin64@gmail.com>

* [v1] Redo "Support multiple KV cache groups in GPU model runner (vllm-project#17945)" (vllm-project#18593)

Signed-off-by: Chen Zhang <zhangch99@outlook.com>

* [Doc] fix list formatting (vllm-project#18624)

Signed-off-by: David Xia <david@davidxia.com>

* [Doc] Fix top-level API links/docs (vllm-project#18621)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Avoid documenting dynamic / internal modules (vllm-project#18626)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Fix broken links and unlinked docs, add shortcuts to home sidebar (vllm-project#18627)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [V1] Support Deepseek MTP (vllm-project#18435)

Signed-off-by: Rui Qiao <ruisearch42@gmail.com>
Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>
Co-authored-by: Rui Qiao <ruisearch42@gmail.com>

* Use prebuilt FlashInfer x86_64 PyTorch 2.7 CUDA 12.8 wheel for CI (vllm-project#18537)

Signed-off-by: Huy Do <huydhn@gmail.com>

* [CI] Enable test_initialization to run on V1 (vllm-project#16736)

Signed-off-by: mgoin <mgoin64@gmail.com>

* [Doc] Update references to doc files (vllm-project#18637)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [ModelOpt] Introduce VLLM_MAX_TOKENS_PER_EXPERT_FP4_MOE env var to control blockscale tensor allocation (vllm-project#18160)

Signed-off-by: Pavani Majety <pmajety@nvidia.com>

* [Bugfix] Migrate to REGEX Library to prevent catastrophic backtracking (vllm-project#18454)

Signed-off-by: Crucifixion-Fxl <xmufxl@gmail.com>
Co-authored-by: Crucifixion-Fxl <xmufxl@gmail.com>

* [Bugfix][Nixl] Fix Preemption Bug (vllm-project#18631)

Signed-off-by: rshaw@neuralmagic.com <robertgshaw2@gmail.com>

* config.py: Clarify that only local GGUF checkpoints are supported. (vllm-project#18623)

Signed-off-by: Mathieu Bordere <mathieu@letmetweakit.com>

* FIX MOE issue in AutoRound format (vllm-project#18586)

Signed-off-by: wenhuach21 <wenhua.cheng@intel.com>

* [V1][Spec Decode] Small refactors to improve eagle bookkeeping performance (vllm-project#18424)

Signed-off-by: qizixi <qizixi@meta.com>

* [Frontend] improve vllm serve --help display (vllm-project#18643)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [Model] Add support for Qwen2.5-Omni-7B-AWQ (Qwen2_5OmniForConditionalGeneration) (vllm-project#18647)

* [V1][Spec Decode] Support multi-layer eagle draft model (vllm-project#18030)

Signed-off-by: qizixi <qizixi@meta.com>

* [Doc] Update README links, mark external links (vllm-project#18635)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [MISC][pre-commit] Add pre-commit check for triton import (vllm-project#17716)

Signed-off-by: Mengqing Cao <cmq0113@163.com>

* [Doc] Fix indentation problems in V0 Paged Attention docs (vllm-project#18659)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Add community links (vllm-project#18657)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Model] use AutoWeightsLoader for gpt2 (vllm-project#18625)

Signed-off-by: zt2370 <ztang2370@gmail.com>

* [Doc] Reorganize user guide (vllm-project#18661)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [CI/Build] `chmod +x` to `cleanup_pr_body.sh` (vllm-project#18650)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [MISC] typo fix and clean import (vllm-project#18664)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [BugFix] Fix import error for fused_moe (vllm-project#18642)

Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>

* [CI] enforce import regex instead of re (vllm-project#18665)

Signed-off-by: Aaron Pham <contact@aarnphm.xyz>

* fix(regression): clone from reference items (vllm-project#18662)

Signed-off-by: Aaron Pham <contact@aarnphm.xyz>

* [CI/Build] fix permission denied issue (vllm-project#18645)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [BugFix][Spec Decode] Improve Prefix Caching Logic in Speculative Decoding (vllm-project#18668)

Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>

* [V1] Fix _pickle.PicklingError: Can't pickle <class 'transformers_modules.deepseek-ai.DeepSeek-V2-Lite... (vllm-project#18640)

Signed-off-by: Seiji Eicher <seiji@anyscale.com>

* [MISC] correct signature for LoaderFunction (vllm-project#18670)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [Misc]Replace `cuda` hard code with `current_platform` in Ray (vllm-project#14668)

Signed-off-by: noemotiovon <757486878@qq.com>

* [Misc][ModelScope] Change to use runtime VLLM_USE_MODELSCOPE (vllm-project#18655)

Signed-off-by: Mengqing Cao <cmq0113@163.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>

* [VLM] Initialize video input support for InternVL models (vllm-project#18499)

Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>

* Speed up the `kernels/quantization/` tests (vllm-project#18669)

Signed-off-by: mgoin <mgoin64@gmail.com>

* [BUGFIX] catch subclass first for try...except (vllm-project#18672)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [Misc] Reduce logs on startup (vllm-project#18649)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [doc] fix broken links (vllm-project#18671)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [doc] improve readability (vllm-project#18675)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [Bugfix] Fix cpu usage and cache hit stats reporting on cpu environment (vllm-project#18674)

Signed-off-by: zzzyq <zhangyuqi94@gmail.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>

* [CI/build] fix no regex (vllm-project#18676)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [Misc] small improve (vllm-project#18680)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [Bugfix] Fix profiling dummy data for Pixtral (vllm-project#18677)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Core][Multimodal] Convert PIL Image to array without data copy when hashing (vllm-project#18682)

Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>

* [CI/Build][Doc] Update `gte-Qwen2-1.5B-instruct` usage (vllm-project#18683)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>

* [Misc] Fixed the abnormally high TTFT issue in the PD disaggregation example (vllm-project#18644)

Signed-off-by: zhaohaidao <zhaohaidao2008@hotmail.com>
Signed-off-by: zhaohaiyuan <zhaohaiyuan@xiaohongshu.com>
Co-authored-by: zhaohaiyuan <zhaohaiyuan@xiaohongshu.com>

* refactor: simplify request handler, use positive condition check for handler assignment (vllm-project#18690)

Signed-off-by: googs1025 <googs1025@gmail.com>

* [Bugfix] Fix the lm_head in gpt_bigcode in lora mode (vllm-project#6357)

Signed-off-by: Max de Bayser <mbayser@br.ibm.com>
Signed-off-by: Max de Bayser <maxdebayser@gmail.com>

* [CI] add missing argument (vllm-project#18694)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [GH] Add issue template for reporting CI failures (vllm-project#18696)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Fix issue template format (vllm-project#18699)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Bugfix] Fix Mistral-format models with sliding window (vllm-project#18693)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [CI/Build] Replace `math.isclose` with `pytest.approx` (vllm-project#18703)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [CI] fix dump_input for str type (vllm-project#18697)

Signed-off-by: Andy Xie <andy.xning@gmail.com>

* [Model] Add support for YARN in NemotronNAS models (vllm-project#18427)

Signed-off-by: Nave Assaf <nassaf@nvidia.com>

* [CI/Build] Split pooling and generation extended language models tests in CI (vllm-project#18705)

Signed-off-by: Isotr0py <2037008807@qq.com>

* [Hardware][Intel-Gaudi] [CI/Build] Add tensor parallel size = 2 test to HPU CI (vllm-project#18709)

Signed-off-by: Lukasz Durejko <ldurejko@habana.ai>

* [Misc] add AutoGen integration (vllm-project#18712)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>

* [Bugfix]: handle hf-xet CAS error when loading Qwen3 weights in vLLM (vllm-project#18701)

* [Doc] Improve API docs (vllm-project#18713)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Move examples and further reorganize user guide (vllm-project#18666)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Bugfix] Fix Llama GGUF initialization (vllm-project#18717)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [V1][Sampler] Improve performance of FlashInfer sampling by sampling logits instead of probs (vllm-project#18608)

* Convert `examples` to `ruff-format` (vllm-project#18400)

Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>

* [Model][Gemma3] Simplify image input validation (vllm-project#18710)

Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>

* [Misc] improve web section group title display (vllm-project#18684)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* [V1][Quantization] Add CUDA graph compatible v1 GGUF support (vllm-project#18646)

Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Isotr0py <2037008807@qq.com>

* [Model][Gemma3] Cast image pixel values already on CPU (vllm-project#18732)

Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>

* [FEAT] [ROCm] Upgrade AITER Fused MoE kernels. (vllm-project#18271)

Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>

* [Doc] Update OOT model docs (vllm-project#18742)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Doc] Update reproducibility doc and example (vllm-project#18741)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Misc] improve docs (vllm-project#18734)

Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>

* feat(rocm-support): support mamba2 on rocm (vllm-project#18565)

Signed-off-by: Islam Almersawi <islam.almersawi@openinnovation.ai>
Co-authored-by: Islam Almersawi <islam.almersawi@openinnovation.ai>

* [Hardware][Intel-Gaudi] [CI/Build] Fix multiple containers using the same name in run-hpu-test.sh (vllm-project#18752)

Signed-off-by: Lukasz Durejko <ldurejko@habana.ai>

* [Doc] cleanup deprecated flag for doc (vllm-project#18715)

Signed-off-by: calvin chen <120380290@qq.com>

* Minor fix about MooncakeStoreConnector (vllm-project#18721)

Signed-off-by: baoloongmao <baoloongmao@tencent.com>

* [Build] fix cpu build missing libtbbmalloc.so (vllm-project#18744)

Signed-off-by: Kebe <mail@kebe7jun.com>

* [BUG FIX] minicpm (vllm-project#18739)

Signed-off-by: huangyuxiang03 <huangyx0321@gmail.com>
Co-authored-by: huangyuxiang03 <huangyx0321@gmail.com>

* [Doc]  Convert Sphinx directives ( `{class}`, `{meth}`, `{attr}`, ...) to MkDocs format for better documentation linking (vllm-project#18663)

Signed-off-by: Zerohertz <ohg3417@gmail.com>

* [CI/Build] Remove imports of built-in `re` (vllm-project#18750)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [V1][Metrics] Add API for accessing in-memory Prometheus metrics (vllm-project#17010)

Signed-off-by: Mark McLoughlin <markmc@redhat.com>

* Disable prefix cache by default for benchmark (vllm-project#18639)

Signed-off-by: cascade812 <cascade812@outlook.com>

* optimize get_kv_cache_torch_dtype (vllm-project#18531)

Signed-off-by: idellzheng <idellzheng@tencent.com>

* [Core] Automatically cast multi-modal input dtype (vllm-project#18756)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

* [Bugfix] Mistral tool calling when content is list (vllm-project#18729)

Signed-off-by: mgoin <mgoin64@gmail.com>

---------

Signed-off-by: Satyajith Chilappagari <satchill@amazon.com>
Signed-off-by: Lucia Fang <fanglu@fb.com>
Signed-off-by: Liangfu Chen <liangfc@amazon.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: Nan2018 <nan@protopia.ai>
Signed-off-by: rand-fly <randfly@outlook.com>
Signed-off-by: reidliu41 <reid201711@gmail.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: 汪志鹏 <wangzhipeng628@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: calvin chen <120380290@qq.com>
Signed-off-by: haochengxia <xhc_1007@163.com>
Signed-off-by: Dilip Gowda Bhagavan <dilip.bhagavan@ibm.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
Signed-off-by: nicklucche <nlucches@redhat.com>
Signed-off-by: Kebe <mail@kebe7jun.com>
Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
Signed-off-by: rabi <ramishra@redhat.com>
Signed-off-by: dhia.rhaiem <dhia.rhaiem@tii.ae>
Signed-off-by: giantcroc <1204449533@qq.com>
Signed-off-by: Hosang Yoon <hosang.yoon@amd.com>
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Signed-off-by: Sebastian Schönnenbeck <sebastian.schoennenbeck@comma-soft.com>
Signed-off-by: Andy Xie <andy.xning@gmail.com>
Signed-off-by: Russell Bryant <rbryant@redhat.com>
Signed-off-by: jaycha <jaycha@ncsoft.com>
Signed-off-by: Nick Hill <nhill@redhat.com>
Signed-off-by: Shane A <shanea@allenai.org>
Signed-off-by: Elaine Zhao <elaineyz@amazon.com>
Signed-off-by: Linkun <github@lkchen.net>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: googs1025 <googs1025@gmail.com>
Signed-off-by: Bowen Wang <abmfy@icloud.com>
Signed-off-by: jiang.li <jiang1.li@intel.com>
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
Signed-off-by: David Xia <david@davidxia.com>
Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
Signed-off-by: Mengqing Cao <cmq0113@163.com>
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Tyler Michael Smith <tysmith@redhat.com>
Signed-off-by: Kai Wu <kaiwu@meta.com>
Signed-off-by: Sanger Steel <sangersteel@gmail.com>
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
Signed-off-by: Chenheli Hua <huachenheli@outlook.com>
Signed-off-by: Linkun Chen <github@lkchen.net>
Signed-off-by: Benjamin Chislett <benjamin.chislett@centml.ai>
Signed-off-by: Teruaki Ishizaki <teruaki.ishizaki@ntt.com>
Signed-off-by: shen-shanshan <467638484@qq.com>
Signed-off-by: Ronald Xu <ronaldxu@amazon.com>
Signed-off-by: cascade812 <cascade812@outlook.com>
Signed-off-by: Yuqi Zhang <yuqizhang@google.com>
Signed-off-by: Madeesh Kannan <shadeMe@users.noreply.github.com>
Signed-off-by: Kay Yan <kay.yan@daocloud.io>
Signed-off-by: Zerohertz <ohg3417@gmail.com>
Signed-off-by: Tristan Leclercq <tristanleclercq@gmail.com>
Signed-off-by: youkaichao <youkaichao@gmail.com>
Signed-off-by: Chen Zhang <zhangch99@outlook.com>
Signed-off-by: Rui Qiao <ruisearch42@gmail.com>
Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>
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@cascade812
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Hi, didn't it work with Qwen3-MoE series? I'm so confused about why all the all_reduce ops did not split into reduce_scatter and all_gather on latest main. @cascade812

@Juelianqvq I test Qwen/Qwen3-30B-A3B and it works properly. Which specific model are you having issues with? I'll take a look.

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Juelianqvq commented May 28, 2025

@Juelianqvq I test Qwen/Qwen3-30B-A3B and it works properly. Which specific model are you having issues with? I'll take a look.

@cascade812 Mine is Qwen/Qwen3-30B-A3B too. And here is my computation graph around embedding + allreduce + rmsnorm.
截图 2025-05-28 09-39-12

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@Juelianqvq I test Qwen/Qwen3-30B-A3B and it works properly. Which specific model are you having issues with? I'll take a look.

@cascade812 Mine is Qwen/Qwen3-30B-A3B too. And here is my computational graph around embedding + allreduce + rmsnorm. 截图 2025-05-28 09-39-12

This is the computation graph for symbolic shape which sequence parallelism is not enabled for because symbolic shape can't be split. Currently AsyncTP and SP are enabled for specific shapes only.

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This is the computation graph for symbolic shape which sequence parallelism is not enabled for because symbolic shape can't be split. Currently AsyncTP and SP are enabled for specific shapes only.

That's clear. Thanks for your warm explanation!

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