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  • https://www.chipwaretechnologies.com/
  • Bengaluru,India
  • 06:32 (UTC +05:30)
  • X @VijayanKris

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vijayank88/README.md
  • 👋 Hi, I’m @vijayank88
  • 👀 I’m interested in ... HDL coding, Front end flow, Back end flow
  • 🌱 I’m currently learning ... HDL colding
  • 💞️ I’m looking to collaborate on ...
  • 📫 How to reach me ...

Popular repositories Loading

  1. OpenROAD-flow-scripts OpenROAD-flow-scripts Public

    Forked from The-OpenROAD-Project/OpenROAD-flow-scripts

    Verilog 2 1

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  3. OpenROAD OpenROAD Public

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    OpenROAD's unified application implementing an RTL-to-GDS Flow

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  4. Verilog_RTL Verilog_RTL Public

    Forked from VenuPabbuleti/100-Days-RTL-using-Verilog

    RTL Design using Verilog Hardware Description Language

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  5. vijayank88 vijayank88 Public

    Config files for my GitHub profile.

  6. OpenRAM OpenRAM Public

    Forked from VLSIDA/OpenRAM

    An open-source static random access memory (SRAM) compiler.

    Python