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bors[bot]vext01
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93: Fix instruction index bugs. r=ltratt a=vext01 Co-authored-by: Edd Barrett <vext01@gmail.com>
2 parents 31f721a + a9e6c21 commit ca1842c

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llvm/lib/YkIR/YkIRWriter.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@ class YkIRWriter {
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}
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void serialiseAllocaInst(AllocaInst *I, ValueLoweringMap &VLMap,
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unsigned BBIdx, unsigned InstIdx) {
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unsigned BBIdx, unsigned &InstIdx) {
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// type_index:
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OutStreamer.emitSizeT(typeIndex(I->getType()));
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// opcode:
@@ -265,7 +265,7 @@ class YkIRWriter {
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}
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void serialiseCallInst(CallInst *I, ValueLoweringMap &VLMap, unsigned BBIdx,
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unsigned InstIdx) {
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unsigned &InstIdx) {
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// type_index:
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OutStreamer.emitSizeT(typeIndex(I->getType()));
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// opcode:
@@ -289,7 +289,7 @@ class YkIRWriter {
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}
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void serialiseBranchInst(BranchInst *I, ValueLoweringMap &VLMap,
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unsigned BBIdx, unsigned InstIdx) {
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unsigned BBIdx, unsigned &InstIdx) {
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// We split LLVM's `br` into two Yk IR instructions: one for unconditional
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// branching, another for conidtional branching.
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if (!I->isConditional()) {

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