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Fix arm post init
1 parent 5b3a9e1 commit cddc9cf

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2 files changed

+54
-0
lines changed

2 files changed

+54
-0
lines changed

qemu/target/arm/cpu.c

+28
Original file line numberDiff line numberDiff line change
@@ -692,6 +692,19 @@ void arm_cpu_post_init(CPUState *obj)
692692
set_feature(&cpu->env, ARM_FEATURE_PMSA);
693693
}
694694

695+
if (arm_feature(&cpu->env, ARM_FEATURE_CBAR) ||
696+
arm_feature(&cpu->env, ARM_FEATURE_CBAR_RO)) {
697+
cpu->reset_cbar = 0;
698+
}
699+
700+
if (!arm_feature(&cpu->env, ARM_FEATURE_M)) {
701+
cpu->reset_hivecs = false;
702+
}
703+
704+
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
705+
cpu->rvbar = 0;
706+
}
707+
695708
if (arm_feature(&cpu->env, ARM_FEATURE_PMU)) {
696709
cpu->has_pmu = true;
697710
}
@@ -710,6 +723,21 @@ void arm_cpu_post_init(CPUState *obj)
710723
if (arm_feature(&cpu->env, ARM_FEATURE_NEON)) {
711724
cpu->has_neon = true;
712725
}
726+
727+
if (arm_feature(&cpu->env, ARM_FEATURE_M) &&
728+
arm_feature(&cpu->env, ARM_FEATURE_THUMB_DSP)) {
729+
cpu->has_dsp = true;
730+
}
731+
732+
if (arm_feature(&cpu->env, ARM_FEATURE_PMSA)) {
733+
cpu->has_mpu = true;
734+
}
735+
736+
cpu->cfgend = false;
737+
738+
if (arm_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER)) {
739+
cpu->gt_cntfrq_hz = NANOSECONDS_PER_SECOND / GTIMER_SCALE;
740+
}
713741
}
714742

715743
static void arm_cpu_finalize_features(ARMCPU *cpu)

tests/unit/test_arm.c

+26
Original file line numberDiff line numberDiff line change
@@ -373,6 +373,31 @@ static void test_arm_v8()
373373
OK(uc_close(uc));
374374
}
375375

376+
static void test_arm_thumb_smlabb()
377+
{
378+
char code[] = "\x13\xfb\x01\x23";
379+
uint32_t r_r1, r_r2, r_r3;
380+
uc_engine *uc;
381+
382+
uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_THUMB, code, sizeof(code) - 1,
383+
UC_CPU_ARM_CORTEX_M7);
384+
385+
r_r3 = 5;
386+
r_r1 = 7;
387+
r_r2 = 9;
388+
OK(uc_reg_write(uc, UC_ARM_REG_R3, &r_r3));
389+
OK(uc_reg_write(uc, UC_ARM_REG_R1, &r_r1));
390+
OK(uc_reg_write(uc, UC_ARM_REG_R2, &r_r2));
391+
392+
OK(uc_emu_start(uc, code_start | 1, code_start + sizeof(code) - 1, 0, 0));
393+
394+
OK(uc_reg_read(uc, UC_ARM_REG_R3, &r_r3));
395+
396+
TEST_CHECK(r_r3 == 5 * 7 + 9);
397+
398+
OK(uc_close(uc));
399+
}
400+
376401
TEST_LIST = {{"test_arm_nop", test_arm_nop},
377402
{"test_arm_thumb_sub", test_arm_thumb_sub},
378403
{"test_armeb_sub", test_armeb_sub},
@@ -384,4 +409,5 @@ TEST_LIST = {{"test_arm_nop", test_arm_nop},
384409
{"test_arm_und32_to_svc32", test_arm_und32_to_svc32},
385410
{"test_arm_usr32_to_svc32", test_arm_usr32_to_svc32},
386411
{"test_arm_v8", test_arm_v8},
412+
{"test_arm_thumb_smlabb", test_arm_thumb_smlabb},
387413
{NULL, NULL}};

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