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Commits on May 26, 2019

• Prepare for release

  olofk

  committed
  3c5d2fc

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• Relicense to ISC

  olofk

  committed
  c555b15

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• Add FuseSoC generator

  olofk

  committed
  ef189c2

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• Silence some verilator lint warnings

  olofk

  committed
  24e8c52

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• Update .core file to CAPI2

  olofk

  committed
  22bad1c

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• wb_arbiter: Add workaround for broken clog2 implementations

  olofk

  committed
  31d1837

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Commits on Feb 25, 2017

• Update .core file

  olofk

  committed
  6e88fe9

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• Fixes for modelsim

  olofk

  committed
  61dfd38

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• Hook up wb_cdc_tb to wb_intercon_tb

  olofk

  committed
  ea62127

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• wb_mux_tb: Small cleanup

  olofk

  committed
  447a64c

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• Fix wb_cdc_tb

  olofk

  committed
  cb6e65a

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• wb_arbiter_tb: Small cleanup

  olofk

  committed
  9583c72

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• Add tap generation and improve testbenches

  olofk

  committed
  a421201

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Commits on Feb 23, 2017

• Workaround for bug in Xilinx ISE

  olofk

  committed
  98984e0

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Commits on Sep 28, 2016

• Fix width bug in wb_cdc

  olofk

  committed
  180aa4f

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• Add constraints file

  olofk

  committed
  333405d

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• Add Wishbone CDC

  olofk

  committed
  540be0b

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Commits on Sep 14, 2016

• Add FuseSoC .core file

  olofk

  committed
  882b0fa

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• Disable broken upsizer testbench

  olofk

  committed
  804755c

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• Rewrite mux test bench

  olofk

  committed
  3c6740c

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• Remove dependency on verilog_utils

  olofk

  committed
  70f7e6c

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Commits on Dec 15, 2014

• Initial release

  olofk

  committed
  c6d701b

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• Initial commit

  olofk

  committed
  88a1c64

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