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Software Engineer by day, Cybersecurity researcher by night
An implementation of 32-bits MIPS Single Cycle Datapath in Verilog HDL.
Verilog 4
An algorithm for Hash Table Data Structure written in Python using Linear Probing for Collision resolution.
Python 4
A minimal bank management script written in MIPS Assembly language.
Assembly 1 1
Jupyter Notebook
Intel 8086 Assembly language
Assembly 1
Forked from sprintml/tml_2025_task2
Python
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