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Get the following error running sbt console within the root testchipip directory.
[info] Loading project definition from /home/brad/dev/fpga-zynq/testchipip/project
[info] Loading settings for project testchipip from build.sbt ...
[info] Set current project to testchipip (in build file:/home/brad/dev/fpga-zynq/testchipip/)
[info] Compiling 19 Scala sources to /home/brad/dev/fpga-zynq/testchipip/target/scala-2.11/classes ...
[error] /home/brad/dev/fpga-zynq/testchipip/src/main/scala/UARTAdapter.scala:31:28: not found: type UARTPortIO
[error] val uart = Flipped(new UARTPortIO)
[error] ^
[error] one error found
[error] (Compile / compileIncremental) Compilation failed
[error] Total time: 6 s, completed Mar 24, 2020, 3:03:27 PM
Appears related to sifive.blocks.devies.uart._ being out of date, but not sure how to troubleshoot it. Any idea how to correct this?
The text was updated successfully, but these errors were encountered:
Get the following error running
sbt console
within the root testchipip directory.Appears related to
sifive.blocks.devies.uart._
being out of date, but not sure how to troubleshoot it. Any idea how to correct this?The text was updated successfully, but these errors were encountered: