From 942d5aef13ab82ce12adfd5346b2a2716832d69d Mon Sep 17 00:00:00 2001
From: Jerry Zhao <jerryz123@berkeley.edu>
Date: Tue, 17 Oct 2023 13:49:24 -0700
Subject: [PATCH 1/2] Update API for rocket-chip clusters API

---
 src/main/scala/cva6/CVA6Tile.scala     | 12 +++++++-----
 src/main/scala/cva6/ConfigMixins.scala |  7 ++++---
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/src/main/scala/cva6/CVA6Tile.scala b/src/main/scala/cva6/CVA6Tile.scala
index 712b7c2..d4907ca 100644
--- a/src/main/scala/cva6/CVA6Tile.scala
+++ b/src/main/scala/cva6/CVA6Tile.scala
@@ -95,7 +95,7 @@ case class CVA6TileAttachParams(
 // TODO: BTBParams, DCacheParams, ICacheParams are incorrect in DTB... figure out defaults in CVA6 and put in DTB
 case class CVA6TileParams(
   name: Option[String] = Some("cva6_tile"),
-  hartId: Int = 0,
+  tileId: Int = 0,
   trace: Boolean = false,
   val core: CVA6CoreParams = CVA6CoreParams()
 ) extends InstantiableTileParams[CVA6Tile]
@@ -107,9 +107,11 @@ case class CVA6TileParams(
   val dcache: Option[DCacheParams] = Some(DCacheParams())
   val icache: Option[ICacheParams] = Some(ICacheParams())
   val clockSinkParams: ClockSinkParameters = ClockSinkParameters()
-  def instantiate(crossing: TileCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters): CVA6Tile = {
+  def instantiate(crossing: HierarchicalElementCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters): CVA6Tile = {
     new CVA6Tile(this, crossing, lookup)
   }
+  val baseName = name.getOrElse("cva6_tile")
+  val uniqueName = s"${baseName}_$tileId"
 }
 
 class CVA6Tile private(
@@ -125,10 +127,10 @@ class CVA6Tile private(
    * Setup parameters:
    * Private constructor ensures altered LazyModule.p is used implicitly
    */
-  def this(params: CVA6TileParams, crossing: TileCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters) =
+  def this(params: CVA6TileParams, crossing: HierarchicalElementCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters) =
     this(params, crossing.crossingType, lookup, p)
 
-  val intOutwardNode = IntIdentityNode()
+  val intOutwardNode = Some(IntIdentityNode())
   val slaveNode = TLIdentityNode()
   val masterNode = visibilityNode
 
@@ -148,7 +150,7 @@ class CVA6Tile private(
   }
 
   ResourceBinding {
-    Resource(cpuDevice, "reg").bind(ResourceAddress(staticIdForMetadataUseOnly))
+    Resource(cpuDevice, "reg").bind(ResourceAddress(tileId))
   }
 
  override def makeMasterBoundaryBuffers(crossing: ClockCrossingType)(implicit p: Parameters) = crossing match {
diff --git a/src/main/scala/cva6/ConfigMixins.scala b/src/main/scala/cva6/ConfigMixins.scala
index f38a099..77afe62 100644
--- a/src/main/scala/cva6/ConfigMixins.scala
+++ b/src/main/scala/cva6/ConfigMixins.scala
@@ -34,18 +34,19 @@ class WithToFromHostCaching extends Config((site, here, up) => {
  *
  * @param n amount of tiles to duplicate
  */
-class WithNCVA6Cores(n: Int = 1, overrideIdOffset: Option[Int] = None) extends Config((site, here, up) => {
+class WithNCVA6Cores(n: Int = 1) extends Config((site, here, up) => {
   case TilesLocated(InSubsystem) => {
     val prev = up(TilesLocated(InSubsystem), site)
-    val idOffset = overrideIdOffset.getOrElse(prev.size)
+    val idOffset = up(NumTiles)
     (0 until n).map { i =>
       CVA6TileAttachParams(
-        tileParams = CVA6TileParams(hartId = i + idOffset),
+        tileParams = CVA6TileParams(tileId = i + idOffset),
         crossingParams = RocketCrossingParams()
       )
     } ++ prev
   }
   case SystemBusKey => up(SystemBusKey, site).copy(beatBytes = 8)
   case XLen => 64
+  case NumTiles => up(NumTiles) + n
 })
 

From 9d1c106834824ddb8052b7f60574b2b544b40395 Mon Sep 17 00:00:00 2001
From: Jerry Zhao <jerryz123@berkeley.edu>
Date: Tue, 17 Oct 2023 17:04:15 -0700
Subject: [PATCH 2/2] Tiles do not generate interrupts

---
 src/main/scala/cva6/CVA6Tile.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/cva6/CVA6Tile.scala b/src/main/scala/cva6/CVA6Tile.scala
index d4907ca..b5edd4b 100644
--- a/src/main/scala/cva6/CVA6Tile.scala
+++ b/src/main/scala/cva6/CVA6Tile.scala
@@ -130,7 +130,7 @@ class CVA6Tile private(
   def this(params: CVA6TileParams, crossing: HierarchicalElementCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters) =
     this(params, crossing.crossingType, lookup, p)
 
-  val intOutwardNode = Some(IntIdentityNode())
+  val intOutwardNode = None
   val slaveNode = TLIdentityNode()
   val masterNode = visibilityNode