Use Aspeed UART routing control driver

[bluecmd]

Right now we implement this as memory writes like this:

u-bmc/platform/quanta-f06-leopard-ddr3/pkg/platform/platform.go

Lines 112 to 125 in f6c60da

	// Configure UART routing:
	// - Route UART2 to UART3
	// - Route UART3 to UART2
	// TODO(bluecmd): Platform dependent
	p.a.Mem().MustWrite32(0x1E789000+0x9c, 0x6<<22|0x4<<19)
	// Re-enable the clock of UART2 to enable the internal routing
	// which will make u-bmc end of the pipe be /dev/ttyS2
	// This can be done by defining the uart2 as active in the dts, but
	// if we do that then /dev/ttyS1 might be confusing as it will not work
	// properly.
	p.a.Mem().MustWrite32(ast2400.SCU_BASE+0x0, ast2400.SCU_PASSWORD)
	csr := p.a.Mem().MustRead32(ast2400.SCU_BASE + 0x0c)
	p.a.Mem().MustWrite32(ast2400.SCU_BASE+0x0c, csr & ^uint32(1<<16))

Using this patch it would be instead writing to sysfs.

[Keno]

Activating the clocks for the pass through uarts (the next couple of lines) is probably related. Ideally we'd declare those in the .dts, so the kernel driver takes care of setting those all up, without enabling access from user space (since in the pass-through case those registers are poked directly by the host over LPC).

[osresearch]

I've modified the platform/ast2400/boot/platform_g4.S file to enable the clocks and the routes so that the x86 serial port is available on the db9 immediately and also re-routed the BMC console to the COM2. osresearch@8b7d1ae#diff-f2bc3e1c26b9da867e3030c3a41fd7a9R359

[c0d3z3r0]

This should be somehow possible via pinctrl dts entries for the bootloader kernel, too