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K10Processor.cpp
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#include <stdio.h>
#include <stdlib.h>
#include "Signal.h"
#ifdef _WIN32
#include <windows.h>
#include "OlsApi.h"
#endif
#ifdef __linux
#include "cpuPrimitives.h"
#include <string.h>
#endif
#include "Processor.h"
#include "K10Processor.h"
#include "PCIRegObject.h"
#include "MSRObject.h"
#include "PerformanceCounter.h"
#include "sysdep.h"
//K10Processor class constructor
K10Processor::K10Processor () {
DWORD eax,ebx,ecx,edx;
PCIRegObject *pciReg60;
PCIRegObject *pciReg160;
bool pciReg60Success;
bool pciReg160Success;
DWORD nodes;
DWORD cores;
//Check extended CpuID Information - CPUID Function 0000_0001 reg EAX
if (Cpuid(0x1,&eax,&ebx,&ecx,&edx)!=TRUE) {
printf ("K10Processor::K10Processor - Fatal error during querying for Cpuid(0x1) instruction.\n");
return;
}
int familyBase = (eax & 0xf00) >> 8;
int model = (eax & 0xf0) >> 4;
int stepping = eax & 0xf;
int familyExtended = ((eax & 0xff00000) >> 20)+familyBase;
int modelExtended = ((eax & 0xf0000) >> 12)+model; /* family 10h: modelExtended is valid */
boostSupported = 0;
if (modelExtended == 10) /* revision E */
boostSupported = 1;
//Check Brand ID and Package type - CPUID Function 8000_0001 reg EBX
if (Cpuid(0x80000001,&eax,&ebx,&ecx,&edx)!=TRUE) {
printf ("K10Processor::K10Processor - Fatal error during querying for Cpuid(0x80000001) instruction.\n");
return;
}
int brandId=(ebx & 0xffff);
int processorModel=(brandId >> 4) & 0x7f;
int string1=(brandId >> 11) & 0xf;
int string2=(brandId & 0xf);
int pkgType=(ebx >> 28);
//Sets processor Specs
setSpecFamilyBase (familyBase);
setSpecModel (model);
setSpecStepping (stepping);
setSpecFamilyExtended (familyExtended);
setSpecModelExtended (modelExtended);
setSpecBrandId (brandId);
setSpecProcessorModel (processorModel);
setSpecString1 (string1);
setSpecString2 (string2);
setSpecPkgType (pkgType);
setMaxSlots(4);
// determine the number of nodes, and number of processors.
// different operating systems have different APIs for doing similiar, but below steps are OS agnostic.
pciReg60=new PCIRegObject ();
pciReg160=new PCIRegObject ();
pciReg60Success=pciReg60->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_HT_CONFIG, 0x60, getNodeMask(0));
pciReg160Success=pciReg160->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_HT_CONFIG, 0x160, getNodeMask (0));
if (pciReg60Success && pciReg160Success) {
nodes=pciReg60->getBits(0,4,3)+1;
/* TODO: bugbug, physical cores is per processor or it is per system?
I suppose that the physical cores variable
should contain the number of cores per-node (or per-processor) and
not the whole number of cores in the system.
This happens due to the new PCIRegObject and MSRObject classes.
*/
/*physicalCores=pciReg60->getBits(0,16,5);
physicalCores+=(pciReg160->getBits(0,16,3)<<5);
physicalCores++;*/
} else {
printf ("Warning: unable to detect multiprocessor machine\n");
nodes=1;
}
free (pciReg60);
free (pciReg160);
//Check how many physical cores are present - CPUID Function 8000_0008 reg ECX
if (Cpuid(0x80000008, &eax, &ebx, &ecx, &edx) != TRUE) {
printf(
"K10Processor::K10Processor- Fatal error during querying for Cpuid(0x80000008) instruction.\n");
return;
}
cores = (ecx & 0xff) + 1; /* cores per package */
/*
* Normally we assume that nodes per package is always 1 (one physical processor = one package), but
* with Magny-Cours chips (modelExtended>=8) this is not true since they share a single package for two
* chips (12 cores distributed on a single package but on two nodes).
*/
int nodes_per_package = 1;
if (modelExtended >= 8) {
PCIRegObject *pci_F3xE8_NbCapReg = new PCIRegObject();
if ((pci_F3xE8_NbCapReg->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_MISC_CONTROL_3, 0xE8, getNodeMask(0))) == TRUE) {
if (pci_F3xE8_NbCapReg->getBits(0, 29, 1)) {
nodes_per_package = 2;
}
} else {
printf ("K10Processor::K10Processor - Error discovering nodes per package, results may be unreliable\n");
}
free(pci_F3xE8_NbCapReg);
}
setProcessorCores(cores/nodes_per_package);
setProcessorNodes(nodes);
setNode(0);
setBoostStates(getNumBoostStates());
setPowerStates(5);
setProcessorIdentifier(PROCESSOR_10H_FAMILY);
setProcessorStrId("Family 10h Processor");
}
/*
* Static methods to allow external Main to detect current configuration status
* without instantiating an object. This method that detects if the system
* has a processor supported by this module
*/
bool K10Processor::isProcessorSupported () {
DWORD eax;
DWORD ebx;
DWORD ecx;
DWORD edx;
//Check base CpuID information
if (Cpuid(0x0,&eax,&ebx,&ecx,&edx)!=TRUE) return false;
//Checks if eax is 0x5 or 0x6. It determines the largest CPUID function available
//Family 10h returns eax=0x5 if processor revision is D, eax=0x6 if processor revision is E
if ((eax!=0x5) && (eax!=0x6)) return false;
//Check "AuthenticAMD" string
if ((ebx!=0x68747541) || (ecx!=0x444D4163) || (edx!=0x69746E65)) return false;
//Check extended CpuID Information - CPUID Function 0000_0001 reg EAX
if (Cpuid(0x1,&eax,&ebx,&ecx,&edx)!=TRUE) return false;
int familyBase = (eax & 0xf00) >> 8;
int familyExtended = ((eax & 0xff00000) >> 20)+familyBase;
if (familyExtended!=0x10) return false;
//Detects a Family 10h processor, i.e. Phenom, Phenom II, Athlon II, Turion II processors.
return true;
}
void K10Processor::showFamilySpecs() {
DWORD psi_l_enable;
DWORD psi_thres;
DWORD pstateId;
unsigned int i, j;
PCIRegObject *pciRegObject;
printf("Northbridge Power States table:\n");
for (j = 0; j < processorNodes; j++) {
printf("------ Node %d\n", j);
setNode(j);
setCore(0);
for (i = 0; i < getPowerStates(); i++) {
printf("PState %d - NbVid %d (%0.4fV) NbDid %d NbFid %d\n", i,
getNBVid(i), convertVIDtoVcore(getNBVid(i)), getNBDid(i),
getNBFid());
}
printf("Northbridge Maximum frequency: ");
if (getMaxNBFrequency() == 0)
printf("no maximum frequency, unlocked NB multiplier\n");
else
printf("%d\n", getMaxNBFrequency());
if (getPVIMode()) {
printf(
"* Warning: PVI mode is set. Northbridge voltage is used for processor voltage at given pstates!\n");
printf("* Changing Northbridge voltage changes core voltage too.\n");
}
printf("\n");
for (i = 0; i < getProcessorCores(); i++) {
setCore(i);
if (getC1EStatus() == false)
printf("Core %d C1E CMP halt bit is disabled\n", i);
else
printf("Core %d C1E CMP halt bit is enabled\n", i);
}
printf("\nVoltage Regulator Slamming time register: %d\n",
getSlamTime());
printf("Voltage Regulator Step Up Ramp Time: %d\n", getStepUpRampTime());
printf("Voltage Regulator Step Down Ramp Time: %d\n",
getStepDownRampTime());
pciRegObject = new PCIRegObject();
if (!pciRegObject->readPCIReg(PCI_DEV_NORTHBRIDGE,
PCI_FUNC_MISC_CONTROL_3, 0xa0, getNodeMask()))
printf("Unable to read PCI Register (0xa0)\n");
else {
pstateId = pciRegObject->getBits(0, 16, 12);
printf("Processor PState Identifier: 0x%x\n", pstateId);
}
free(pciRegObject);
psi_l_enable = getPsiEnabled();
psi_thres = getPsiThreshold();
//Parallel VID Interface is available only on family 10h processor
//when it is allocated on a Single Plane motherboard
//Family 11h processors and Family 10h processors on Dual Plane
//motherboards should use Serial Vid Interface
if (getPVIMode())
printf(
"Processor is using Parallel VID Interface (probably Single Plane mode)\n");
else
printf(
"Processor is using Serial VID Interface (probably Dual Plane mode)\n");
if (psi_l_enable) {
printf("PSI_L bit enabled (improve VRM efficiency in low power)\n");
printf("PSI voltage threshold VID: %d (%0.4fV)\n", psi_thres,
convertVIDtoVcore(psi_thres));
} else
printf("PSI_L bit not enabled\n");
}
}
//Miscellaneous function inherited by Processor abstract class and that
//needs to be reworked for family 10h
float K10Processor::convertVIDtoVcore(DWORD curVid) {
/*How to calculate VID from Vcore. It doesn't matter if your processor is working in
PVI or SVI mode, since processsor register is always 7 bit wide. Then the processor
takes care to convert it to Parallel or Serial implementation.
Serial VID Interface is simple to calculate.
To obtain vcore from VID you need to do:
vcore = 1,55 – (VID * 0.0125)
The inverse formula to obtain VID from vcore is:
vid = (1.55-vcore)/0.0125
*/
float curVcore;
if (getPVIMode()) {
if (curVid >= 0x5d)
curVcore = 0.375;
else {
if (curVid < 0x3f)
curVid = (curVid >> 1) << 1;
curVcore = (float) (1.550 - (0.0125 * curVid));
}
} else {
if (curVid >= 0x7c)
curVcore = 0;
else
curVcore = (float) (1.550 - (0.0125 * curVid));
}
return curVcore;
}
DWORD K10Processor::convertVcoretoVID (float vcore) {
DWORD vid;
vid=round(((1.55-vcore)/0.0125));
return vid;
}
DWORD K10Processor::convertFDtoFreq (DWORD curFid, DWORD curDid) {
return (100*(curFid+0x10))/(1<<curDid);
}
DWORD K10Processor::convertNBFDtoFreq (DWORD curFid, DWORD curDid)
{
return (200 * (curFid + 4)) / (1 << curDid);
}
void K10Processor::convertFreqtoFDEx(DWORD freq, int *oFid, int *oDid, int basefid, int maxfid, int basefreq) {
/*Needs to calculate the approximate frequency using FID and DID right
combinations. Take in account that base frequency is always 200 MHz
(that is Hypertransport 1x link speed).
For family 10h processor the right formula is:
(100*(Fid+16))/(2^Did)
Inverse formulas are:
fid = (((2^Did) * freq) / 100) - 16
did = log2 ((100 * (fid +16))/f)
The approach I choose here is to minimize FID and maximize DID.
I mean, we start calculating a FID like if DID is 0 and see
what FID come out. If FID is strictly less than 0, then it
means there's something wrong and we need to raise DID.
We raise guessed DID and then calculate again what FID we
are getting. If we get a FID that is >=0, then we got
a correct FID/DID couple, else we raise again the guessed DID
and calculate again, and so on... */
float fid;
float did;
if (freq == 0)
return;
did = 0;
do {
fid = (((1 << (int) did) * (float) freq) / basefreq) - basefid;
if (fid < 0)
did++;
} while (fid < 0);
if (fid > maxfid)
fid = maxfid;
//Actually we don't need to reculate DID, since we guessed a
//valid one due to the fact that the argument is positive.
//Debug printf:
//printf ("\n\nFor frequency %d, FID is %f, DID %f\n", freq, fid, did);
*oDid = (int) did;
*oFid = (int) fid;
return;
}
void K10Processor::convertFreqtoFD(DWORD freq, int *oFid, int *oDid)
{
convertFreqtoFDEx(freq, oFid, oDid, 16, 63, 100);
}
void K10Processor::convertNBFreqtoFD(DWORD freq, int *oFid, int *oDid)
{
convertFreqtoFDEx(freq, oFid, oDid, 4, 31, 200);
}
//-----------------------setVID-----------------------------
//Overloads abstract class setVID to allow per-core personalization
void K10Processor::setVID (PState ps, DWORD vid) {
MSRObject *msrObject;
if ((vid>minVID()) || (vid<maxVID())) {
printf ("K10Processor.cpp: VID Allowed range %d-%d\n", minVID(), maxVID());
return;
}
msrObject=new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask ())) {
printf ("K10Processor.cpp: unable to read MSR\n");
free (msrObject);
return;
}
//To set VID, base offset is 9 bits and value is 7 bit wide.
msrObject->setBitsLow(9,7,vid);
if (!msrObject->writeMSR()) {
printf ("K10Processor.cpp: unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
//-----------------------setFID-----------------------------
//Overloads abstract Processor method to allow per-core personalization
void K10Processor::setFID(PState ps, float floatFid) {
unsigned int fid;
MSRObject *msrObject;
fid=(unsigned int)floatFid;
if (fid > 63) {
printf("K10Processor.cpp: FID Allowed range 0-63\n");
return;
}
msrObject = new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR + ps.getPState(), getMask())) {
printf("K10Processor.cpp: unable to read MSR\n");
free(msrObject);
return;
}
//To set FID, base offset is 0 bits and value is 6 bit wide
msrObject->setBitsLow(0, 6, fid);
if (!msrObject->writeMSR()) {
printf("K10Processor.cpp: unable to write MSR\n");
free(msrObject);
return;
}
free(msrObject);
return;
}
//-----------------------setDID-----------------------------
//Overloads abstract Processor method to allow per-core personalization
void K10Processor::setDID(PState ps, float floatDid) {
unsigned int did;
MSRObject *msrObject;
did=(unsigned int)floatDid;
if (did > 4) {
printf("K10Processor.cpp: DID Allowed range 0-4\n");
return;
}
msrObject = new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR + ps.getPState(), getMask())) {
printf("K10Processor.cpp: unable to read MSR\n");
free(msrObject);
return;
}
//To set DID, base offset is 6 bits and value is 3 bit wide
msrObject->setBitsLow(6, 3, did);
if (!msrObject->writeMSR()) {
printf("K10Processor.cpp: unable to write MSR\n");
free(msrObject);
return;
}
free(msrObject);
return;
}
//-----------------------getVID-----------------------------
DWORD K10Processor::getVID (PState ps) {
MSRObject *msrObject;
DWORD vid;
msrObject=new MSRObject ();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask())) {
printf ("K10Processor.cpp::getVID - unable to read MSR\n");
free (msrObject);
return false;
}
//Returns data for the first cpu in cpuMask.
//VID is stored after 9 bits of offset and is 7 bits wide
vid=msrObject->getBitsLow(0, 9, 7);
free (msrObject);
return vid;
}
//-----------------------getFID-----------------------------
float K10Processor::getFID (PState ps) {
MSRObject *msrObject;
DWORD fid;
msrObject=new MSRObject ();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask())) {
printf ("K10Processor.cpp::getFID - unable to read MSR\n");
free (msrObject);
return false;
}
//Returns data for the first cpu in cpuMask (cpu 0)
//FID is stored after 0 bits of offset and is 6 bits wide
fid=msrObject->getBitsLow(0, 0, 6);
free (msrObject);
return fid;
}
//-----------------------getDID-----------------------------
float K10Processor::getDID (PState ps) {
MSRObject *msrObject;
DWORD did;
msrObject=new MSRObject ();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask())) {
printf ("K10Processor.cpp::getDID - unable to read MSR\n");
free (msrObject);
return false;
}
//Returns data for the first cpu in cpuMask (cpu 0)
//DID is stored after 6 bits of offset and is 3 bits wide
did=msrObject->getBitsLow(0, 6, 3);
free (msrObject);
return (float)did;
}
//-----------------------setFrequency-----------------------------
void K10Processor::setFrequency (PState ps, DWORD freq) {
int fid, did;
convertFreqtoFD (freq, &fid, &did);
setFID (ps, (DWORD)fid);
setDID (ps, (DWORD)did);
return;
}
//-----------------------setVCore-----------------------------
void K10Processor::setVCore (PState ps, float vcore) {
DWORD vid;
vid=convertVcoretoVID (vcore);
//Check if VID is below maxVID value set by the processor.
//If it is, then there are no chances the processor will accept it and
//we reply with an error
if (vid<maxVID()) {
printf ("Unable to set vcore: %0.4fV exceeds maximum allowed vcore (%0.4fV)\n", vcore, convertVIDtoVcore(maxVID()));
return;
}
//Again we che if VID is above minVID value set by processor.
if (vid>minVID()) {
printf ("Unable to set vcore: %0.4fV is below minimum allowed vcore (%0.4fV)\n", vcore, convertVIDtoVcore(minVID()));
return;
}
setVID (ps,vid);
return;
}
//-----------------------getFrequency-----------------------------
DWORD K10Processor::getFrequency (PState ps) {
DWORD curFid, curDid;
DWORD curFreq;
curFid=getFID (ps);
curDid=getDID (ps);
curFreq=convertFDtoFreq(curFid, curDid);
return curFreq;
}
//-----------------------getVCore-----------------------------
float K10Processor::getVCore(PState ps) {
DWORD curVid;
float curVcore;
curVid = getVID(ps);
curVcore = convertVIDtoVcore(curVid);
return curVcore;
}
bool K10Processor::getPVIMode () {
PCIRegObject *pciRegObject;
bool pviMode;
pciRegObject=new PCIRegObject();
if (!pciRegObject->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_MISC_CONTROL_3, 0xa0, getNodeMask())) {
printf ("K10Processor.cpp::getPVIMode - Unable to read PCI register\n");
return false;
}
pviMode=(bool)pciRegObject->getBits(0,8,1);
free (pciRegObject);
return pviMode;
}
//PStates enable/disable/peek
void K10Processor::pStateDisable (PState ps) {
MSRObject *msrObject;
msrObject=new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask ())) {
printf ("K10Processor.cpp::pStateDisable - unable to read MSR\n");
free (msrObject);
return;
}
//To disable a pstate, base offset is 63 bits (31th bit of edx) and value is 1 bit wide
msrObject->setBitsHigh(31,1,0x0);
if (!msrObject->writeMSR()) {
printf ("K10Processor.cpp::pStateDisable - unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
void K10Processor::pStateEnable (PState ps) {
MSRObject *msrObject;
msrObject=new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask ())) {
printf ("K10Processor.cpp::pStateEnable - unable to read MSR\n");
free (msrObject);
return;
}
//To disable a pstate, base offset is 63 bits (31th bit of edx) and value is 1 bit wide
msrObject->setBitsHigh(31,1,0x1);
if (!msrObject->writeMSR()) {
printf ("K10Processor.cpp:pStateEnable - unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
bool K10Processor::pStateEnabled(PState ps) {
MSRObject *msrObject;
unsigned int status;
msrObject = new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR + ps.getPState(), getMask())) {
printf("K10Processor.cpp::pStateEnabled - unable to read MSR\n");
free(msrObject);
return false;
}
//To peek a pstate, base offset is 63 bits (31th bit of edx) and value is 1 bit wide
//We consider just the first cpu in cpuMask
status = msrObject->getBitsHigh(0, 31, 1);
free(msrObject);
if (status == 0)
return false;
else
return true;
}
void K10Processor::setMaximumPState (PState ps) {
PCIRegObject *pciRegObject;
pciRegObject=new PCIRegObject ();
if (!pciRegObject->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_MISC_CONTROL_3, 0xdc, getNodeMask())) {
printf ("K10Processor.cpp::setMaximumPState - unable to read PCI register\n");
free (pciRegObject);
return;
}
/*
* Maximum pstate is stored in PCI register with
* device PCI_DEV_NORTHBRIDGE
* function PC_FUNC_MISC_CONTROL_3
* register 0xdc
* bits from 8 to 10
*/
pciRegObject->setBits(8,3,ps.getPState());
if (!pciRegObject->writePCIReg()) {
printf ("K10Processor.cpp::setMaximumPState - unable to write PCI register\n");
free (pciRegObject);
return;
}
free (pciRegObject);
return;
}
PState K10Processor::getMaximumPState () {
PCIRegObject *pciRegObject;
PState pState (0);
pciRegObject = new PCIRegObject();
if (!pciRegObject->readPCIReg(PCI_DEV_NORTHBRIDGE, PCI_FUNC_MISC_CONTROL_3, 0xdc, getNodeMask())) {
printf ("K10Processor.cpp::getMaximumPState - unable to read PCI register\n");
free (pciRegObject);
return 0;
}
/*
* Maximum pstate is stored in PCI register with
* device PCI_DEV_NORTHBRIDGE
* function PC_FUNC_MISC_CONTROL_3
* register 0xdc
* bits from 8 to 10
*/
pState.setPState(pciRegObject->getBits(0, 8 ,3));
free (pciRegObject);
return pState;
}
void K10Processor::setNBVid (PState ps, DWORD nbvid) {
MSRObject *msrObject;
if (nbvid > 127) {
printf ("K10Processor.cpp::setNBVid - Northbridge VID Allowed range 0-127\n");
return;
}
msrObject = new MSRObject();
/*
* Northbridge VID for a specific pstate must be set for all cores
* of a single node. In SVI systems, it should also be coherent with
* pstates which have DID=0 or DID=1 (see MSRC001_0064-68 pag. 327 of
* AMD Family 10h Processor BKDG document). We don't care here of this
* fact, this is a user concern.
*/
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask(ALL_NODES, selectedNode))) {
printf ("K10Processor::setNBVid - Unable to read MSR\n");
free (msrObject);
return;
}
//Northbridge VID is stored in low half of MSR register (eax) in bits from 25 to 31
msrObject->setBitsLow(25,7,nbvid);
if (!msrObject->writeMSR()) {
printf ("K10Processor::setNBVid - Unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
void K10Processor::setNBDid (PState ps, DWORD nbdid) {
MSRObject *msrObject;
msrObject=new MSRObject ();
if ((nbdid!=0) && (nbdid!=1)) {
printf ("Northbridge DID must be 0 or 1\n");
return;
}
if (!msrObject->readMSR(BASE_K10_PSTATEMSR+ps.getPState(), getMask(ALL_CORES, selectedNode))) {
printf ("K10Processor::setNBDid - Unable to read MSR\n");
free (msrObject);
return;
}
//Northbridge DID is stored in low half of MSR register (eax) in bit 22
msrObject->setBitsLow(22,1,nbdid);
if (!msrObject->writeMSR()) {
printf ("K10Processor::setNBDid - Unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
bool K10Processor::setNBFrequency(PState ps, DWORD freq)
{
int fid, did;
convertNBFreqtoFD (freq, &fid, &did);
setNBFid ((DWORD)fid);
setNBDid (ps, (DWORD)did);
return true;
}
DWORD K10Processor::getNBFrequency(PState ps)
{
return convertNBFDtoFreq(getNBFid(), getNBDid(ps));
}
/*
*MaxNBFrequency is stored per-node, even though it is stored in a
*MSR and is available per-core
*/
DWORD K10Processor::getMaxNBFrequency() {
MSRObject *msrObject;
DWORD maxNBFid;
msrObject = new MSRObject();
if (!msrObject->readMSR(COFVID_STATUS_REG, getMask(0, selectedNode))) {
printf("K10Processor::getMaxNBFrequency - Unable to read MSR\n");
free(msrObject);
return false;
}
//Maximum Northbridge FID is stored in COFVID_STATUS_REG in higher half
//of register (edx) in bits from 27 to 31
maxNBFid = msrObject->getBitsHigh(0, 27, 5);
//If MaxNbFid is equal to 0, then there are no limits on northbridge frequency
//and so there are no limits on northbridge FID value.
if (maxNBFid == 0)
return 0;
else
return (maxNBFid + 4) * 200;
}
void K10Processor::forcePState (PState ps) {
MSRObject *msrObject;
msrObject=new MSRObject();
if (!msrObject->readMSR(BASE_PSTATE_CTRL_REG, getMask ())) {
printf ("K10Processor.cpp::forcePState - unable to read MSR\n");
free (msrObject);
return;
}
//To force a pstate, we act on setting the first 3 bits of register. All other bits must be zero
msrObject->setBitsLow(0,32,0x0);
msrObject->setBitsHigh(0,32,0x0);
msrObject->setBitsLow(0,3,ps.getPState());
if (!msrObject->writeMSR()) {
printf ("K10Processor.cpp::forcePState - unable to write MSR\n");
free (msrObject);
return;
}
free (msrObject);
return;
}
DWORD K10Processor::getNBVid(PState ps) {
MSRObject *msrObject;
DWORD nbVid;
msrObject = new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR + ps.getPState(),
getMask())) {
printf("K10Processor::getNBVid - Unable to read MSR\n");
free(msrObject);
return false;
}
//Northbridge VID is stored in low half of MSR register (eax) in bits from 25 to 31
nbVid = msrObject->getBitsLow(0, 25, 7);
free(msrObject);
return nbVid;
}
DWORD K10Processor::getNBDid (PState ps) {
MSRObject *msrObject;
DWORD nbDid;
msrObject = new MSRObject();
if (!msrObject->readMSR(BASE_K10_PSTATEMSR + ps.getPState(),
getMask())) {
printf("K10Processor::getNBDid - Unable to read MSR\n");
free(msrObject);
return false;
}
//Northbridge DID is stored in low half of MSR register (eax) in bit 22
nbDid = msrObject->getBitsLow(0, 22, 1);
free(msrObject);
return nbDid;
}