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| 1 | +# Licensed to the Apache Software Foundation (ASF) under one |
| 2 | +# or more contributor license agreements. See the NOTICE file |
| 3 | +# distributed with this work for additional information |
| 4 | +# regarding copyright ownership. The ASF licenses this file |
| 5 | +# to you under the Apache License, Version 2.0 (the |
| 6 | +# "License"); you may not use this file except in compliance |
| 7 | +# with the License. You may obtain a copy of the License at |
| 8 | +# |
| 9 | +# http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | +# |
| 11 | +# Unless required by applicable law or agreed to in writing, |
| 12 | +# software distributed under the License is distributed on an |
| 13 | +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
| 14 | +# KIND, either express or implied. See the License for the |
| 15 | +# specific language governing permissions and limitations |
| 16 | +# under the License. |
| 17 | + |
| 18 | +ifeq (, $(shell which verilator)) |
| 19 | + $(error "No Verilator in $(PATH), consider doing apt-get install verilator") |
| 20 | +endif |
| 21 | + |
| 22 | +# Change VERILATOR_INC_DIR if Verilator is installed on a different location |
| 23 | +ifeq (, $(VERILATOR_INC_DIR)) |
| 24 | + ifeq (, $(wildcard /usr/local/share/verilator/include/*)) |
| 25 | + ifeq (, $(wildcard /usr/share/verilator/include/*)) |
| 26 | + $(error "Verilator include directory is not set properly") |
| 27 | + else |
| 28 | + VERILATOR_INC_DIR := /usr/share/verilator/include |
| 29 | + endif |
| 30 | + else |
| 31 | + VERILATOR_INC_DIR := /usr/local/share/verilator/include |
| 32 | + endif |
| 33 | +endif |
| 34 | + |
| 35 | +TOP = TestAccel |
| 36 | +BUILD_NAME = build |
| 37 | +USE_TRACE = 1 |
| 38 | +LIBNAME = libhw |
| 39 | + |
| 40 | +vta_dir = $(abspath ../../../../) |
| 41 | +tvm_dir = $(abspath ../../../../../) |
| 42 | +build_dir = $(abspath .)/$(BUILD_NAME) |
| 43 | +verilator_build_dir = $(build_dir)/verilator |
| 44 | +chisel_build_dir = $(build_dir)/chisel |
| 45 | + |
| 46 | +verilator_opt = --cc |
| 47 | +verilator_opt += +define+RANDOMIZE_GARBAGE_ASSIGN |
| 48 | +verilator_opt += +define+RANDOMIZE_REG_INIT |
| 49 | +verilator_opt += +define+RANDOMIZE_MEM_INIT |
| 50 | +verilator_opt += --x-assign unique |
| 51 | +verilator_opt += --output-split 20000 |
| 52 | +verilator_opt += --output-split-cfuncs 20000 |
| 53 | +verilator_opt += --top-module ${TOP} |
| 54 | +verilator_opt += -Mdir ${verilator_build_dir} |
| 55 | +verilator_opt += -I$(chisel_build_dir) |
| 56 | + |
| 57 | +cxx_flags = -O2 -Wall -fPIC -shared |
| 58 | +cxx_flags += -fvisibility=hidden -std=c++11 |
| 59 | +cxx_flags += -DVL_TSIM_NAME=V$(TOP) |
| 60 | +cxx_flags += -DVL_PRINTF=printf |
| 61 | +cxx_flags += -DVL_USER_FINISH |
| 62 | +cxx_flags += -DVM_COVERAGE=0 |
| 63 | +cxx_flags += -DVM_SC=0 |
| 64 | +cxx_flags += -Wno-sign-compare |
| 65 | +cxx_flags += -include V$(TOP).h |
| 66 | +cxx_flags += -I$(verilator_build_dir) |
| 67 | +cxx_flags += -I$(VERILATOR_INC_DIR) |
| 68 | +cxx_flags += -I$(VERILATOR_INC_DIR)/vltstd |
| 69 | +cxx_flags += -I$(vta_dir)/include |
| 70 | +cxx_flags += -I$(tvm_dir)/include |
| 71 | +cxx_flags += -I$(tvm_dir)/3rdparty/dlpack/include |
| 72 | + |
| 73 | +cxx_files = $(VERILATOR_INC_DIR)/verilated.cpp |
| 74 | +cxx_files += $(VERILATOR_INC_DIR)/verilated_dpi.cpp |
| 75 | +cxx_files += $(wildcard $(verilator_build_dir)/*.cpp) |
| 76 | +cxx_files += $(vta_dir)/hardware/dpi/tsim_device.cc |
| 77 | + |
| 78 | +ifneq ($(USE_TRACE), 0) |
| 79 | + verilator_opt += --trace |
| 80 | + cxx_flags += -DVM_TRACE=1 |
| 81 | + cxx_flags += -DTSIM_TRACE_FILE=$(verilator_build_dir)/$(TOP).vcd |
| 82 | + cxx_files += $(VERILATOR_INC_DIR)/verilated_vcd_c.cpp |
| 83 | +else |
| 84 | + cxx_flags += -DVM_TRACE=0 |
| 85 | +endif |
| 86 | + |
| 87 | +# The following is to be consistent with cmake |
| 88 | +ifeq ($(shell uname), Darwin) |
| 89 | + lib_path = $(build_dir)/$(LIBNAME).dylib |
| 90 | +else |
| 91 | + lib_path = $(build_dir)/$(LIBNAME).so |
| 92 | +endif |
| 93 | + |
| 94 | +default: lib |
| 95 | + |
| 96 | +lib: $(lib_path) |
| 97 | +$(lib_path): $(verilator_build_dir)/V$(TOP).cpp |
| 98 | + g++ $(cxx_flags) $(cxx_files) -o $@ |
| 99 | + |
| 100 | +verilator: $(verilator_build_dir)/V$(TOP).cpp |
| 101 | +$(verilator_build_dir)/V$(TOP).cpp: $(chisel_build_dir)/$(TOP).v |
| 102 | + verilator $(verilator_opt) $< |
| 103 | + |
| 104 | +verilog: $(chisel_build_dir)/$(TOP).v |
| 105 | +$(chisel_build_dir)/$(TOP).v: install_vta_package |
| 106 | + sbt 'test:runMain test.Elaborate --target-dir $(chisel_build_dir) --top-name $(TOP)' |
| 107 | + |
| 108 | +install_vta_package: |
| 109 | + cd $(vta_dir)/hardware/chisel && sbt publishLocal |
| 110 | + |
| 111 | +clean: |
| 112 | + -rm -rf $(build_dir) target project/target project/project |
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