VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
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Updated
Sep 22, 2025 - VHDL
Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Image Processing Toolbox in Verilog using Basys3 FPGA
Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
VHDL Guide
Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
Translates IPXACT XML to synthesizable VHDL or SystemVerilog
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
Trying to verify Verilog/VHDL designs with formal methods and tools
cryptography ip-cores in vhdl / verilog
Commodore 64 core for the MEGA65 based on the MiSTer FPGA C64 core
The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).