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Verilog

Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.

Here are 220 public repositories matching this topic...

openwifi

open-sdr / openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Updated Oct 23, 2025
C

jbush001 / NyuziProcessor

GPGPU microprocessor architecture

processor-architecture fpga hardware gpu graphics verilog microprocessor gpu-computing

Updated Nov 8, 2024
C

nickg / nvc

VHDL compiler and simulator

simulator fpga compiler vhdl verilog

Updated Oct 26, 2025
C

PCILeech-DMA-Firmware

JPShag / PCILeech-DMA-Firmware

The last Pcileech DMA CFW guide you will ever need. Sponsored by DMAPolice.com

fpga hardware firmware emulation verilog chinese xilinx pci vivado arbor dma pcie tlp pcileech full-emu telescan dmafw pcileech-fpga ufrisk

Updated May 28, 2025
C

Zynq7010_eink_controller

Hanley-Yao / Zynq7010_eink_controller

这是一个基于Zynq7010的Eink控制器在ED097TC2上高质量显示帧数高达10FPS

fpga zynq controller verilog eink axi4 fdma

Updated Aug 13, 2023
C

poprc

HackerFoo / poprc

A Compiler for the Popr Language

language dependent-types functional compiler concatenative verilog logic-programming non-deterministic partial-evaluators supercompiler linear-logic popr popr-compiler high-level-synthesis

Updated Jan 7, 2021
C

kuopinghsu / srv32

Simple 3-stage pipeline RISC-V processor

verilog risc-v rv32im

Updated Sep 15, 2025
C

wyvernSemi / pcievhost

PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities

c verification verilog virtual modelling cosim pcie pli bfm

Updated Oct 24, 2025
C

volatile-static / Keyboard

客制化机械键盘——从0开始全套资料

keyboard embedded fpga ble verilog wireless nios ps2 nrf52832 usb-hid stm32f103c8t6 spinalhdl

Updated Aug 10, 2023
C

Pconst167 / sol-1

Sol-1: A CPU/Computer System made from 74 series logic.

unix cpu electronics assembly assembler operating-system verilog c-compiler hdl

Updated Oct 25, 2025
C

mmicko / fpga101-workshop

FPGA 101 - Workshop materials

fpga micropython hackaday riscv verilog icestorm icestudio apio

Updated Mar 17, 2019
C

maikmerten / spu32

Small Processing Unit 32: A compact RV32I CPU written in Verilog

fpga verilog icestorm risc-v ice40 rv32i system-on-chip risc-processor

Updated May 30, 2022
C

aap / pdp6

PDP-6 Emulator

fpga simulation emulation verilog retrocomputing computer-history pdp-6

Updated Jul 30, 2025
C

mit-ll / CEP

The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.

fpga rocket-chip riscv verilog soc risc-v oshw osh chipyard

Updated Dec 1, 2022
C

a2fpga / a2fpga_core

Apple II FPGA Co-Processor

fpga apple2 retro verilog retrocomputing appleii hdmi appleiigs tms9918a gowin apple2e tang-nano tang-nano-9k tang-nano-20k

Updated Jul 12, 2025
C

ultraembedded / usb_sniffer

High Speed USB 2.0 capture device based on miniSpartan6+

fpga usb analyzer capture verilog minispartan6 fpga-development-board

Updated May 26, 2020
C

Essenceia / Nasdaq-HFT-FPGA

RTL design for a nasdaq compatible high frequency trading low level. Supports itch on moldudp64.

fpga udp ethereum rtl verilog hft hft-trading nasdaq itch nasdaq-itch moldudp moldudp64

Updated Dec 24, 2023
C

super-miyamoto-sprint

dan-rodrigues / super-miyamoto-sprint

Homebrew game for homebrew FPGA game console

game c fpga verilog risc-v baremetal

Updated Nov 21, 2020
C

xver / Shunt

SystemVerilog DPI "TCP/IP Shunt" (System Verilog/SystemC/Python TCP/IP socket library)

Updated Aug 2, 2025
C

angadsinghsandhu / CSE-MIT-Manipal

The collective code required for completing a 4-year B.Tech Computer Science Engineering Course.

c java data-structures verilog college object-oriented-programming digital-systems

Updated Jun 8, 2022
C

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Website: github.com/topics/verilog
Wikipedia: Wikipedia