DUTH RISC-V Superscalar Microprocessor
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Oct 23, 2024 - SystemVerilog
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superscalar
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Superscalar dual-issue RISC-V processor
open-source pipeline core rtl forwarding systemverilog gtkwave testbench superscalar in-order risc-v microarchitecture low-power verilator ahb3-lite instruction-level-parallelism dual-issue riscv-gcc
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Dec 3, 2025 - SystemVerilog
MIPS32 CPU implemented in SystemVerilog, with superscalar and branch prediction support
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Jan 4, 2019 - SystemVerilog
An attempt at making a 2-way superscalar out-of-order riscv processor for an Arty s25 fpga.
processor-architecture fpga processor out-of-order superscalar risc-v processor-simulator ddr3 processor-design axi4 superscalar-cpu
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Updated
Oct 7, 2024 - SystemVerilog
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