🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

Repository to store all design and testbench files for Senior Design

Parameterized Ring Oscillator and Testbench. The design is written in Verilog and testbench is developed in SystemVerilog.

Ring oscillator and its application as Physical Unclonable Function (PUF) for password management

Implementation of a Ring Oscillator-based Physically Unclonable Function (PUF) in Sky130, with 8 bits of Challenge-Response Pairs (CRP)

Comprehensive Random Number Generator implementation featuring both Pseudo-Random Number Generator (PRNG) using Linear Feedback Shift Registers and True Random Number Generator (TRNG) using Ring Oscillators

FuzzyMSFLA-Algorithm (Fuzzy adaptive optimisation method)

All the source files related to the design and simulation of a Ring Oscillator and a Programmable Logic Device(PLD) using the LTSpice XVII simulator for UOM's EN2110 - Electronics - III Module ❄

This project implements a tetrahedral oscillator inspired by the paper “Analysis and Design of a Tetrahedral Oscillator” by Richelle L. Smith and Thomas H. Lee. The oscillator is built from coupled inverter pairs, and its operating frequency is tuned by adding capacitive loads to the internal nodes.

Ring oscillator subcircuits

Voltage Controlled Oscillator that produces 1GHz output frequency at voltage 3.3V using IHP PDK as a part of eSim Marathon

Cadence Virtuoso project of 5-stage ring oscillator

Study of deep correlations in (pseudo) random bits.