🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
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Updated
Oct 26, 2024 - VHDL
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
Repository to store all design and testbench files for Senior Design
Parameterized Ring Oscillator and Testbench. The design is written in Verilog and testbench is developed in SystemVerilog.
Ring oscillator and its application as Physical Unclonable Function (PUF) for password management
All the source files related to the design and simulation of a Ring Oscillator and a Programmable Logic Device(PLD) using the LTSpice XVII simulator for UOM's EN2110 - Electronics - III Module ❄
FuzzyMSFLA-Algorithm (Fuzzy adaptive optimisation method)
Ring oscillator subcircuits
Implementation of a Ring Oscillator-based Physically Unclonable Function (PUF) in Sky130, with 8 bits of Challenge-Response Pairs (CRP)
Study of deep correlations in (pseudo) random bits.
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