[DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
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Updated
Apr 15, 2022 - Verilog
[DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
A high-performance C++20 cache simulator with power/area modeling, MESI coherence, prefetching, and multi-level hierarchy support for architecture research and education.
A dynamic web-based tool for visualizing and interacting with Wye (Y) and Delta (Δ) power system configurations. Built using Flask, Python, and Tailwind CSS.
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