A JSON library implemented in VHDL.

Portable HyperRAM controller

VHDL , ModelSIM, Quartus, FPGA, Image Processing

DSSS Wireless transmit-receive system in VHDL

💻 Simulation for the architecture of a processor inspired by the ideas of PDP-11 processor

The source codes used in the blog post available at: https://rayanfam.com/topics/hardware-design-stack/

Utilities for Avalon Memory Map

A simulation to PDP-11 microprocessor with modelsim, The design is a micro-programmed based with an average of 9 clock cycles per instruction.

A simplified version of PDP11 instruction set architecture (ISA) using VHDL.

ieee_proposed with names changed to floatfixlib to be compatible with Quartus Prime Lite and support fixed, float, etc.

UART Protocol made for Altera DE2-115 FPGA in VHDL

VHDL examples for a different kind of topics

Modelsim generating a fern and sending the coordinates via a socket to a display program

Ein 2-Kanal-Funktionsgenerator mittels Direct Digital Synthesis (DDS). Erstellt als Gruppenprojekt für das Modul BTE5024 – Anwendungen elektronischer Systeme.

Building a simple frame decoder chip for a vending machine from scratch using VHDL and Alliance CAD tools

A digital clock system implemented with VHDL via Intel Quartus Prime and ModelSim.

FSM and Cache design for practicing the concepts of computer architecture

small microprocessor based on PDP11 using VHDL

Trabalhos, Projetos, Exercícios e aulas realizados em VHDL e Assembly na cadeira de Fundamentos de sistemas digitais, matéria do segundo semestre.