magic-vlsi
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A 12-track height standard cell library built in SKY130 PDK. The cells were designed using Magic VLSI Layout Tool and characterized using Digital Standard Cell Characterizer (DSCC).
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Dec 7, 2023 - Python
A complete setup for Qflow, an open-source digital VLSI design flow. This repo provides pre-configured example projects, automated installation scripts, and step-by-step instructions to synthesize, place, and route Verilog designs into GDSII layouts. Supports both running example designs and using your own Verilog.
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Mar 17, 2025 - Python
Design of a common source amplifier using Skywater sky130 technology
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Jun 13, 2022
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