ip-core

Here are 5 public repositories matching this topic...

DisplayPort IP-core

fpga xilinx lattice ip-core displayport

Synthesizable SystemVerilog IP-Core of the I2S Receiver

fpga verilog systemverilog hdl system-verilog cpld i2s i2s-dac ip-core asic-design

Synthesizable SystemVerilog IP-Cores of the Forward and Backward Clarke Transformation

fpga verilog systemverilog digital-signal-processing digital-design cpld ip-core asic-design

Synthesizable SystemVerilog IP-Core of the First-Order Delta-Sigma Modulator

fpga verilog digital-signal-processing system-verilog cpld dac ip-core asic-design

Common cores for internal use under organization. Mostly oriented on Gowin Arora V family

fpga verilog system-verilog ip-core gowin hardware-design

Add a description, image, and links to the ip-core topic page so that developers can more easily learn about it.

To associate your repository with the ip-core topic, visit your repo's landing page and select "manage topics."