🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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Updated
Jan 12, 2025 - VHDL
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
VUnit is a unit testing framework for VHDL/SystemVerilog
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
SNES for the Analogue Pocket
Turning .NET software into FPGA hardware for faster execution and lower power usage.
Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
Image Processing Toolbox in Verilog using Basys3 FPGA
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
SPI master and SPI slave for FPGA written in VHDL
🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
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