RTL development of Quad Serial Peripheral Interface (Quad-SPI) on QuestaSim using SystemVerilog.
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Updated
Oct 19, 2022 - SystemVerilog
RTL development of Quad Serial Peripheral Interface (Quad-SPI) on QuestaSim using SystemVerilog.
Lab solutions of MIT Manipal CSE Dept. for Batch of 2024.
Projects I made in Digital System Lab. I used Logisim for my projects.
DIGITAL CIRCUIT SIMULATOR - an OBJECT ORIENTED PROGRAMMING way of implemeting LOGIC GATES ICs
Most of the slides and exercises are my projects and manuscripts (★‿★)
Learned as a part of CS210 course
Date of Respository Creation: 05/08/2023. This project was undertaken as a part of 4th semester System Verilog Project.
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