#

designcompiler

Here are 2 public repositories matching this topic...

kkiningh / synthesis-example

Example of a full DC synthesis script for a simple design

verilog synthesis synopsys vlsi designcompiler

Updated Feb 25, 2019
Tcl

jiru1997 / Cardinal-NIC-and-Chip-Multiprocessor

Cardinal NIC and Chip Multiprocessor

verilog soc designcompiler innovus simvision

Updated Dec 1, 2021
Verilog

Improve this page

Add a description, image, and links to the designcompiler topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the designcompiler topic, visit your repo's landing page and select "manage topics."