4017 IC Key Matrix Library
-
Updated
Nov 11, 2017 - C++
#
decade-counter
Here are 3 public repositories matching this topic...
Verilog implementation of a synchronous 4-bit up/down decade counter with asynchronous clear, load, and carry-out features. Also includes a 2-decade decimal counter design using two such counters cascaded together. Simulates counting up/down from 00 to 99 with load, increment, and clear operations.
design counter verilog xilinx vivado systemverilog vlsi system-verilog digital-design xilinx-vivado decade-counter digital-system synchoronous-counter testench decimal-counter
-
Updated
May 30, 2025 - SystemVerilog
Home security system using digital ICs such as digital logic gates, shift register, decade counter, 555 timer, and 7 segment display.
-
Updated
Jul 1, 2024
Improve this page
Add a description, image, and links to the decade-counter topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the decade-counter topic, visit your repo's landing page and select "manage topics."