Intel Quartus Prime Synthesis Engine for Docker

RISC-V based microprocessor system for Altera DE0 FPGA board

Projekat iz Arhitekture Racunara (AR-a)

Altera Quartus project for Altera Cyclone III FPGA boards which uses one manager board and two worker boards to sort an array of numbers in parallel.

FPGA peripherals

4-bit calculator with all operations we set up for calculator. It have some main parts which are FSM(Finite State Machine) which has MOP(Micro-operations). Datapath that includes calculator's brain which is ALU(Arithmetic Logic Unit), multiplexers and hexadecimal decoder.