FFT implementation using CORDIC algorithm written in Verilog.
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Updated
Sep 6, 2018 - Verilog
FFT implementation using CORDIC algorithm written in Verilog.
the Renaissance Repository, a collection of pedagogical codes associated with the forthcoming texts Renaissance Robotics and Numerical Renaissance, by Thomas Bewley
Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CORDIC like as DDS (sine / cosine generator)
accurate scientific calculator with fractions inside
📐 CORDIC in Vectoring Mode, Computer Aided Design of Digital Systems course, University of Tehran
Digital System Design Project - Spring 2020
Javascript implementation of the CORDIC Algorithm that approximate trigonometric functions
YAC - Yet Another CORDIC Core
CORDIC square root algorithm implemented in Xilinx FPGAs
Self-project on describing CORDIC algorithm for calculation of arctan(y/x) using Verilog.
Implementation of the CORDIC machine in circular rotation mode
Synthesizeable CORDIC processor in SystemVerilog.
Implementation of the CORDIC machine in circular rotation mode
Summary of projects I did in VLSI desing.
A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance
A FPGA design that is a 16-bits CORDIC computer to find the sine and cosine of a angle in range of 0 to π/2.
Time domain to logarithmic frequency domain converter, as the polyphase FFT do for the linear.
Vendor-Unlocked Scalable Adaptive Random Forest Accelerator
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