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ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

boom rocket rocket-chip chip-generator chisel riscv rtl peripherals soc out-of-order superscalar risc-v firesim accelerators chipyard hwacha

Updated Aug 19, 2026
Scala

firesim / FireMarshal

Star

Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

linux fedora spike distro qemu buildroot workload firesim chipyard

Updated Aug 31, 2026
Python

mit-ll / CEP

Star

The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.

fpga rocket-chip riscv verilog soc risc-v oshw osh chipyard

Updated Dec 1, 2022
C

etri / omnixtend

Star

Unified open-source repository for OmniXtend protocol implementations in C, Verilog, and Chisel, supporting host and memory roles.

risc-v chipyard omnixtend memory-coherence

Updated Apr 15, 2026
Lua

MaxXSoft / Bossa

Star

BOOM's Simulation Accelerator.

simulation accelerator boom rocket rocket-chip chisel riscv rtl firrtl soc risc-v verilator chipyard

Updated Dec 16, 2021
Scala

RedFlag2017 / rocket-soc-tb

Star

A systemverilog/UVM/Makefile testbench for Rocket RISC-V SoCs

soc risc-v chipyard testbech verifcation

Updated Jun 19, 2020
Verilog

ThePituLegend / RISC-V_DE10-Nano

Star

This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.

fpga riscv altera ucberkeley risc-v altera-fpga riscv-asm de10-nano riscv64 terasic rocketchip riscv-assembly chipyard

Updated Feb 7, 2022
Verilog

Fleker / chipyard-viewer

Star

An online viewer for Chipyard output files

webapp hacktoberfest system-on-chip chipyard

Updated Oct 21, 2021
TypeScript

yasnakateb / ChipyardIntegration

Star

😱 RoCC Accelerator Integration with Chipyard

scala sbt integration hardware simulation rocket rocket-chip chisel chisel3 computer-architecture hardware-acceleration risc-v verilator rocc accelerators chipyard

Updated Nov 6, 2024

NMJ0 / Torch2Gemmini

Star

End-to-end MLIR-based accelerator flow integrating Torch-MLIR, Buddy-MLIR, and Gemmini to compile and run PyTorch workloads on Gemmini accelerator implemented on an FPGA.

fpga-programming mlir chipyard gemmini torch-mlir buddy-mlir dl-accelerators

Updated May 21, 2026
Python

anupamsarashwat1-cloud / smvdu-titan-x

Star

A high-performance, production-grade 64-bit RISC-V Multicore SoC ecosystem and industry-standard Cadence ASIC CAD flow (Genus/Innovus). Fully integrated 5-hart coherent core complex, TileLink interconnect, custom RoCC ML Systolic Array, PCIe, USB, HDMI, and silicon-proven IP blocks.