A paper list of spiking neural networks, including papers, codes, and related websites. 本仓库收集脉冲神经网络相关的顶会顶刊以及CNS论文和代码,正在持续更新中。
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Updated
Jan 28, 2026
A paper list of spiking neural networks, including papers, codes, and related websites. 本仓库收集脉冲神经网络相关的顶会顶刊以及CNS论文和代码,正在持续更新中。
A brain-inspired version of generative replay for continual learning with deep neural networks (e.g., class-incremental learning on CIFAR-100; PyTorch code).
Offical code of "QKFormer: Hierarchical Spiking Transformer using Q-K Attention" (NeurIPS 2024)
Spikingformer: A Key Foundation Model for Spiking Neural Networks (AAAI 2026)
The official PyTorch code for ICLR'22 Paper "Learning Fast, Learning Slow: A General Continual Learning Method based on Complementary Learning System""
Organization-as-Code for autonomous AI agents. Brain-inspired memory that grows, consolidates, and forgets. Multi-model (Claude/GPT/Gemini/Ollama).
Official PyTorch implementation of paper "A Hybrid Compact Neural Architecture for Visual Place Recognition" by M. Chancán (RA-L & ICRA 2020) https://doi.org/10.1109/LRA.2020.2967324
Enhancing the Performance of Transformer-based Spiking Neural Networks by SNN-optimized Downsampling with Precise Gradient Backpropagation
Spiking Global-Local Fusion Transformer
Implementation for the paper "SpaceNet: Make Free Space For Continual Learning" in PyTorch.
Multi-Task Structural Learning using Local Task Similarity induced Neuron Creation and Removal
Biologically plausible cognitive architecture: structural memory, thought formation, and language without gradients or backpropagation
Revolutionary database architecture combining neuromorphic computing, quantum-inspired algorithms, and DNA-storage principles for ultra-efficient edge computing applications based on SQL Queries
My first messy but working AI architecture. Have fun :-)
This project implements a neuromorphic NoC using RISC-V nodes with custom hardware to simulate spiking neural networks. Tested on an FPGA, it supports up to 1,024 neurons and uses dedicated FIFO buffers for stable, low-power operation. The design combines RISC-V flexibility with hardware acceleration for efficient small-scale SNN applications.
This project implements a neuromorphic Network-on-Chip using customized RV32IMF RISC-V cores, a 2D mesh NoC, and neuron bank hardware to accelerate spiking neural networks. It supports event-driven spike communication via custom ISA extensions and AXI interfaces, and is implemented and tested on an FPGA.
This project implements a neuromorphic architecture using parallel RISC-V processing elements to model spiking neurons, either individually or virtually grouped. It will also develop encoder and decoder modules to benchmark the system on classical machine learning tasks.
AxOS — A bare-metal OS with a biologically-inspired cognitive runtime (Hyperdimensional Computing) layered on top of x86 hardware.
🤖 Build personalized AI systems that adapt to mood, energy, and creative flow, enhancing collaboration through emotional intelligence and dynamic interactions.
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