aiebaremetal

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Interactive bare-metal AIE-ML v1 MA crossover on VD100 — UART command interface triggers AIE graph, prints BUY/SELL/HOLD signals

ai fpga trading hls amd xilinx uart bare-metal versal moving-average vitis aiengine xcve2302 vd100 aie-ml aiebaremetal

Vitis bare-metal BSP platform for Versal AI Edge XCVE2302 (VD100) — shared foundation for bare-metal AIE applications

fpga amd xilinx uart ps bsp bare-metal pl versal vitis xcve2302 vd100 aie-ml aiebaremetal

Bare-metal MA crossover pipeline on Versal AI Edge VD100 — PS drives AIE-ML v1 graph via HLS DMA without Linux or XRT

ai fpga trading hls graph amd xilinx bare-metal dma versal moving-average aie xcve2302 vd100 aie-ml aiebaremetal

Vitis system project linking AIE-ML kernel + HLS DMA kernels into a bootable bare-metal SD image for VD100 XCVE2302

ai fpga hls elf uart bare-metal dma versal vitis xcve2302 vd100 aie-ml mm2s s2mm aiebaremetal boot-bin

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