memlayout.h

// Physical memory layout

// qemu -machine sifive_u is set up like this
//
// 00001000 -- boot ROM, provided by qemu
// 02000000 -- CLINT
// 0C000000 -- PLIC
// 10010000 -- uart0 
// 80000000 -- boot ROM jumps here in machine mode and loads OpenSBI
//
// OpenSBI will then load the kernel into memory starting at 0x80100000.

// TODO: complete JH7110 (VF2) memory map
//
// JH7110 (VF2) is set up like this
//
// 10000000 -- uart0 
// 40000000 -- boot ROM jumps here in machine mode and loads OpenSBI + U-Boot
//
// OpenSBI will then load the kernel into memory starting at 0x80100000.

// the kernel uses physical memory, thus:
// 80100000 -- entry.S, then kernel text and data
// end -- start of kernel page allocation area
// PHYSTOP -- end RAM used by the kernel

#if defined(QEMU)
    #define UART0 0x10010000L
    #define SPI0 0x10050000L
    #define SYS_IOMUX 0x13040000L   // TODO: not used in QEMU, stub used to compile
    #define SYS_CRG 0x13020000L

    #define UART0_IRQ 10
#elif defined(VF2)
    #define UART0 0x10000000L
    #define SPI0 0x10060000L
    #define SPI1 0x10070000L
    #define SPI2 0x10080000L
    #define SPI3 0x12070000L
    #define SPI4 0x12080000L
    #define SPI5 0x12090000L
    #define SPI6 0x120A0000L
    #define SYS_IOMUX 0x13040000L
    #define SYS_CRG 0x13020000L

    #define UART0_IRQ 32
#endif

// virtio mmio interface
#define VIRTIO0 0x10001000
#define VIRTIO0_IRQ 1

// vf2 puts platform-level interrupt controller (PLIC) here.
// Skip HART 0 (monitor core)
#define PLIC 0x0c000000L
#define PLIC_PRIORITY (PLIC + 0x4)
#define PLIC_PENDING (PLIC + 0x1000)
#define PLIC_SENABLE(hart) (PLIC + 0x2100 + (hart-1)*0x100)
#define PLIC_SPRIORITY(hart) (PLIC + 0x202000 + (hart-1)*0x2000)
#define PLIC_SCLAIM(hart) (PLIC + 0x202004 + (hart-1)*0x2000)

// the kernel expects there to be RAM
// for use by the kernel and user pages
// from physical address 0x80100000 to PHYSTOP.
#define KERNBASE 0x80100000L
#define PHYSTOP (KERNBASE + 128*1024*1024)

// map the trampoline page to the highest address,
// in both user and kernel space.
#define TRAMPOLINE (MAXVA - PGSIZE)

// map kernel stacks beneath the trampoline,
// each surrounded by invalid guard pages.
#define KSTACK(p) (TRAMPOLINE - ((p)+1)* 2*PGSIZE)

// User memory layout.
// Address zero first:
//   text
//   original data and bss
//   fixed-size stack
//   expandable heap
//   ...
//   TRAPFRAME (p->trapframe, used by the trampoline)
//   TRAMPOLINE (the same page as in the kernel)
#define TRAPFRAME (TRAMPOLINE - PGSIZE)