Skip to content

Commit 5f079ae

Browse files
LeiWang1999LeiWang1999
committed
lint fix
1 parent 51c6006 commit 5f079ae

File tree

7 files changed

+50
-56
lines changed

7 files changed

+50
-56
lines changed

‎.clang-tidy‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ Checks: >
4242
-cppcoreguidelines-pro-type-static-cast-downcast,
4343
-performance-unnecessary-value-param,
4444
-performance-enum-size,
45+
-clang-analyzer-deadcode.DeadStores,
4546
4647
WarningsAsErrors: '*'
4748

‎src/op/gemm.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ TileOperator GemmNode::Clone() const {
9191
return Gemm(op);
9292
}
9393

94-
GemmInst GemmNode::GetGemmInst(int block_size, Target target) const {
94+
GemmNode::GemmInst GemmNode::GetGemmInst(int block_size, Target target) const {
9595
tvm::transform::PassContext ctxt = tvm::transform::PassContext::Current();
9696

9797
int warp_size = TargetGetWarpSize(target);

‎src/op/parallel.cc‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -249,8 +249,7 @@ LayoutMap ParallelOpNode::InferLayout(const LayoutInferArgs &T,
249249
auto compute_loop_layout_from_buffer = [&](const Buffer &buffer) {
250250
Fragment src_layout = T.layout_map[buffer].as<Fragment>().value();
251251
DLOG(INFO) << "[compute_loop_layout_from_buffer] infer from buffer `"
252-
<< buffer << "` of layout " << src_layout->DebugOutput()
253-
<< std::endl;
252+
<< buffer << "` of layout " << src_layout->DebugOutput() << '\n';
254253
Fragment result;
255254
if (IsCommonAccessIndice(buffer)) {
256255
result = src_layout;
@@ -274,7 +273,7 @@ LayoutMap ParallelOpNode::InferLayout(const LayoutInferArgs &T,
274273
->BindThreadRange(T.thread_bounds);
275274
}
276275
DLOG(INFO) << "[compute_loop_layout_from_buffer] ... and get "
277-
<< result->DebugOutput() << std::endl;
276+
<< result->DebugOutput() << '\n';
278277
return result;
279278
};
280279
if (source_buffer.defined()) {
@@ -338,22 +337,21 @@ LayoutMap ParallelOpNode::InferLayout(const LayoutInferArgs &T,
338337
IfBufferRemapLoopGenerator::run(root_, T.buffer_remap, T.layout_map);
339338
int vector_size = GetVectorizeSize(maybe_remapped_root_);
340339

341-
DLOG(INFO) << "[PlanLoopPartition] vector_size = " << vector_size
342-
<< std::endl;
340+
DLOG(INFO) << "[PlanLoopPartition] vector_size = " << vector_size << '\n';
343341

344342
PrimExpr loop_total_size = 1;
345343
for (Stmt l = root_; l.as<For>().has_value();
346344
l = l.as<For>().value()->body)
347345
loop_total_size = loop_total_size * l.as<For>().value()->extent;
348346
DLOG(INFO) << "[PlanLoopPartition] loop_total_size = " << loop_total_size
349-
<< std::endl;
347+
<< '\n';
350348
while (!analyzer_.CanProve(
351349
floormod(loop_total_size,
352350
T.thread_bounds->extent * vector_size) == 0) &&
353351
vector_size > 1)
354352
vector_size /= 2;
355353
DLOG(INFO) << "[PlanLoopPartition] after adjust: vector_size = "
356-
<< vector_size << std::endl;
354+
<< vector_size << '\n';
357355

358356
// Check if coalesced_width is defined
359357
if (auto coalesced_width =
@@ -371,11 +369,11 @@ LayoutMap ParallelOpNode::InferLayout(const LayoutInferArgs &T,
371369
}
372370
}
373371
DLOG(INFO) << "[PlanLoopPartition] root_ = " << root_
374-
<< " ############# vector_size = " << vector_size
375-
<< ", thread_bounds = " << T.thread_bounds << std::endl;
372+
<< " ############# vector_size = " << vector_size
373+
<< ", thread_bounds = " << T.thread_bounds << '\n';
376374
loop_layout_ = PlanLoopPartition(root_, vector_size, T.thread_bounds);
377375
DLOG(INFO) << "[PlanLoopPartition] loop_layout_ = "
378-
<< loop_layout_->DebugOutput() << std::endl;
376+
<< loop_layout_->DebugOutput() << '\n';
379377
}
380378
} else {
381379
return {};

‎src/transform/layout_inference.cc‎

Lines changed: 37 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -105,13 +105,15 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
105105
"required for layout inference.";
106106

107107
// Run InferLayout
108-
std::cerr << "[RunInferStep] working on " << cur_infer_id << std::endl;
109-
auto updates = next->InferLayout(
110-
LayoutInferArgs{target_, thread_bounds, layout_map}, level);
108+
DLOG(INFO) << "[RunInferStep] working on " << cur_infer_id << '\n';
109+
auto updates =
110+
next->InferLayout(LayoutInferArgs{target_, thread_bounds, layout_map,
111+
&analyzer_, buffer_oob},
112+
level);
111113
// Process the returned updates
112114
for (const auto &[buffer, layout] : updates) {
113115
DLOG(INFO) << " consider update " << buffer << " as "
114-
<< layout->DebugOutput() << std::endl;
116+
<< layout->DebugOutput() << '\n';
115117

116118
// Basic validity checks
117119
ICHECK(buffer.defined()) << "InferLayout returned an undefined buffer.";
@@ -142,7 +144,7 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
142144
inner_analyzer)) {
143145
layout_map.Set(buffer, layout);
144146
DLOG(INFO) << " layout broadcast from "
145-
<< src_layout->DebugOutput() << ", accepted" << std::endl;
147+
<< src_layout->DebugOutput() << ", accepted" << '\n';
146148
continue;
147149
}
148150
}
@@ -154,7 +156,7 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
154156
} else {
155157
// Otherwise, update map
156158
layout_map.Set(buffer, layout);
157-
DLOG(INFO) << " new layout accepted" << std::endl;
159+
DLOG(INFO) << " new layout accepted" << '\n';
158160
if (!update_queue)
159161
continue;
160162

@@ -214,9 +216,9 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
214216
<< "Size mismatch: buffer_oob_vec_ and infer_list_ must match in "
215217
"length.";
216218

217-
std::cerr << "[InferLayout] all participating operators:" << std::endl;
219+
DLOG(INFO) << "[InferLayout] all participating operators:" << '\n';
218220
for (int i = 0; i < infer_list_stmt_.size(); ++i) {
219-
std::cerr << " op " << i << ":" << infer_list_stmt_[i] << std::endl;
221+
DLOG(INFO) << " op " << i << ":" << infer_list_stmt_[i] << '\n';
220222
}
221223

222224
// If needed, you can also check that annotated_layout_map_ is not empty, or
@@ -480,11 +482,11 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
480482
void InferInFreeMode(LayoutMap &layout_map,
481483
const LayoutMap &strict_layout_map) {
482484

483-
DLOG(INFO) << "Enforced layout maps:" << std::endl;
485+
DLOG(INFO) << "Enforced layout maps:" << '\n';
484486
for (auto &&[k, v] : layout_map) {
485-
DLOG(INFO) << " " << k << ": " << v->DebugOutput() << std::endl;
487+
DLOG(INFO) << " " << k << ": " << v->DebugOutput() << '\n';
486488
}
487-
DLOG(INFO) << std::endl;
489+
DLOG(INFO) << '\n';
488490

489491
// Group operators into connected components
490492
UnionFind<int> uf;
@@ -522,59 +524,52 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
522524

523525
for (auto &&[root, members] : components) {
524526
DLOG(INFO) << "======================= processing component " << root
525-
<< std::endl;
527+
<< '\n';
526528
decltype(infer_list_) best_infer_list;
527529
LayoutMap best_layout_map;
528530
int64_t min_reg_num = INT64_MAX;
529531
int min_reg_num_infer_root = -1;
532+
533+
// Try each member as the root of inference for this component
530534
for (int attempt_infer_root : members) {
531535
DLOG(INFO) << "----------------------- try root " << attempt_infer_root
532-
<< std::endl;
533-
// backup infer_list_ in class member
536+
<< '\n';
537+
// Backup the current infer_list_ state
534538
auto back_infer_list = BackupInferList();
535-
// create temporarily used layout_map, new handle so that it copies on
536-
// write
539+
// Copy the current layout_map for temporary use
537540
LayoutMap tmp_layout_map = layout_map;
538-
// infer from attempt_infer_root in free mode
539541
bool do_update = true;
540542
try {
543+
// Run inference starting from attempt_infer_root
541544
RunInferStep(attempt_infer_root, InferLevel::kFree, true,
542545
tmp_layout_map, strict_layout_map, q, in_queue);
543546
FinishInferQueue(InferLevel::kFree, tmp_layout_map, strict_layout_map,
544547
q, in_queue);
545-
// Silly workaround: we have no clue if single root will iterate over
546-
// the entire component, since the InferLayout implementations have
547-
// complicated conditioning inside and we know nothing about it.
548-
// This would constantly result in incomplete layouts for buffers in
549-
// this component. Instead of trying all combinations of root
550-
// selection order, we simply go through all other loops in order
551-
// after the first search from attempt_infer_root.
548+
549+
// After the first search, run inference for all other members in
550+
// order
552551
for (int other_infer_root : members) {
553552
if (other_infer_root != attempt_infer_root) {
554553
RunInferStep(other_infer_root, InferLevel::kFree, true,
555554
tmp_layout_map, strict_layout_map, q, in_queue);
556-
// must also be kFree here to avoid conflicts.
557555
FinishInferQueue(InferLevel::kFree, tmp_layout_map,
558556
strict_layout_map, q, in_queue);
559557
}
560558
}
561-
} catch (LayoutConflictException e) {
562-
// such an order fails, try others
559+
} catch (const LayoutConflictException &e) {
563560
do_update = false;
564561
DLOG(INFO) << "attempt failed due to LayoutConflictException "
565-
<< e.what() << std::endl;
566-
} catch (NormalizeIterException e) {
567-
// such an order encounters iterators that is not normalizable, try
568-
// others e.g. i * 576 % 2048
562+
<< e.what() << '\n';
563+
} catch (const NormalizeIterException &e) {
569564
do_update = false;
570565
DLOG(INFO) << "attempt failed due to NormalizeIterException "
571-
<< e.what() << std::endl;
566+
<< e.what() << '\n';
572567
}
573568

574569
if (do_update) {
575-
// compute total register number
570+
// Compute the total register number for this layout
576571
int64_t reg_num = 0;
577-
for (auto &&[buffer, layout] : tmp_layout_map) {
572+
for (const auto &[buffer, layout] : tmp_layout_map) {
578573
if (auto frag = layout.as<Fragment>()) {
579574
int64_t frag_reg_num = 1;
580575
for (auto i : frag.value()->OutputShape()) {
@@ -585,24 +580,24 @@ class BufferUseDefCollector : public IRVisitorWithAnalyzer {
585580
reg_num += frag_reg_num;
586581
}
587582
}
588-
// if it's any better, update the best_* storage
583+
// Update the best plan if this one uses fewer registers
589584
if (reg_num < min_reg_num) {
590-
best_infer_list = std::move(infer_list_);
585+
best_infer_list =
586+
BackupInferList(); // Use backup to avoid moving out infer_list_
591587
best_layout_map = tmp_layout_map;
592588
min_reg_num = reg_num;
593589
min_reg_num_infer_root = attempt_infer_root;
594590
}
595591
}
596-
// recover stateful infer_list_, head on next
592+
// Restore infer_list_ state for the next attempt
597593
infer_list_ = std::move(back_infer_list);
598594
}
599-
ICHECK(min_reg_num < INT64_MAX)
600-
<< "no available layout found" << std::endl;
601-
// now apply the best plan for this component
595+
ICHECK(min_reg_num < INT64_MAX) << "no available layout found" << '\n';
596+
// Apply the best plan for this component
602597
infer_list_ = std::move(best_infer_list);
603598
layout_map = best_layout_map;
604599
DLOG(INFO) << "[InferInFreeMode] Final selection is attempt_infer_root = "
605-
<< min_reg_num_infer_root << std::endl;
600+
<< min_reg_num_infer_root << '\n';
606601
}
607602
}
608603
};
@@ -625,7 +620,7 @@ class LayoutInferencer : public IRMutatorWithAnalyzer {
625620
LayoutInferencer(const LayoutInferenceResult &result,
626621
bool skip_thread_partition, arith::Analyzer *analyzer)
627622
: arith::IRMutatorWithAnalyzer(analyzer), result_(result),
628-
skip_thread_partition_(skip_thread_partition) {};
623+
skip_thread_partition_(skip_thread_partition){};
629624

630625
using arith::IRMutatorWithAnalyzer::IRMutatorWithAnalyzer;
631626

‎src/transform/layout_reducer.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,7 @@ class ReducerLayoutAnnotator : public IRMutatorWithAnalyzer {
178178
Stmt VisitStmt_(const ForNode *op) final {
179179
// only annotate the outermost loop
180180
bool should_annotate = false;
181-
if (inside_reducer_range_.size() > 0 && !already_annotated_ &&
181+
if (!inside_reducer_range_.empty() && !already_annotated_ &&
182182
op->kind == ForKind::kParallel) {
183183
should_annotate = true;
184184
already_annotated_ = true;

‎src/transform/merge_shared_memory_allocations.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -645,7 +645,7 @@ class SharedMemoryRewriter : public StmtExprMutator {
645645
if (call->op.same_as(tl::tl_gemm()) ||
646646
call->op.same_as(tl::tl_gemm_sp())) {
647647
DLOG(INFO) << "PostOrderVisit CallNode tl_gemm and tl_gemm_sp: "
648-
<< call->op;
648+
<< call->op;
649649
}
650650
}
651651
});

‎src/transform/storage_rewrite.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1790,7 +1790,7 @@ class VectorTypeRewriter : public StmtExprMutator {
17901790
extents.Set(extents.size() - 1,
17911791
last_extent / make_const(last_extent.dtype(), info.factor()));
17921792
DLOG(INFO) << "Allocate with " << new_buffer_var << " and "
1793-
<< info.new_element_dtype << " extents: " << extents;
1793+
<< info.new_element_dtype << " extents: " << extents;
17941794
return Allocate(new_buffer_var, info.new_element_dtype, extents,
17951795
op->condition, op->body);
17961796
}

0 commit comments

Comments
 (0)