zephyr: cavs: use zephyr pm, clk and dma glue

Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.

Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>

Author: Jaska Uimonen

app/overlays/tgl-h/ipc4_overlay.conf

@@ -27,6 +27,10 @@ CONFIG_FORMAT_CONVERT_HIFI3=n
 CONFIG_PM=y
 CONFIG_PM_DEVICE=y
 CONFIG_PM_DEVICE_RUNTIME=y
+CONFIG_PM_POLICY_CUSTOM=y
+
+CONFIG_CLOCK_CONTROL_ADSP=y
+CONFIG_CLOCK_CONTROL=y
 
 CONFIG_ZEPHYR_NATIVE_DRIVERS=y
 CONFIG_DAI=y

app/overlays/tgl/ipc4_overlay.conf

@@ -27,6 +27,10 @@ CONFIG_FORMAT_CONVERT_HIFI3=n
 CONFIG_PM=y
 CONFIG_PM_DEVICE=y
 CONFIG_PM_DEVICE_RUNTIME=y
+CONFIG_PM_POLICY_CUSTOM=y
+
+CONFIG_CLOCK_CONTROL_ADSP=y
+CONFIG_CLOCK_CONTROL=y
 
 CONFIG_ZEPHYR_NATIVE_DRIVERS=y
 CONFIG_DAI=y

src/ipc/ipc4/handler.c

@@ -955,7 +955,7 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4)
 		/* do platform specific suspending */
 		platform_context_save(sof_get());
 
-#if !defined(CONFIG_LIBRARY) && defined(CONFIG_CAVS)
+#if !defined(CONFIG_LIBRARY) && !defined(CONFIG_ZEPHYR_NATIVE_DRIVERS)
 		arch_irq_lock();
 		platform_timer_stop(timer_get());
 #endif

west.yml

@@ -43,8 +43,9 @@ manifest:
 
     - name: zephyr
       repo-path: zephyr
-      revision: e40859f787128b9a8e000b51009502278fc59586
+      revision: 95168e6776d6c8803a5e1f3ed10e1a8b6bc98311
       remote: zephyrproject
+
       # Import some projects listed in zephyr/west.yml@revision
       #
       # Warning: changes to zephyr/west.yml or to any other _imported_

zephyr/CMakeLists.txt

@@ -170,6 +170,7 @@ if (CONFIG_SOC_SERIES_INTEL_CAVS_V25)
 	endif()
 
 	# Platform sources
+	if (NOT CONFIG_ZEPHYR_NATIVE_DRIVERS)
 	zephyr_library_sources(
 		${SOF_PLATFORM_PATH}/intel/cavs/platform.c
 		${SOF_PLATFORM_PATH}/intel/cavs/lib/mem_window.c
@@ -179,8 +180,18 @@ if (CONFIG_SOC_SERIES_INTEL_CAVS_V25)
 		${SOF_PLATFORM_PATH}/intel/cavs/lib/pm_memory.c
 		${SOF_PLATFORM_PATH}/intel/cavs/lib/clk.c
 		${SOF_PLATFORM_PATH}/intel/cavs/lib/dma.c
-		#${SOF_PLATFORM_PATH}/intel/cavs/lps_pic_restore_vector.S
 	)
+	set_source_files_properties(${SOF_PLATFORM_PATH}/intel/cavs/lib/power_down.S PROPERTIES COMPILE_FLAGS -DASSEMBLY)
+	else()
+	zephyr_library_sources(
+		${SOF_PLATFORM_PATH}/intel/cavs/platform.c
+		${SOF_PLATFORM_PATH}/intel/cavs/lib/mem_window.c
+		${SOF_PLATFORM_PATH}/tigerlake/lib/clk.c
+		lib/pm_runtime.c
+		lib/clk.c
+		lib/dma.c
+	)
+	endif()
 
 	# SOF core infrastructure - runs on top of Zephyr
 	zephyr_library_sources(
@@ -191,9 +202,6 @@ if (CONFIG_SOC_SERIES_INTEL_CAVS_V25)
 		${SOF_PLATFORM_PATH}/intel/cavs/lps_wait.c
 	)
 
-	set_source_files_properties(${SOF_PLATFORM_PATH}/intel/cavs/lib/power_down.S PROPERTIES COMPILE_FLAGS -DASSEMBLY)
-	set_source_files_properties(${SOF_PLATFORM_PATH}/intel/cavs/lps_pic_restore_vector.S PROPERTIES COMPILE_FLAGS -DASSEMBLY)
-
 	set(PLATFORM "tigerlake")
 	zephyr_include_directories(${SOF_PLATFORM_PATH}/intel/cavs/include)
 endif()
@@ -210,9 +218,9 @@ if (CONFIG_ACE_VERSION_1_5)
 	zephyr_library_sources(
 		${SOF_PLATFORM_PATH}/intel/ace/platform.c
 		${SOF_PLATFORM_PATH}/meteorlake/lib/clk.c
-		${SOF_PLATFORM_PATH}/intel/ace/lib/pm_runtime.c
-		${SOF_PLATFORM_PATH}/intel/ace/lib/clk.c
-		${SOF_PLATFORM_PATH}/intel/ace/lib/dma.c
+		lib/pm_runtime.c
+		lib/clk.c
+		lib/dma.c
 	)
 
 	# SOF core infrastructure - runs on top of Zephyr

src/platform/intel/ace/lib/clk.c zephyr/lib/clk.csrc/platform/intel/ace/lib/clk.c renamed to zephyr/lib/clk.c

@@ -57,71 +57,7 @@ static FUNC_NORETURN void secondary_init(void *arg)
 	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
 }
 
-#ifndef CONFIG_ACE
-static int w_core_enable_mask = 0x1; /*Core 0 is always active*/
-
-int cpu_enable_core(int id)
-{
-	pm_runtime_get(PM_RUNTIME_DSP, PWRD_BY_TPLG | id);
-
-	/* only called from single core, no RMW lock */
-	__ASSERT_NO_MSG(cpu_get_id() == PLATFORM_PRIMARY_CORE_ID);
-
-	w_core_enable_mask |= BIT(id);
-
-	return 0;
-}
-
-int cpu_enable_secondary_core(int id)
-{
-	/*
-	 * This is an open-coded version of zephyr/kernel/smp.c
-	 * z_smp_start_cpu(). We do this, so we can use a customized
-	 * secondary_init() for SOF.
-	 */
-
-	if (arch_cpu_active(id))
-		return 0;
-
-#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE
-	z_init_cpu(id);
-#endif
-
-	atomic_clear(&start_flag);
-	atomic_clear(&ready_flag);
-
-	arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE,
-		       secondary_init, &start_flag);
-
-	while (!atomic_get(&ready_flag))
-		k_busy_wait(100);
-
-	atomic_set(&start_flag, 1);
-
-	return 0;
-}
-
-void cpu_disable_core(int id)
-{
-	/* TODO: call Zephyr API */
-
-	/* only called from single core, no RMW lock */
-	__ASSERT_NO_MSG(cpu_get_id() == PLATFORM_PRIMARY_CORE_ID);
-
-	w_core_enable_mask &= ~BIT(id);
-}
-
-int cpu_is_core_enabled(int id)
-{
-	return w_core_enable_mask & BIT(id);
-}
-
-int cpu_enabled_cores(void)
-{
-	return w_core_enable_mask;
-}
-
-#else /* CONFIG_ACE */
+#if CONFIG_ZEPHYR_NATIVE_DRIVERS
 #include <sof/trace/trace.h>
 #include <rtos/wait.h>
 #include <zephyr/pm/pm.h>
@@ -217,7 +153,70 @@ int cpu_enabled_cores(void)
 
 	return mask;
 }
-#endif /* CONFIG_ACE */
+#else
+static int w_core_enable_mask = 0x1; /*Core 0 is always active*/
+
+int cpu_enable_core(int id)
+{
+	pm_runtime_get(PM_RUNTIME_DSP, PWRD_BY_TPLG | id);
+
+	/* only called from single core, no RMW lock */
+	__ASSERT_NO_MSG(cpu_get_id() == PLATFORM_PRIMARY_CORE_ID);
+
+	w_core_enable_mask |= BIT(id);
+
+	return 0;
+}
+
+int cpu_enable_secondary_core(int id)
+{
+	/*
+	 * This is an open-coded version of zephyr/kernel/smp.c
+	 * z_smp_start_cpu(). We do this, so we can use a customized
+	 * secondary_init() for SOF.
+	 */
+
+	if (arch_cpu_active(id))
+		return 0;
+
+#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE
+	z_init_cpu(id);
+#endif
+
+	atomic_clear(&start_flag);
+	atomic_clear(&ready_flag);
+
+	arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE,
+		       secondary_init, &start_flag);
+
+	while (!atomic_get(&ready_flag))
+		k_busy_wait(100);
+
+	atomic_set(&start_flag, 1);
+
+	return 0;
+}
+
+void cpu_disable_core(int id)
+{
+	/* TODO: call Zephyr API */
+
+	/* only called from single core, no RMW lock */
+	__ASSERT_NO_MSG(cpu_get_id() == PLATFORM_PRIMARY_CORE_ID);
+
+	w_core_enable_mask &= ~BIT(id);
+}
+
+int cpu_is_core_enabled(int id)
+{
+	return w_core_enable_mask & BIT(id);
+}
+
+int cpu_enabled_cores(void)
+{
+	return w_core_enable_mask;
+}
+#endif /* CONFIG_ZEPHYR_NATIVE_DRIVERS */
 
 void cpu_power_down_core(uint32_t flags)
 {

zephyr/lib/cpu.c

@@ -9,8 +9,6 @@
 #include <user/trace.h>
 #include <sof_versions.h>
 #include <stdint.h>
-
-#include <adsp_boot.h>
 #include <zephyr/pm/policy.h>
 
 LOG_MODULE_REGISTER(power, CONFIG_SOF_LOG_LEVEL);
@@ -89,9 +87,6 @@ void platform_pm_runtime_disable(uint32_t context, uint32_t index)
 	case PM_RUNTIME_DSP:
 		tr_dbg(&power_tr, "putting prevent on d0i3");
 		pm_policy_state_lock_get(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
-		/* Disable power gating when preventing */
-		DSPCS.bootctl[PLATFORM_PRIMARY_CORE_ID].bctl |=
-			DSPBR_BCTL_WAITIPCG | DSPBR_BCTL_WAITIPPG;
 		break;
 	default:
 		break;