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Merge branch 'asoc-4.18' into asoc-next
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Qualcomm APR (Asynchronous Packet Router) binding
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This binding describes the Qualcomm APR. APR is a IPC protocol for
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communication between Application processor and QDSP. APR is mainly
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used for audio/voice services on the QDSP.
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- compatible:
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Usage: required
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Value type: <stringlist>
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Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2"
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- reg
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Usage: required
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Value type: <u32>
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Definition: Destination processor ID.
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Possible values are :
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1 - APR simulator
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2 - PC
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3 - MODEM
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4 - ADSP
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5 - APPS
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6 - MODEM2
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7 - APPS2
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= APR SERVICES
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Each subnode of the APR node represents service tied to this apr. The name
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of the nodes are not important. The properties of these nodes are defined
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by the individual bindings for the specific service
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- All APR services MUST contain the following property:
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- reg
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Usage: required
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Value type: <u32>
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Definition: APR Service ID
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Possible values are :
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3 - DSP Core Service
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4 - Audio Front End Service.
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5 - Voice Stream Manager Service.
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6 - Voice processing manager.
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7 - Audio Stream Manager Service.
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8 - Audio Device Manager Service.
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9 - Multimode voice manager.
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10 - Core voice stream.
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11 - Core voice processor.
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12 - Ultrasound stream manager.
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13 - Listen stream manager.
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= EXAMPLE
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The following example represents a QDSP based sound card on a MSM8996 device
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which uses apr as communication between Apps and QDSP.
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apr@4 {
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compatible = "qcom,apr-v2";
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reg = <APR_DOMAIN_ADSP>;
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q6core@3 {
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compatible = "qcom,q6core";
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reg = <APR_SVC_ADSP_CORE>;
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};
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q6afe@4 {
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compatible = "qcom,q6afe";
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reg = <APR_SVC_AFE>;
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dais {
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#sound-dai-cells = <1>;
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hdmi@1 {
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reg = <1>;
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};
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};
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};
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q6asm@7 {
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compatible = "qcom,q6asm";
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reg = <APR_SVC_ASM>;
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...
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};
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q6adm@8 {
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compatible = "qcom,q6adm";
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reg = <APR_SVC_ADM>;
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...
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};
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};
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Analog Devices SSM2305 Speaker Amplifier
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========================================
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Required properties:
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- compatible : "adi,ssm2305"
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- shutdown-gpios : The gpio connected to the shutdown pin.
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The gpio signal is ACTIVE_LOW.
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Example:
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ssm2305: analog-amplifier {
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compatible = "adi,ssm2305";
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shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
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};
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* Atmel I2S controller
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Required properties:
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- compatible: Should be "atmel,sama5d2-i2s".
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- reg: Should be the physical base address of the controller and the
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length of memory mapped region.
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- interrupts: Should contain the interrupt for the controller.
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- dmas: Should be one per channel name listed in the dma-names property,
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as described in atmel-dma.txt and dma.txt files.
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- dma-names: Two dmas have to be defined, "tx" and "rx".
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This IP also supports one shared channel for both rx and tx;
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if this mode is used, one "rx-tx" name must be used.
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- clocks: Must contain an entry for each entry in clock-names.
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Please refer to clock-bindings.txt.
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- clock-names: Should be one of each entry matching the clocks phandles list:
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- "pclk" (peripheral clock) Required.
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- "gclk" (generated clock) Optional (1).
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- "aclk" (Audio PLL clock) Optional (1).
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- "muxclk" (I2S mux clock) Optional (1).
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Optional properties:
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- pinctrl-0: Should specify pin control groups used for this controller.
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- princtrl-names: Should contain only one value - "default".
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(1) : Only the peripheral clock is required. The generated clock, the Audio
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PLL clock adn the I2S mux clock are optional and should only be set
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together, when Master Mode is required.
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Example:
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i2s@f8050000 {
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compatible = "atmel,sama5d2-i2s";
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reg = <0xf8050000 0x300>;
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interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
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dmas = <&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(31))>,
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<&dma0
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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AT91_XDMAC_DT_PERID(32))>;
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dma-names = "tx", "rx";
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clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>;
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clock-names = "pclk", "gclk", "aclk", "muxclk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2s0_default>;
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};

Documentation/devicetree/bindings/sound/cs42xx8.txt

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Example:
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codec: cs42888@48 {
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cs42888: codec@48 {
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compatible = "cirrus,cs42888";
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reg = <0x48>;
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clocks = <&codec_mclk 0>;

Documentation/devicetree/bindings/sound/fsl,asrc.txt

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it. This property is optional depending on the SoC
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design.
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- big-endian : If this property is absent, the little endian mode
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will be in use as default. Otherwise, the big endian
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mode will be in use for all the device registers.
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- fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends.
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- fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends.
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Optional properties:
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- big-endian : If this property is absent, the little endian mode
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will be in use as default. Otherwise, the big endian
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mode will be in use for all the device registers.
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Example:
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asrc: asrc@2034000 {

Documentation/devicetree/bindings/sound/fsl,esai.txt

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means all the settings for Receiving would be
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duplicated from Transmition related registers.
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Optional properties:
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- big-endian : If this property is absent, the native endian mode
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will be in use as default, or the big endian mode
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will be in use for all the device registers.

Documentation/devicetree/bindings/sound/fsl,spdif.txt

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it. This property is optional depending on the SoC
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design.
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Optional properties:
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- big-endian : If this property is absent, the native endian mode
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will be in use as default, or the big endian mode
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will be in use for all the device registers.

Documentation/devicetree/bindings/sound/fsl-sai.txt

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pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
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for details of the property values.
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- big-endian : Boolean property, required if all the FTM_PWM
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registers are big-endian rather than little-endian.
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- lsb-first : Configures whether the LSB or the MSB is transmitted
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first for the fifo data. If this property is absent,
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the MSB is transmitted first as default, or the LSB
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receive data by following their own bit clocks and
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frame sync clocks separately.
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Optional properties:
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- big-endian : Boolean property, required if all the SAI
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registers are big-endian rather than little-endian.
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Optional properties (for mx6ul):
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- fsl,sai-mclk-direction-output: This is a boolean property. If present,

Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt

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Mediatek AFE PCM controller for mt2701
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Required properties:
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- compatible = "mediatek,mt2701-audio";
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- compatible: should be one of the followings.
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- "mediatek,mt2701-audio"
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- "mediatek,mt7622-audio"
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- interrupts: should contain AFE and ASYS interrupts
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- interrupt-names: should be "afe" and "asys"
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- power-domains: should define the power domain
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Mediatek MT6351 Audio Codec
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The communication between MT6351 and SoC is through Mediatek PMIC wrapper.
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For more detail, please visit Mediatek PMIC wrapper documentation.
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Must be a child node of PMIC wrapper.
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Required properties:
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- compatible : "mediatek,mt6351-sound".
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Example:
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mt6351_snd {
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compatible = "mediatek,mt6351-sound";
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};

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