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Introduction of arm_boards crate & GIC driver fixes #915

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merged 23 commits into from
Apr 4, 2023

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NathanRoyer
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This PR brings the following changes:

  • arm_boards crate: Per-board definitions for AArch64 builds - currently the number of CPUs, their IDs, and the interrupt controller configuration including one GIC redistributor base address per core (motivation for this PR)
  • the gic crate was modified to use this
  • the redistributor initialization code now enables the dispatch of "1 of N"-distributed SPIs (motivation for this PR)
  • the redistributors of all cores are now initialized by the bootstrap processor as part of interrupts::init
  • the distributor initialization code makes sure that asleep CPU cores can be selected for "1 of N"-distributed SPIs
  • multicore_bringup uses the list of CpuIds from arm_boards (no longer bruteforcing them)
  • some conversions in cpu were made const
  • Bump vte dependency in text-terminal so that gic can use version 0.7.2 of arrayvec (used during initialization)

Two changes were directly imported from #910:

  • Fix a bug in get_spi_target & set_spi_target where an atomic u32 R/W was used to manipulate a u64 MMIO register
  • Introduce Offset32 & Offset64 types to distinguish 32b & 64b registers

All in all, this fixes the problems discovered via discussion on #910 (some conditions for "1 of N" distribution of SPIs were not asserted).

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Solid. Only two suggestions :)

kernel/gic/src/gic/mod.rs Outdated Show resolved Hide resolved
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kernel/text_terminal/Cargo.toml Outdated Show resolved Hide resolved
kernel/gic/src/gic/redist_interface.rs Show resolved Hide resolved
kernel/gic/src/gic/mod.rs Outdated Show resolved Hide resolved
kernel/gic/src/gic/mod.rs Outdated Show resolved Hide resolved
kernel/arm_boards/Cargo.toml Outdated Show resolved Hide resolved
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kernel/arm_boards/src/qemu_virt.rs Outdated Show resolved Hide resolved
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@kevinaboos kevinaboos merged commit d2ed7ac into theseus-os:theseus_main Apr 4, 2023
github-actions bot pushed a commit that referenced this pull request Apr 4, 2023
* New `arm_boards` crate: per-board definitions for aarch64 builds
  * The default is for QEMU's basic `virt` machine spec.
  * Currently, this specifies the number of CPUs, their IDs, and
    the interrupt controller configuration including one GIC
    redistributor base address per core.
  * The `gic` crate now uses this instead of defining its own
    internal configuration values specific to QEMU.
  * `multicore_bringup` now uses the list of `CpuId`s from
    the selected ARM board configuration.

* The redistributor initialization routine code now enables
  the dispatch of "1 of N"-distributed SPIs.
  * All CPUs' redistributors are now initialized by the
    bootstrap processor as part of `interrupts::init()`.

* Incorporates two fixes from #910:
  * Fix a bug in `get_spi_target` & `set_spi_target` where
    an atomic u32 read/write was used to manipulate a
    u64 MMIO register.
  * Introduce `Offset32` and `Offset64` types to distinguish
    32-bit and 64-bit registers more clearly.

Co-authored-by: Kevin Boos <kevinaboos@gmail.com> d2ed7ac
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3 participants