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Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: pch_irq_handler -> {ibx, cpt}_irq_handler char/agp: add another Ironlake host bridge drm/i915: fix up ivb plane 3 pageflips drm/i915: hold forcewake around ring hw init drm/i915: Mark the ringbuffers as being in the GTT domain drm/i915/crt: Do not rely upon the HPD presence pin drm/i915: Reset last_retired_head when resetting ring
2 parents 7aaa61b + 23e81d6 commit 6cf98d6

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9 files changed

+130
-17
lines changed

9 files changed

+130
-17
lines changed

drivers/char/agp/intel-agp.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -898,6 +898,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
898898
ID(PCI_DEVICE_ID_INTEL_B43_HB),
899899
ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
900900
ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
901+
ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB),
901902
ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
902903
ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
903904
ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),

drivers/char/agp/intel-agp.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,7 @@
212212
#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
213213
#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
214214
#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040
215+
#define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB 0x0069
215216
#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042
216217
#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044
217218
#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062

drivers/gpu/drm/i915/i915_drv.c

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -233,6 +233,7 @@ static const struct intel_device_info intel_sandybridge_d_info = {
233233
.has_blt_ring = 1,
234234
.has_llc = 1,
235235
.has_pch_split = 1,
236+
.has_force_wake = 1,
236237
};
237238

238239
static const struct intel_device_info intel_sandybridge_m_info = {
@@ -243,6 +244,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
243244
.has_blt_ring = 1,
244245
.has_llc = 1,
245246
.has_pch_split = 1,
247+
.has_force_wake = 1,
246248
};
247249

248250
static const struct intel_device_info intel_ivybridge_d_info = {
@@ -252,6 +254,7 @@ static const struct intel_device_info intel_ivybridge_d_info = {
252254
.has_blt_ring = 1,
253255
.has_llc = 1,
254256
.has_pch_split = 1,
257+
.has_force_wake = 1,
255258
};
256259

257260
static const struct intel_device_info intel_ivybridge_m_info = {
@@ -262,6 +265,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
262265
.has_blt_ring = 1,
263266
.has_llc = 1,
264267
.has_pch_split = 1,
268+
.has_force_wake = 1,
265269
};
266270

267271
static const struct intel_device_info intel_valleyview_m_info = {
@@ -289,6 +293,7 @@ static const struct intel_device_info intel_haswell_d_info = {
289293
.has_blt_ring = 1,
290294
.has_llc = 1,
291295
.has_pch_split = 1,
296+
.has_force_wake = 1,
292297
};
293298

294299
static const struct intel_device_info intel_haswell_m_info = {
@@ -298,6 +303,7 @@ static const struct intel_device_info intel_haswell_m_info = {
298303
.has_blt_ring = 1,
299304
.has_llc = 1,
300305
.has_pch_split = 1,
306+
.has_force_wake = 1,
301307
};
302308

303309
static const struct pci_device_id pciidlist[] = { /* aka */
@@ -1139,10 +1145,9 @@ MODULE_LICENSE("GPL and additional rights");
11391145

11401146
/* We give fast paths for the really cool registers */
11411147
#define NEEDS_FORCE_WAKE(dev_priv, reg) \
1142-
(((dev_priv)->info->gen >= 6) && \
1143-
((reg) < 0x40000) && \
1144-
((reg) != FORCEWAKE)) && \
1145-
(!IS_VALLEYVIEW((dev_priv)->dev))
1148+
((HAS_FORCE_WAKE((dev_priv)->dev)) && \
1149+
((reg) < 0x40000) && \
1150+
((reg) != FORCEWAKE))
11461151

11471152
#define __i915_read(x, y) \
11481153
u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \

drivers/gpu/drm/i915/i915_drv.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -285,6 +285,7 @@ struct intel_device_info {
285285
u8 is_ivybridge:1;
286286
u8 is_valleyview:1;
287287
u8 has_pch_split:1;
288+
u8 has_force_wake:1;
288289
u8 is_haswell:1;
289290
u8 has_fbc:1;
290291
u8 has_pipe_cxsr:1;
@@ -1101,6 +1102,8 @@ struct drm_i915_file_private {
11011102
#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
11021103
#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
11031104

1105+
#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
1106+
11041107
#include "i915_trace.h"
11051108

11061109
/**

drivers/gpu/drm/i915/i915_irq.c

Lines changed: 35 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -510,7 +510,7 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
510510
return ret;
511511
}
512512

513-
static void pch_irq_handler(struct drm_device *dev, u32 pch_iir)
513+
static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
514514
{
515515
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
516516
int pipe;
@@ -550,6 +550,35 @@ static void pch_irq_handler(struct drm_device *dev, u32 pch_iir)
550550
DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");
551551
}
552552

553+
static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
554+
{
555+
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
556+
int pipe;
557+
558+
if (pch_iir & SDE_AUDIO_POWER_MASK_CPT)
559+
DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",
560+
(pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
561+
SDE_AUDIO_POWER_SHIFT_CPT);
562+
563+
if (pch_iir & SDE_AUX_MASK_CPT)
564+
DRM_DEBUG_DRIVER("AUX channel interrupt\n");
565+
566+
if (pch_iir & SDE_GMBUS_CPT)
567+
DRM_DEBUG_DRIVER("PCH GMBUS interrupt\n");
568+
569+
if (pch_iir & SDE_AUDIO_CP_REQ_CPT)
570+
DRM_DEBUG_DRIVER("Audio CP request interrupt\n");
571+
572+
if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
573+
DRM_DEBUG_DRIVER("Audio CP change interrupt\n");
574+
575+
if (pch_iir & SDE_FDI_MASK_CPT)
576+
for_each_pipe(pipe)
577+
DRM_DEBUG_DRIVER(" pipe %c FDI IIR: 0x%08x\n",
578+
pipe_name(pipe),
579+
I915_READ(FDI_RX_IIR(pipe)));
580+
}
581+
553582
static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
554583
{
555584
struct drm_device *dev = (struct drm_device *) arg;
@@ -591,7 +620,7 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
591620

592621
if (pch_iir & SDE_HOTPLUG_MASK_CPT)
593622
queue_work(dev_priv->wq, &dev_priv->hotplug_work);
594-
pch_irq_handler(dev, pch_iir);
623+
cpt_irq_handler(dev, pch_iir);
595624

596625
/* clear PCH hotplug event before clear CPU irq */
597626
I915_WRITE(SDEIIR, pch_iir);
@@ -684,7 +713,10 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
684713
if (de_iir & DE_PCH_EVENT) {
685714
if (pch_iir & hotplug_mask)
686715
queue_work(dev_priv->wq, &dev_priv->hotplug_work);
687-
pch_irq_handler(dev, pch_iir);
716+
if (HAS_PCH_CPT(dev))
717+
cpt_irq_handler(dev, pch_iir);
718+
else
719+
ibx_irq_handler(dev, pch_iir);
688720
}
689721

690722
if (de_iir & DE_PCU_EVENT) {

drivers/gpu/drm/i915/i915_reg.h

Lines changed: 40 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,14 @@
210210
#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
211211
#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
212212
#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
213+
/* IVB has funny definitions for which plane to flip. */
214+
#define MI_DISPLAY_FLIP_IVB_PLANE_A (0 << 19)
215+
#define MI_DISPLAY_FLIP_IVB_PLANE_B (1 << 19)
216+
#define MI_DISPLAY_FLIP_IVB_SPRITE_A (2 << 19)
217+
#define MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19)
218+
#define MI_DISPLAY_FLIP_IVB_PLANE_C (4 << 19)
219+
#define MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19)
220+
213221
#define MI_SET_CONTEXT MI_INSTR(0x18, 0)
214222
#define MI_MM_SPACE_GTT (1<<8)
215223
#define MI_MM_SPACE_PHYSICAL (0<<8)
@@ -3313,7 +3321,7 @@
33133321

33143322
/* PCH */
33153323

3316-
/* south display engine interrupt */
3324+
/* south display engine interrupt: IBX */
33173325
#define SDE_AUDIO_POWER_D (1 << 27)
33183326
#define SDE_AUDIO_POWER_C (1 << 26)
33193327
#define SDE_AUDIO_POWER_B (1 << 25)
@@ -3349,15 +3357,44 @@
33493357
#define SDE_TRANSA_CRC_ERR (1 << 1)
33503358
#define SDE_TRANSA_FIFO_UNDER (1 << 0)
33513359
#define SDE_TRANS_MASK (0x3f)
3352-
/* CPT */
3353-
#define SDE_CRT_HOTPLUG_CPT (1 << 19)
3360+
3361+
/* south display engine interrupt: CPT/PPT */
3362+
#define SDE_AUDIO_POWER_D_CPT (1 << 31)
3363+
#define SDE_AUDIO_POWER_C_CPT (1 << 30)
3364+
#define SDE_AUDIO_POWER_B_CPT (1 << 29)
3365+
#define SDE_AUDIO_POWER_SHIFT_CPT 29
3366+
#define SDE_AUDIO_POWER_MASK_CPT (7 << 29)
3367+
#define SDE_AUXD_CPT (1 << 27)
3368+
#define SDE_AUXC_CPT (1 << 26)
3369+
#define SDE_AUXB_CPT (1 << 25)
3370+
#define SDE_AUX_MASK_CPT (7 << 25)
33543371
#define SDE_PORTD_HOTPLUG_CPT (1 << 23)
33553372
#define SDE_PORTC_HOTPLUG_CPT (1 << 22)
33563373
#define SDE_PORTB_HOTPLUG_CPT (1 << 21)
3374+
#define SDE_CRT_HOTPLUG_CPT (1 << 19)
33573375
#define SDE_HOTPLUG_MASK_CPT (SDE_CRT_HOTPLUG_CPT | \
33583376
SDE_PORTD_HOTPLUG_CPT | \
33593377
SDE_PORTC_HOTPLUG_CPT | \
33603378
SDE_PORTB_HOTPLUG_CPT)
3379+
#define SDE_GMBUS_CPT (1 << 17)
3380+
#define SDE_AUDIO_CP_REQ_C_CPT (1 << 10)
3381+
#define SDE_AUDIO_CP_CHG_C_CPT (1 << 9)
3382+
#define SDE_FDI_RXC_CPT (1 << 8)
3383+
#define SDE_AUDIO_CP_REQ_B_CPT (1 << 6)
3384+
#define SDE_AUDIO_CP_CHG_B_CPT (1 << 5)
3385+
#define SDE_FDI_RXB_CPT (1 << 4)
3386+
#define SDE_AUDIO_CP_REQ_A_CPT (1 << 2)
3387+
#define SDE_AUDIO_CP_CHG_A_CPT (1 << 1)
3388+
#define SDE_FDI_RXA_CPT (1 << 0)
3389+
#define SDE_AUDIO_CP_REQ_CPT (SDE_AUDIO_CP_REQ_C_CPT | \
3390+
SDE_AUDIO_CP_REQ_B_CPT | \
3391+
SDE_AUDIO_CP_REQ_A_CPT)
3392+
#define SDE_AUDIO_CP_CHG_CPT (SDE_AUDIO_CP_CHG_C_CPT | \
3393+
SDE_AUDIO_CP_CHG_B_CPT | \
3394+
SDE_AUDIO_CP_CHG_A_CPT)
3395+
#define SDE_FDI_MASK_CPT (SDE_FDI_RXC_CPT | \
3396+
SDE_FDI_RXB_CPT | \
3397+
SDE_FDI_RXA_CPT)
33613398

33623399
#define SDEISR 0xc4000
33633400
#define SDEIMR 0xc4004

drivers/gpu/drm/i915/intel_crt.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -453,13 +453,15 @@ intel_crt_detect(struct drm_connector *connector, bool force)
453453
struct intel_load_detect_pipe tmp;
454454

455455
if (I915_HAS_HOTPLUG(dev)) {
456+
/* We can not rely on the HPD pin always being correctly wired
457+
* up, for example many KVM do not pass it through, and so
458+
* only trust an assertion that the monitor is connected.
459+
*/
456460
if (intel_crt_detect_hotplug(connector)) {
457461
DRM_DEBUG_KMS("CRT detected via hotplug\n");
458462
return connector_status_connected;
459-
} else {
463+
} else
460464
DRM_DEBUG_KMS("CRT not detected via hotplug\n");
461-
return connector_status_disconnected;
462-
}
463465
}
464466

465467
if (intel_crt_detect_ddc(connector))

drivers/gpu/drm/i915/intel_display.c

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6158,17 +6158,34 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
61586158
struct drm_i915_private *dev_priv = dev->dev_private;
61596159
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
61606160
struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
6161+
uint32_t plane_bit = 0;
61616162
int ret;
61626163

61636164
ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
61646165
if (ret)
61656166
goto err;
61666167

6168+
switch(intel_crtc->plane) {
6169+
case PLANE_A:
6170+
plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A;
6171+
break;
6172+
case PLANE_B:
6173+
plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B;
6174+
break;
6175+
case PLANE_C:
6176+
plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C;
6177+
break;
6178+
default:
6179+
WARN_ONCE(1, "unknown plane in flip command\n");
6180+
ret = -ENODEV;
6181+
goto err;
6182+
}
6183+
61676184
ret = intel_ring_begin(ring, 4);
61686185
if (ret)
61696186
goto err_unpin;
61706187

6171-
intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
6188+
intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
61726189
intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
61736190
intel_ring_emit(ring, (obj->gtt_offset));
61746191
intel_ring_emit(ring, (MI_NOOP));

drivers/gpu/drm/i915/intel_ringbuffer.c

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -266,10 +266,15 @@ u32 intel_ring_get_active_head(struct intel_ring_buffer *ring)
266266

267267
static int init_ring_common(struct intel_ring_buffer *ring)
268268
{
269-
drm_i915_private_t *dev_priv = ring->dev->dev_private;
269+
struct drm_device *dev = ring->dev;
270+
drm_i915_private_t *dev_priv = dev->dev_private;
270271
struct drm_i915_gem_object *obj = ring->obj;
272+
int ret = 0;
271273
u32 head;
272274

275+
if (HAS_FORCE_WAKE(dev))
276+
gen6_gt_force_wake_get(dev_priv);
277+
273278
/* Stop the ring if it's running. */
274279
I915_WRITE_CTL(ring, 0);
275280
I915_WRITE_HEAD(ring, 0);
@@ -317,7 +322,8 @@ static int init_ring_common(struct intel_ring_buffer *ring)
317322
I915_READ_HEAD(ring),
318323
I915_READ_TAIL(ring),
319324
I915_READ_START(ring));
320-
return -EIO;
325+
ret = -EIO;
326+
goto out;
321327
}
322328

323329
if (!drm_core_check_feature(ring->dev, DRIVER_MODESET))
@@ -326,9 +332,14 @@ static int init_ring_common(struct intel_ring_buffer *ring)
326332
ring->head = I915_READ_HEAD(ring);
327333
ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
328334
ring->space = ring_space(ring);
335+
ring->last_retired_head = -1;
329336
}
330337

331-
return 0;
338+
out:
339+
if (HAS_FORCE_WAKE(dev))
340+
gen6_gt_force_wake_put(dev_priv);
341+
342+
return ret;
332343
}
333344

334345
static int
@@ -987,6 +998,10 @@ static int intel_init_ring_buffer(struct drm_device *dev,
987998
if (ret)
988999
goto err_unref;
9891000

1001+
ret = i915_gem_object_set_to_gtt_domain(obj, true);
1002+
if (ret)
1003+
goto err_unpin;
1004+
9901005
ring->virtual_start = ioremap_wc(dev->agp->base + obj->gtt_offset,
9911006
ring->size);
9921007
if (ring->virtual_start == NULL) {

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