diff --git a/src/plugins/intel_cpu/src/cpu_memory.cpp b/src/plugins/intel_cpu/src/cpu_memory.cpp index 9bc1e458c272bf..6e2df2ba7b647b 100644 --- a/src/plugins/intel_cpu/src/cpu_memory.cpp +++ b/src/plugins/intel_cpu/src/cpu_memory.cpp @@ -49,7 +49,7 @@ namespace { if (!ftz) { return; } - if (src.getDesc().getPrecision() != Precision::FP32 || dst.getDesc().getPrecision() == Precision::BF16) { + if (src.getDesc().getPrecision() != ov::element::f32 || dst.getDesc().getPrecision() == ov::element::bf16) { return; } size_t offset = 0; diff --git a/src/plugins/intel_cpu/src/cpu_memory.h b/src/plugins/intel_cpu/src/cpu_memory.h index 373c14851f482d..3ef369426daf15 100644 --- a/src/plugins/intel_cpu/src/cpu_memory.h +++ b/src/plugins/intel_cpu/src/cpu_memory.h @@ -17,7 +17,6 @@ #include #include #include -#include /** * @file contains a concept classes to work with memory/tensor/blob abstractions on plugin level. @@ -187,7 +186,7 @@ class IMemory { //oneDNN specifics for backward compatibility virtual dnnl::memory getPrimitive() const = 0; dnnl::memory::data_type getDataType() const { - return DnnlExtensionUtils::IEPrecisionToDataType(getDesc().getPrecision()); + return DnnlExtensionUtils::ElementTypeToDataType(getDesc().getPrecision()); } virtual void nullify() = 0; diff --git a/src/plugins/intel_cpu/src/cpu_tensor.cpp b/src/plugins/intel_cpu/src/cpu_tensor.cpp index 815edd93099749..d8313533dfec1c 100644 --- a/src/plugins/intel_cpu/src/cpu_tensor.cpp +++ b/src/plugins/intel_cpu/src/cpu_tensor.cpp @@ -17,7 +17,7 @@ Tensor::Tensor(MemoryPtr memptr) : m_memptr{memptr} { auto memdesc = m_memptr->getDescPtr(); OPENVINO_ASSERT(memdesc->hasLayoutType(LayoutType::ncsp), "intel_cpu::Tensor only supports memory with ncsp layout."); - m_element_type = InferenceEngine::details::convertPrecision(memdesc->getPrecision()); + m_element_type = memdesc->getPrecision(); } void Tensor::set_shape(ov::Shape new_shape) { diff --git a/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp b/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp index 60e6d31209944f..b22903bd47f36a 100644 --- a/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp +++ b/src/plugins/intel_cpu/src/dnnl_extension_utils.cpp @@ -42,63 +42,63 @@ uint8_t DnnlExtensionUtils::sizeOfDataType(dnnl::memory::data_type dataType) { } } -memory::data_type DnnlExtensionUtils::IEPrecisionToDataType(const InferenceEngine::Precision& prec) { - switch (prec) { - case InferenceEngine::Precision::FP32: +dnnl::memory::data_type DnnlExtensionUtils::ElementTypeToDataType(const ov::element::Type& elementType) { + switch (elementType) { + case ov::element::f32: return memory::data_type::f32; - case InferenceEngine::Precision::I32: + case ov::element::i32: return memory::data_type::s32; - case InferenceEngine::Precision::BF16: + case ov::element::bf16: return memory::data_type::bf16; - case InferenceEngine::Precision::I8: + case ov::element::i8: return memory::data_type::s8; - case InferenceEngine::Precision::U8: - case InferenceEngine::Precision::BOOL: + case ov::element::u8: + case ov::element::boolean: return memory::data_type::u8; - case InferenceEngine::Precision::BIN: + case ov::element::u1: return memory::data_type::bin; - case InferenceEngine::Precision::FP16: + case ov::element::f16: return memory::data_type::f16; - case InferenceEngine::Precision::NF4: + case ov::element::nf4: return memory::data_type::nf4; - case InferenceEngine::Precision::I4: + case ov::element::i4: return memory::data_type::s4; - case InferenceEngine::Precision::U4: + case ov::element::u4: return memory::data_type::u4; - case InferenceEngine::Precision::UNSPECIFIED: + case ov::element::undefined: return memory::data_type::undef; default: { - OPENVINO_THROW("The plugin does not support ", prec.name()); + OPENVINO_THROW("The plugin does not support ", elementType.to_string()); } } } -InferenceEngine::Precision DnnlExtensionUtils::DataTypeToIEPrecision(memory::data_type dataType) { +ov::element::Type DnnlExtensionUtils::DataTypeToElementType(const dnnl::memory::data_type& dataType) { switch (dataType) { case memory::data_type::f32: - return InferenceEngine::Precision::FP32; + return ov::element::f32; case memory::data_type::s32: - return InferenceEngine::Precision::I32; + return ov::element::i32; case memory::data_type::bf16: - return InferenceEngine::Precision::BF16; + return ov::element::bf16; case memory::data_type::s8: - return InferenceEngine::Precision::I8; + return ov::element::i8; case memory::data_type::u8: - return InferenceEngine::Precision::U8; + return ov::element::u8; case memory::data_type::bin: - return InferenceEngine::Precision::BIN; + return ov::element::u1; case memory::data_type::f16: - return InferenceEngine::Precision::FP16; + return ov::element::f16; case memory::data_type::f64: - return InferenceEngine::Precision::FP64; + return ov::element::f64; case memory::data_type::nf4: - return InferenceEngine::Precision::NF4; + return ov::element::nf4; case memory::data_type::s4: - return InferenceEngine::Precision::I4; + return ov::element::i4; case memory::data_type::u4: - return InferenceEngine::Precision::U4; + return ov::element::u4; case memory::data_type::undef: - return InferenceEngine::Precision::UNSPECIFIED; + return ov::element::undefined; default: { OPENVINO_THROW("Unsupported data type."); } diff --git a/src/plugins/intel_cpu/src/dnnl_extension_utils.h b/src/plugins/intel_cpu/src/dnnl_extension_utils.h index 8d557fed5d7738..8798e6a9ab244a 100644 --- a/src/plugins/intel_cpu/src/dnnl_extension_utils.h +++ b/src/plugins/intel_cpu/src/dnnl_extension_utils.h @@ -23,8 +23,8 @@ class DnnlMemoryDesc; class DnnlExtensionUtils { public: static uint8_t sizeOfDataType(dnnl::memory::data_type dataType); - static dnnl::memory::data_type IEPrecisionToDataType(const InferenceEngine::Precision& prec); - static InferenceEngine::Precision DataTypeToIEPrecision(dnnl::memory::data_type dataType); + static dnnl::memory::data_type ElementTypeToDataType(const ov::element::Type& elementType); + static ov::element::Type DataTypeToElementType(const dnnl::memory::data_type& dataType); static Dim convertToDim(const dnnl::memory::dim &dim); static dnnl::memory::dim convertToDnnlDim(const Dim &dim); static VectorDims convertToVectorDims(const dnnl::memory::dims& dims); diff --git a/src/plugins/intel_cpu/src/dnnl_postops_composer.cpp b/src/plugins/intel_cpu/src/dnnl_postops_composer.cpp index 34bec86aca6c5c..ad9b547f7b6cd1 100644 --- a/src/plugins/intel_cpu/src/dnnl_postops_composer.cpp +++ b/src/plugins/intel_cpu/src/dnnl_postops_composer.cpp @@ -58,7 +58,7 @@ void DnnlPostOpsComposer::updateWeiScales() { DEBUG_LOG("Set weight scales mask ", "DNNL_ARG: ", DNNL_ARG_WEIGHTS, " mask: ", wei_scale_mask); attr.set_scales_mask(DNNL_ARG_WEIGHTS, wei_scale_mask); - DnnlBlockedMemoryDesc memoryDesc(InferenceEngine::Precision::FP32, Shape({wei_scale_values.size()})); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, Shape({wei_scale_values.size()})); auto mem = std::make_shared(engine, memoryDesc); memcpy(mem->getData(), wei_scale_values.data(), wei_scale_values.size() * sizeof(float)); args[DNNL_ARG_ATTR_SCALES | DNNL_ARG_WEIGHTS] = mem; @@ -71,7 +71,7 @@ void DnnlPostOpsComposer::updateDestScales() { DEBUG_LOG("Set dest scale mask ", "DNNL_ARG: ", DNNL_ARG_DST, " mask: ", 0); attr.set_scales_mask(DNNL_ARG_DST, 0); - DnnlBlockedMemoryDesc memoryDesc(InferenceEngine::Precision::FP32, Shape({1})); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, Shape({1})); auto mem = std::make_shared(engine, memoryDesc); memcpy(mem->getData(), &dst_scale_val, sizeof(float)); args[DNNL_ARG_ATTR_SCALES | DNNL_ARG_DST] = mem; @@ -86,7 +86,7 @@ void DnnlPostOpsComposer::appendBinary(const dnnl::algorithm alg, const std::vec DEBUG_LOG("Append binary post op with algorithm: ", convert_to_c(alg)); - DnnlBlockedMemoryDesc memoryDesc(InferenceEngine::Precision::FP32, Shape(*pdims)); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, Shape(*pdims)); ops.append_binary(alg, memoryDesc.getDnnlDesc()); // copy the data as args @@ -259,7 +259,7 @@ MemoryPtr DnnlPostOpsComposer::prepackDecompressionParams(const MemoryCPtr& para if (needTranspose) { VectorDims dnnlShape = {shape[0], shape[1]}; - DnnlBlockedMemoryDesc memoryDesc(InferenceEngine::Precision::FP32, Shape(dnnlShape)); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, Shape(dnnlShape)); mem = std::make_shared(engine, memoryDesc); auto memory_buf = static_cast(mem->getData()); @@ -271,7 +271,7 @@ MemoryPtr DnnlPostOpsComposer::prepackDecompressionParams(const MemoryCPtr& para } } else { VectorDims dnnlShape = {shape[shape.size() - 1], shape[0]}; - DnnlBlockedMemoryDesc memoryDesc(InferenceEngine::Precision::FP32, Shape(dnnlShape)); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, Shape(dnnlShape)); mem = std::make_shared(engine, memoryDesc); auto memory_buf = static_cast(mem->getData()); const size_t elements_count = std::accumulate(shape.begin(), shape.end(), 1, std::multiplies()); diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_bf16_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_bf16_emitters.hpp index 1a1e4c1d05548f..3b0b268eeb06ed 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_bf16_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_bf16_emitters.hpp @@ -12,7 +12,7 @@ namespace intel_cpu { class jit_uni_vcvtneps2bf16 : public jit_emitter { public: jit_uni_vcvtneps2bf16(dnnl::impl::cpu::x64::jit_generator* host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::BF16) : jit_emitter(host, host_isa, exec_prc) { + ov::element::Type exec_prc = ov::element::bf16) : jit_emitter(host, host_isa, exec_prc) { if (!dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core_bf16)) prepare_table(); } diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.cpp b/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.cpp index d2c4942d0b926d..b36c118189286c 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.cpp @@ -17,7 +17,7 @@ using namespace Xbyak; namespace ov { namespace intel_cpu { -jit_convert_emitter::jit_convert_emitter(jit_generator *host, cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_convert_emitter::jit_convert_emitter(jit_generator *host, cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { input_type = node->get_input_element_type(0); output_type = node->get_output_element_type(0); @@ -58,7 +58,7 @@ void jit_convert_emitter::float2bfloat(const std::vector &in_vec_idxs, c } jit_convert_truncation_emitter::jit_convert_truncation_emitter(jit_generator *host, cpu_isa_t host_isa, - const std::shared_ptr& node, Precision exec_prc) + const std::shared_ptr& node, ov::element::Type exec_prc) : jit_convert_emitter(host, host_isa, node, exec_prc) { prepare_table(); } @@ -193,7 +193,7 @@ void jit_convert_truncation_emitter::dword2int8(const std::vector &in_ve } jit_convert_saturation_emitter::jit_convert_saturation_emitter(jit_generator *host, cpu_isa_t host_isa, - const std::shared_ptr& node, Precision exec_prc) + const std::shared_ptr& node, ov::element::Type exec_prc) : jit_convert_emitter(host, host_isa, node, exec_prc) { } diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.hpp index c7c628cd69339d..908ed66f5f745b 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_conversion_emitters.hpp @@ -14,7 +14,7 @@ namespace intel_cpu { class jit_convert_emitter : public jit_emitter { public: jit_convert_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - const std::shared_ptr& n, InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + const std::shared_ptr& n, ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; @@ -47,7 +47,7 @@ class jit_convert_emitter : public jit_emitter { class jit_convert_truncation_emitter : public jit_convert_emitter { public: jit_convert_truncation_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - const std::shared_ptr& n, InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + const std::shared_ptr& n, ov::element::Type exec_prc = ov::element::f32); private: void emit_impl(const std::vector& in, const std::vector& out) const override; @@ -68,7 +68,7 @@ class jit_convert_truncation_emitter : public jit_convert_emitter { class jit_convert_saturation_emitter : public jit_convert_emitter { public: jit_convert_saturation_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - const std::shared_ptr& n, InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + const std::shared_ptr& n, ov::element::Type exec_prc = ov::element::f32); private: void emit_impl(const std::vector& in, const std::vector& out) const override; diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.cpp b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.cpp index 5097f034548716..2fa8206b0321d4 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.cpp @@ -17,7 +17,7 @@ std::set> jit_dnnl_emitter::get_supported_precisions( return {{element::f32}}; } -jit_dnnl_emitter::jit_dnnl_emitter(jit_generator *host, cpu_isa_t host_isa, const std::shared_ptr& node, InferenceEngine::Precision exec_prc) +jit_dnnl_emitter::jit_dnnl_emitter(jit_generator *host, cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { kind = dnnl_eltwise_tanh; @@ -29,7 +29,7 @@ jit_dnnl_emitter::jit_dnnl_emitter(jit_generator *host, cpu_isa_t host_isa, cons jit_dnnl_emitter::jit_dnnl_emitter(jit_generator *host, cpu_isa_t host_isa, dnnl_alg_kind_t algKind, float alpha, float beta, - InferenceEngine::Precision exec_prc) + ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc), kind(algKind), alpha(alpha), beta(beta) { set_injector(); @@ -85,7 +85,7 @@ void jit_dnnl_emitter::emit_data() const { jit_dnnl_aux_emitter::jit_dnnl_aux_emitter(jit_generator *host, cpu_isa_t host_isa, dnnl_alg_kind_t algKind, float inpAlpha, float inpBeta, - InferenceEngine::Precision exec_prc) + ov::element::Type exec_prc) : jit_dnnl_emitter(host, host_isa, algKind, inpAlpha, inpBeta, exec_prc) { } diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.hpp index 6213df7faba965..96cff2ac8441cb 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_emitters.hpp @@ -25,9 +25,9 @@ class jit_dnnl_emitter : public jit_emitter { protected: jit_dnnl_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, dnnl_alg_kind_t algKind, float inpAlpha, float inpBeta, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_dnnl_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); void set_injector(); dnnl_alg_kind_t kind {dnnl_alg_kind_undef}; @@ -46,7 +46,7 @@ class jit_dnnl_aux_emitter : public jit_dnnl_emitter { public: jit_dnnl_aux_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, dnnl_alg_kind_t algKind, float inpAlpha, float inpBeta, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); private: }; diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_ext_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_ext_emitters.hpp index 657d99cf8eca58..e33d0576b68697 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_ext_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_dnnl_ext_emitters.hpp @@ -14,7 +14,7 @@ namespace intel_cpu { class jit_relu_emitter : public jit_dnnl_emitter { public: jit_relu_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_relu; alpha = 0.f; @@ -27,7 +27,7 @@ class jit_relu_emitter : public jit_dnnl_emitter { class jit_sigmoid_emitter : public jit_dnnl_emitter { public: jit_sigmoid_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_logistic; alpha = 0.f; @@ -40,7 +40,7 @@ class jit_sigmoid_emitter : public jit_dnnl_emitter { class jit_tanh_emitter : public jit_dnnl_emitter { public: jit_tanh_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_tanh; alpha = 0.f; @@ -53,7 +53,7 @@ class jit_tanh_emitter : public jit_dnnl_emitter { class jit_elu_emitter : public jit_dnnl_emitter { public: jit_elu_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_elu; alpha = ov::as_type_ptr(n)->get_alpha(); @@ -66,7 +66,7 @@ class jit_elu_emitter : public jit_dnnl_emitter { class jit_exp_emitter : public jit_dnnl_emitter { public: jit_exp_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_exp; alpha = 0.f; @@ -79,7 +79,7 @@ class jit_exp_emitter : public jit_dnnl_emitter { class jit_abs_emitter : public jit_dnnl_emitter { public: jit_abs_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_abs; alpha = 0.f; @@ -92,7 +92,7 @@ class jit_abs_emitter : public jit_dnnl_emitter { class jit_clamp_emitter : public jit_dnnl_emitter { public: jit_clamp_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_clip; auto op = ov::as_type_ptr(n); @@ -106,7 +106,7 @@ class jit_clamp_emitter : public jit_dnnl_emitter { class jit_swish_emitter : public jit_dnnl_emitter { public: jit_swish_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_swish; auto op = ov::as_type_ptr(n); @@ -120,7 +120,7 @@ class jit_swish_emitter : public jit_dnnl_emitter { class jit_hswish_emitter : public jit_dnnl_emitter { public: jit_hswish_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { // since v3.0 oneDNN has flexible version of hardswish, ov still uses the one with hardcoded alpha and beta kind = dnnl_eltwise_hardswish; @@ -134,7 +134,7 @@ class jit_hswish_emitter : public jit_dnnl_emitter { class jit_gelu_v0_emitter : public jit_dnnl_emitter { public: jit_gelu_v0_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { kind = dnnl_eltwise_gelu_erf; @@ -145,7 +145,7 @@ class jit_gelu_v0_emitter : public jit_dnnl_emitter { class jit_gelu_v7_emitter : public jit_dnnl_emitter { public: jit_gelu_v7_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { auto gelu = getNgraphOpAs(n); ov::op::GeluApproximationMode approximationMode = gelu->get_approximation_mode(); @@ -168,7 +168,7 @@ class jit_round_emitter : public jit_dnnl_emitter { dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { + ov::element::Type exec_prc = ov::element::f32) : jit_dnnl_emitter(host, host_isa, n, exec_prc) { const auto round = getNgraphOpAs(n); const auto mode = round->get_mode(); if ((mode != ov::opset5::Round::RoundMode::HALF_AWAY_FROM_ZERO) && diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.cpp b/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.cpp index e862a4c55db29d..6b6b7e842eba1b 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.cpp @@ -18,26 +18,26 @@ namespace ov { namespace intel_cpu { namespace { -InferenceEngine::Precision get_arithmetic_binary_exec_precision(const std::shared_ptr& n) { - std::vector input_precisions; +ov::element::Type get_arithmetic_binary_exec_precision(const std::shared_ptr& n) { + std::vector input_precisions; for (const auto& input : n->inputs()) { - input_precisions.push_back( - InferenceEngine::details::convertPrecision(input.get_source_output().get_element_type())); + input_precisions.push_back(input.get_source_output().get_element_type()); } - assert(std::all_of( - input_precisions.begin(), - input_precisions.end(), - [&input_precisions](const InferenceEngine::Precision& precision) {return precision == input_precisions[0]; })); + assert(std::all_of(input_precisions.begin(), + input_precisions.end(), + [&input_precisions](const ov::element::Type& precision) { + return precision == input_precisions[0]; + })); return input_precisions[0]; } -} // namespace +} // namespace /// ADD /// jit_add_emitter::jit_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_add_emitter::jit_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_add_emitter::jit_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_add_emitter::get_inputs_num() const { return 2; } @@ -63,8 +63,8 @@ void jit_add_emitter::emit_isa(const std::vector &in_vec_idxs, const std auto uni_vadd = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: h->uni_vaddps(vmm_dst, vmm_src0, vmm_src1); break; - case Precision::I32: h->uni_vpaddd(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::f32: h->uni_vaddps(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::i32: h->uni_vpaddd(vmm_dst, vmm_src0, vmm_src1); break; default: assert(!"unsupported precision"); } }; @@ -84,7 +84,7 @@ std::set> jit_add_emitter::get_supported_precisions(c /// MUL_ADD /// jit_mul_add_emitter::jit_mul_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_mul_add_emitter::jit_mul_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_mul_add_emitter::jit_mul_add_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_mul_add_emitter::get_inputs_num() const { return 3; } @@ -113,11 +113,11 @@ void jit_mul_add_emitter::emit_isa(const std::vector &in_vec_idxs, const auto uni_vfmadd231_xmm = [this](Xmm vmm_dst, Xmm vmm_src0, Xmm vmm_src1, Xmm vmm_src2) { h->uni_vmovups(vmm_dst, vmm_src0); switch (exec_prc_) { - case Precision::FP32: { + case ov::element::f32: { h->uni_vmulps(vmm_dst, vmm_dst, vmm_src1); h->uni_vaddps(vmm_dst, vmm_dst, vmm_src2); } break; - case Precision::I32: { + case ov::element::i32: { h->uni_vpmulld(vmm_dst, vmm_dst, vmm_src1); h->uni_vpaddd(vmm_dst, vmm_dst, vmm_src2); } break; @@ -127,7 +127,7 @@ void jit_mul_add_emitter::emit_isa(const std::vector &in_vec_idxs, const auto uni_vfmadd231_vmm = [this, vmm_aux0](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1, Vmm vmm_src2) { switch (exec_prc_) { - case Precision::FP32: { + case ov::element::f32: { Vmm vmm_mul0; if (vmm_dst.getIdx() == vmm_src0.getIdx()) { h->uni_vmovups(vmm_aux0, vmm_src0); @@ -149,7 +149,7 @@ void jit_mul_add_emitter::emit_isa(const std::vector &in_vec_idxs, const h->uni_vfmadd231ps(vmm_dst, vmm_mul0, vmm_mul1); } break; - case Precision::I32: { + case ov::element::i32: { h->uni_vpmulld(vmm_dst, vmm_src0, vmm_src1); h->uni_vpaddd(vmm_dst, vmm_dst, vmm_src2); } break; @@ -175,7 +175,7 @@ std::set> jit_mul_add_emitter::get_supported_precisio /// SUB /// jit_subtract_emitter::jit_subtract_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_subtract_emitter::jit_subtract_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_subtract_emitter::jit_subtract_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_subtract_emitter::get_inputs_num() const { return 2; } @@ -201,8 +201,8 @@ void jit_subtract_emitter::emit_isa(const std::vector &in_vec_idxs, cons auto uni_vsub = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: h->uni_vsubps(vmm_dst, vmm_src0, vmm_src1); break; - case Precision::I32: h->uni_vpsubd(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::f32: h->uni_vsubps(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::i32: h->uni_vpsubd(vmm_dst, vmm_src0, vmm_src1); break; default: assert(!"unsupported precision"); } }; @@ -222,7 +222,7 @@ std::set> jit_subtract_emitter::get_supported_precisi /// MULTIPLY /// jit_multiply_emitter::jit_multiply_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_multiply_emitter::jit_multiply_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_multiply_emitter::jit_multiply_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_multiply_emitter::get_inputs_num() const { return 2; } @@ -248,8 +248,8 @@ void jit_multiply_emitter::emit_isa(const std::vector &in_vec_idxs, cons auto uni_vmul = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: h->uni_vmulps(vmm_dst, vmm_src0, vmm_src1); break; - case Precision::I32: h->uni_vpmulld(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::f32: h->uni_vmulps(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::i32: h->uni_vpmulld(vmm_dst, vmm_src0, vmm_src1); break; default: assert(!"unsupported precision"); } }; @@ -267,9 +267,9 @@ std::set> jit_multiply_emitter::get_supported_precisi } /// DIVIDE /// -jit_divide_emitter::jit_divide_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_divide_emitter::jit_divide_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_divide_emitter::jit_divide_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_divide_emitter::jit_divide_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_divide_emitter::get_inputs_num() const { return 2; } @@ -295,11 +295,11 @@ void jit_divide_emitter::emit_isa(const std::vector &in_vec_idxs, const auto uni_vdiv = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: { + case ov::element::f32: { h->uni_vdivps(vmm_dst, vmm_src0, vmm_src1); break; } - case Precision::I32: { + case ov::element::i32: { Vmm vmm_aux0 = Vmm(aux_vec_idxs[0]); // The opset doesn't contain vector instruction for integer divide operation @@ -328,13 +328,13 @@ std::set> jit_divide_emitter::get_supported_precision } size_t jit_divide_emitter::aux_vecs_count() const { - return exec_prc_ == Precision::I32 ? 1 : 0; + return exec_prc_ == ov::element::i32 ? 1 : 0; } /// FLOOR /// -jit_floor_emitter::jit_floor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_floor_emitter::jit_floor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} -jit_floor_emitter::jit_floor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_floor_emitter::jit_floor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_floor_emitter::get_inputs_num() const { return 1; } @@ -364,9 +364,9 @@ void jit_floor_emitter::emit_isa(const std::vector &in_vec_idxs, const s } /// CEILING /// -jit_ceiling_emitter::jit_ceiling_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_ceiling_emitter::jit_ceiling_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} -jit_ceiling_emitter::jit_ceiling_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_ceiling_emitter::jit_ceiling_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_ceiling_emitter::get_inputs_num() const { return 1; } @@ -397,10 +397,15 @@ void jit_ceiling_emitter::emit_isa(const std::vector &in_vec_idxs, const } /// FLOOR_MOD /// -jit_floor_mod_emitter::jit_floor_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) {} -jit_floor_mod_emitter::jit_floor_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) {} +jit_floor_mod_emitter::jit_floor_mod_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} +jit_floor_mod_emitter::jit_floor_mod_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} size_t jit_floor_mod_emitter::get_inputs_num() const { return 2; } @@ -451,9 +456,9 @@ size_t jit_floor_mod_emitter::aux_vecs_count() const { } /// MOD /// -jit_mod_emitter::jit_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_mod_emitter::jit_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} -jit_mod_emitter::jit_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_mod_emitter::jit_mod_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_mod_emitter::get_inputs_num() const { return 2; } @@ -507,7 +512,7 @@ size_t jit_mod_emitter::aux_vecs_count() const { /// MAXIMUM /// jit_maximum_emitter::jit_maximum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_maximum_emitter::jit_maximum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_maximum_emitter::jit_maximum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_maximum_emitter::get_inputs_num() const { return 2; } @@ -533,8 +538,8 @@ void jit_maximum_emitter::emit_isa(const std::vector &in_vec_idxs, const auto uni_vmax = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: h->uni_vmaxps(vmm_dst, vmm_src0, vmm_src1); break; - case Precision::I32: h->uni_vpmaxsd(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::f32: h->uni_vmaxps(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::i32: h->uni_vpmaxsd(vmm_dst, vmm_src0, vmm_src1); break; default: assert(!"unsupported precision"); } }; @@ -555,7 +560,7 @@ std::set> jit_maximum_emitter::get_supported_precisio /// MINIMUM /// jit_minimum_emitter::jit_minimum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) {} -jit_minimum_emitter::jit_minimum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_minimum_emitter::jit_minimum_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_minimum_emitter::get_inputs_num() const { return 2; } @@ -581,8 +586,8 @@ void jit_minimum_emitter::emit_isa(const std::vector &in_vec_idxs, const auto uni_vmin = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: h->uni_vminps(vmm_dst, vmm_src0, vmm_src1); break; - case Precision::I32: h->uni_vpminsd(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::f32: h->uni_vminps(vmm_dst, vmm_src0, vmm_src1); break; + case ov::element::i32: h->uni_vpminsd(vmm_dst, vmm_src0, vmm_src1); break; default: assert(!"unsupported precision"); } }; @@ -602,9 +607,9 @@ std::set> jit_minimum_emitter::get_supported_precisio /// SQUARED_DIFFERENCE /// jit_squared_difference_emitter::jit_squared_difference_emitter( - x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) + x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} -jit_squared_difference_emitter::jit_squared_difference_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_squared_difference_emitter::jit_squared_difference_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_squared_difference_emitter::get_inputs_num() const { return 2; } @@ -630,11 +635,11 @@ void jit_squared_difference_emitter::emit_isa(const std::vector &in_vec_ auto uni_vsqdiff = [this](Vmm vmm_dst, Vmm vmm_src0, Vmm vmm_src1) { switch (exec_prc_) { - case Precision::FP32: { + case ov::element::f32: { h->uni_vsubps(vmm_dst, vmm_src0, vmm_src1); h->uni_vmulps(vmm_dst, vmm_dst, vmm_dst); } break; - case Precision::I32: { + case ov::element::i32: { h->uni_vpsubd(vmm_dst, vmm_src0, vmm_src1); h->uni_vpmulld(vmm_dst, vmm_dst, vmm_dst); } break; @@ -657,9 +662,9 @@ std::set> jit_squared_difference_emitter::get_support /// POWER_DYNAMIC /// jit_power_dynamic_emitter::jit_power_dynamic_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, - Precision exec_prc) + ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} -jit_power_dynamic_emitter::jit_power_dynamic_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_power_dynamic_emitter::jit_power_dynamic_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) {} size_t jit_power_dynamic_emitter::get_inputs_num() const { return 2; } @@ -768,11 +773,11 @@ void jit_power_dynamic_emitter::emit_isa(const std::vector &in_vec_idxs, /// EQUAL /// -jit_equal_emitter::jit_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_equal_emitter::jit_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_equal_emitter::jit_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_equal_emitter::jit_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -831,12 +836,17 @@ size_t jit_equal_emitter::aux_vecs_count() const { } /// NOT_EQUAL /// -jit_not_equal_emitter::jit_not_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_not_equal_emitter::jit_not_equal_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_not_equal_emitter::jit_not_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_not_equal_emitter::jit_not_equal_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -894,11 +904,11 @@ size_t jit_not_equal_emitter::aux_vecs_count() const { } /// GREATER /// -jit_greater_emitter::jit_greater_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_greater_emitter::jit_greater_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_greater_emitter::jit_greater_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_greater_emitter::jit_greater_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -958,11 +968,11 @@ size_t jit_greater_emitter::aux_vecs_count() const { /// GREATER_EQUAL /// jit_greater_equal_emitter::jit_greater_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, - Precision exec_prc) + ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_greater_equal_emitter::jit_greater_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_greater_equal_emitter::jit_greater_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1021,11 +1031,11 @@ size_t jit_greater_equal_emitter::aux_vecs_count() const { } /// LESS /// -jit_less_emitter::jit_less_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) +jit_less_emitter::jit_less_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_less_emitter::jit_less_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) +jit_less_emitter::jit_less_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1084,12 +1094,17 @@ size_t jit_less_emitter::aux_vecs_count() const { } /// LESS_EQUAL /// -jit_less_equal_emitter::jit_less_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_less_equal_emitter::jit_less_equal_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_less_equal_emitter::jit_less_equal_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_less_equal_emitter::jit_less_equal_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1148,12 +1163,17 @@ size_t jit_less_equal_emitter::aux_vecs_count() const { } /// LOGICAL_AND /// -jit_logical_and_emitter::jit_logical_and_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_and_emitter::jit_logical_and_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_logical_and_emitter::jit_logical_and_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_and_emitter::jit_logical_and_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1230,14 +1250,18 @@ size_t jit_logical_and_emitter::aux_vecs_count() const { return 3; } - /// LOGICAL_OR /// -jit_logical_or_emitter::jit_logical_or_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_or_emitter::jit_logical_or_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_logical_or_emitter::jit_logical_or_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_or_emitter::jit_logical_or_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1315,12 +1339,17 @@ size_t jit_logical_or_emitter::aux_vecs_count() const { } /// LOGICAL_XOR /// -jit_logical_xor_emitter::jit_logical_xor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_xor_emitter::jit_logical_xor_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_logical_xor_emitter::jit_logical_xor_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_xor_emitter::jit_logical_xor_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1398,12 +1427,17 @@ size_t jit_logical_xor_emitter::aux_vecs_count() const { } /// LOGICAL_NOT /// -jit_logical_not_emitter::jit_logical_not_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_not_emitter::jit_logical_not_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_logical_not_emitter::jit_logical_not_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_logical_not_emitter::jit_logical_not_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1460,8 +1494,11 @@ size_t jit_logical_not_emitter::aux_vecs_count() const { } /// POWER_STATIC /// -jit_power_static_emitter::jit_power_static_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_power_static_emitter::jit_power_static_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { auto powerStaticNode = ov::as_type_ptr(node); if (powerStaticNode == nullptr) { OPENVINO_THROW("Can't cast to snippets::op::PowerStatic"); @@ -1476,7 +1513,7 @@ jit_power_static_emitter::jit_power_static_emitter(x64::jit_generator *host, x64 jit_power_static_emitter::jit_power_static_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, float inpPower, float inpScale, float inpShift, - Precision exec_prc) + ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc), power(inpPower), scale(inpScale), shift(inpShift) { prepare_table(); } @@ -1651,12 +1688,15 @@ size_t jit_power_static_emitter::aux_vecs_count() const { } /// PRELU /// -jit_prelu_emitter::jit_prelu_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_prelu_emitter::jit_prelu_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_prelu_emitter::jit_prelu_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_prelu_emitter::jit_prelu_emitter(x64::jit_generator* host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } size_t jit_prelu_emitter::get_inputs_num() const { return 2; } @@ -1713,10 +1753,13 @@ size_t jit_prelu_emitter::aux_vecs_count() const { } /// SQRT /// -jit_sqrt_emitter::jit_sqrt_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) {} -jit_sqrt_emitter::jit_sqrt_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) {} +jit_sqrt_emitter::jit_sqrt_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} +jit_sqrt_emitter::jit_sqrt_emitter(x64::jit_generator* host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} size_t jit_sqrt_emitter::get_inputs_num() const { return 1; } @@ -1746,8 +1789,11 @@ void jit_sqrt_emitter::emit_isa(const std::vector &in_vec_idxs, const st } /// Negate /// -jit_negative_emitter::jit_negative_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) {} +jit_negative_emitter::jit_negative_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} size_t jit_negative_emitter::get_inputs_num() const { return 1; } @@ -1777,13 +1823,16 @@ void jit_negative_emitter::emit_isa(const std::vector &in_vec_idxs, cons } /// ERF /// -jit_erf_emitter::jit_erf_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_erf_emitter::jit_erf_emitter(x64::jit_generator* host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_erf_emitter::jit_erf_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_erf_emitter::jit_erf_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -1962,12 +2011,17 @@ size_t jit_erf_emitter::aux_vecs_count() const { } /// SOFT SIGN /// -jit_soft_sign_emitter::jit_soft_sign_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_soft_sign_emitter::jit_soft_sign_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } -jit_soft_sign_emitter::jit_soft_sign_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) -: jit_emitter(host, host_isa, exec_prc) { +jit_soft_sign_emitter::jit_soft_sign_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) { prepare_table(); } @@ -2181,10 +2235,13 @@ void jit_is_nan_emitter::register_table_entries() { } /// SELECT /// -jit_select_emitter::jit_select_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, const std::shared_ptr& node, Precision exec_prc) - : jit_emitter(host, host_isa, exec_prc) {} -jit_select_emitter::jit_select_emitter(x64::jit_generator *host, x64::cpu_isa_t host_isa, Precision exec_prc) - : jit_emitter(host, host_isa, exec_prc) {} +jit_select_emitter::jit_select_emitter(x64::jit_generator* host, + x64::cpu_isa_t host_isa, + const std::shared_ptr& node, + ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} +jit_select_emitter::jit_select_emitter(x64::jit_generator* host, x64::cpu_isa_t host_isa, ov::element::Type exec_prc) + : jit_emitter(host, host_isa, exec_prc) {} size_t jit_select_emitter::get_inputs_num() const { return 3; } diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.hpp index 024179bee5f5e9..1660d9a990f005 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_eltwise_emitters.hpp @@ -12,7 +12,7 @@ namespace intel_cpu { class jit_add_emitter : public jit_emitter { public: jit_add_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_add_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -28,7 +28,7 @@ class jit_add_emitter : public jit_emitter { class jit_mul_add_emitter : public jit_emitter { public: jit_mul_add_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_mul_add_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -47,7 +47,7 @@ class jit_mul_add_emitter : public jit_emitter { class jit_subtract_emitter : public jit_emitter { public: jit_subtract_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_subtract_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -64,7 +64,7 @@ class jit_subtract_emitter : public jit_emitter { class jit_multiply_emitter : public jit_emitter { public: jit_multiply_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_multiply_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -81,9 +81,9 @@ class jit_multiply_emitter : public jit_emitter { class jit_divide_emitter : public jit_emitter { public: jit_divide_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_divide_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -99,9 +99,9 @@ class jit_divide_emitter : public jit_emitter { class jit_floor_emitter : public jit_emitter { public: jit_floor_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_floor_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -116,9 +116,9 @@ class jit_floor_emitter : public jit_emitter { class jit_ceiling_emitter : public jit_emitter { public: jit_ceiling_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_ceiling_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -133,9 +133,9 @@ class jit_ceiling_emitter : public jit_emitter { class jit_floor_mod_emitter : public jit_emitter { public: jit_floor_mod_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_floor_mod_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -152,9 +152,9 @@ class jit_floor_mod_emitter : public jit_emitter { class jit_mod_emitter : public jit_emitter { public: jit_mod_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_mod_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -171,7 +171,7 @@ class jit_mod_emitter : public jit_emitter { class jit_maximum_emitter : public jit_emitter { public: jit_maximum_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_maximum_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -188,7 +188,7 @@ class jit_maximum_emitter : public jit_emitter { class jit_minimum_emitter : public jit_emitter { public: jit_minimum_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_minimum_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n); size_t get_inputs_num() const override; @@ -205,10 +205,10 @@ class jit_minimum_emitter : public jit_emitter { class jit_squared_difference_emitter : public jit_emitter { public: jit_squared_difference_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_squared_difference_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -224,9 +224,9 @@ class jit_squared_difference_emitter : public jit_emitter { class jit_power_dynamic_emitter : public jit_emitter { public: jit_power_dynamic_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_power_dynamic_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -242,9 +242,9 @@ class jit_power_dynamic_emitter : public jit_emitter { class jit_equal_emitter : public jit_emitter { public: jit_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -263,9 +263,9 @@ class jit_equal_emitter : public jit_emitter { class jit_not_equal_emitter : public jit_emitter { public: jit_not_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_not_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -284,9 +284,9 @@ class jit_not_equal_emitter : public jit_emitter { class jit_greater_emitter : public jit_emitter { public: jit_greater_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_greater_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -305,9 +305,9 @@ class jit_greater_emitter : public jit_emitter { class jit_greater_equal_emitter : public jit_emitter { public: jit_greater_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_greater_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -326,9 +326,9 @@ class jit_greater_equal_emitter : public jit_emitter { class jit_less_emitter : public jit_emitter { public: jit_less_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_less_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -347,10 +347,10 @@ class jit_less_emitter : public jit_emitter { class jit_less_equal_emitter : public jit_emitter { public: jit_less_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_less_equal_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -369,9 +369,9 @@ class jit_less_equal_emitter : public jit_emitter { class jit_logical_and_emitter : public jit_emitter { public: jit_logical_and_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_logical_and_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -390,9 +390,9 @@ class jit_logical_and_emitter : public jit_emitter { class jit_logical_or_emitter : public jit_emitter { public: jit_logical_or_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_logical_or_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -411,9 +411,9 @@ class jit_logical_or_emitter : public jit_emitter { class jit_logical_xor_emitter : public jit_emitter { public: jit_logical_xor_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_logical_xor_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -431,9 +431,9 @@ class jit_logical_xor_emitter : public jit_emitter { class jit_logical_not_emitter : public jit_emitter { public: jit_logical_not_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_logical_not_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -452,9 +452,9 @@ class jit_power_static_emitter : public jit_emitter { public: jit_power_static_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, float inpPower, float inpScale, float inpShift, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_power_static_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -477,9 +477,9 @@ class jit_power_static_emitter : public jit_emitter { class jit_prelu_emitter : public jit_emitter { public: jit_prelu_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_prelu_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -496,9 +496,9 @@ class jit_prelu_emitter : public jit_emitter { class jit_sqrt_emitter : public jit_emitter { public: jit_sqrt_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_sqrt_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -513,7 +513,7 @@ class jit_sqrt_emitter : public jit_emitter { class jit_negative_emitter : public jit_emitter { public: jit_negative_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -528,10 +528,10 @@ class jit_negative_emitter : public jit_emitter { class jit_erf_emitter : public jit_emitter { public: jit_erf_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_erf_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -551,9 +551,9 @@ class jit_erf_emitter : public jit_emitter { class jit_soft_sign_emitter : public jit_emitter { public: jit_soft_sign_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_soft_sign_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); @@ -570,11 +570,11 @@ class jit_soft_sign_emitter : public jit_emitter { class jit_is_finite_emitter : public jit_emitter { public: jit_is_finite_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32) : jit_emitter(host, hostIsa, execPrc) { + ov::element::Type execPrc = ov::element::f32) : jit_emitter(host, hostIsa, execPrc) { prepare_table(); } jit_is_finite_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, const std::shared_ptr& node, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32) : jit_emitter(host, hostIsa, execPrc) { + ov::element::Type execPrc = ov::element::f32) : jit_emitter(host, hostIsa, execPrc) { prepare_table(); } @@ -597,12 +597,12 @@ class jit_is_finite_emitter : public jit_emitter { class jit_is_inf_emitter : public jit_emitter { public: jit_is_inf_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32, bool detect_negative = true, bool detect_positive = true) + ov::element::Type execPrc = ov::element::f32, bool detect_negative = true, bool detect_positive = true) : jit_emitter(host, hostIsa, execPrc), detect_negative(detect_negative), detect_positive(detect_positive) { prepare_table(); } jit_is_inf_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, const std::shared_ptr& node, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32): jit_emitter(host, hostIsa, execPrc) { + ov::element::Type execPrc = ov::element::f32): jit_emitter(host, hostIsa, execPrc) { prepare_table(); } @@ -628,11 +628,11 @@ class jit_is_inf_emitter : public jit_emitter { class jit_is_nan_emitter : public jit_emitter { public: jit_is_nan_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32) : jit_emitter(host, hostIsa, execPrc) { + ov::element::Type execPrc = ov::element::f32) : jit_emitter(host, hostIsa, execPrc) { prepare_table(); } jit_is_nan_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t hostIsa, const std::shared_ptr& node, - InferenceEngine::Precision execPrc = InferenceEngine::Precision::FP32) : jit_emitter(host, hostIsa, execPrc) { + ov::element::Type execPrc = ov::element::f32) : jit_emitter(host, hostIsa, execPrc) { prepare_table(); } @@ -655,9 +655,9 @@ class jit_is_nan_emitter : public jit_emitter { class jit_select_emitter : public jit_emitter { public: jit_select_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); jit_select_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, const std::shared_ptr& n, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32); + ov::element::Type exec_prc = ov::element::f32); size_t get_inputs_num() const override; static std::set> get_supported_precisions(const std::shared_ptr& node = nullptr); diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_emitter.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_emitter.hpp index cbc0a61eecd529..c10adb19f9ee58 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_emitter.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_emitter.hpp @@ -31,7 +31,7 @@ struct emitter_params { class jit_emitter : public ov::snippets::Emitter { public: jit_emitter(dnnl::impl::cpu::x64::jit_generator* host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32, emitter_in_out_map in_out_type = emitter_in_out_map::vec_to_vec) + ov::element::Type exec_prc = ov::element::f32, emitter_in_out_map in_out_type = emitter_in_out_map::vec_to_vec) : Emitter(), h(host), host_isa_(host_isa), exec_prc_(exec_prc), l_table (new Xbyak::Label()), in_out_type_(in_out_type) { k_mask = Xbyak::Opmask(1); // FIXME: in general case we need preserve k_mask state as well } @@ -59,7 +59,7 @@ class jit_emitter : public ov::snippets::Emitter { dnnl::impl::cpu::x64::jit_generator* h; dnnl::impl::cpu::x64::cpu_isa_t host_isa_; - InferenceEngine::Precision exec_prc_; + ov::element::Type exec_prc_; Xbyak::Opmask k_mask; virtual void prepare_table(); diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.cpp b/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.cpp index a0b678e43e2e5b..1edc60473928dd 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.cpp @@ -47,8 +47,8 @@ constexpr int threshold_for_mask_emu_store = 6; size_t load_emitter_params::hash() const { size_t seed = 0; seed = hash_combine(seed, std::string("jit_load_emitter")); - seed = hash_combine(seed, src_prc_.getPrecVal()); - seed = hash_combine(seed, dst_prc_.getPrecVal()); + seed = hash_combine(seed, src_prc_.hash()); + seed = hash_combine(seed, dst_prc_.hash()); seed = hash_combine(seed, load_num_); seed = hash_combine(seed, is_fill_); seed = hash_combine(seed, fill_value_); @@ -58,8 +58,8 @@ size_t load_emitter_params::hash() const { size_t store_emitter_params::hash() const { size_t seed = 0; seed = hash_combine(seed, std::string("jit_store_emitter")); - seed = hash_combine(seed, src_prc_.getPrecVal()); - seed = hash_combine(seed, dst_prc_.getPrecVal()); + seed = hash_combine(seed, src_prc_.hash()); + seed = hash_combine(seed, dst_prc_.hash()); seed = hash_combine(seed, store_num_); return seed; } @@ -74,7 +74,7 @@ static int get_aux_regs_as_temp(const size_t byte_size, const bool is_fill = fal /// LOAD /// jit_load_emitter::jit_load_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - Precision src_prc, Precision dst_prc, int load_num, Precision exec_prc, + ov::element::Type src_prc, ov::element::Type dst_prc, int load_num, ov::element::Type exec_prc, bool is_fill, std::string fill_value, emitter_in_out_map in_out_type) : jit_emitter(host, host_isa, exec_prc, in_out_type), name_("unknown"), load_num_(load_num), src_prc_(src_prc), dst_prc_(dst_prc), is_fill_(is_fill), fill_value_(fill_value) { @@ -111,7 +111,7 @@ void jit_load_emitter::emit_impl(const std::vector &in_idxs, const std:: template void jit_load_emitter::emit_isa(const Xbyak::Reg64 ®_src, const int out_vec_idx, const int offset) const { - bool matched_prc = (dst_prc_ == src_prc_) || (dst_prc_ == Precision::FP32) || (dst_prc_ == Precision::I32); + bool matched_prc = (dst_prc_ == src_prc_) || (dst_prc_ == ov::element::f32) || (dst_prc_ == ov::element::i32); if (!matched_prc) { OPENVINO_THROW("Load emitter in ", name_, @@ -129,20 +129,20 @@ void jit_load_emitter::emit_isa(const Xbyak::Reg64 ®_src, const int out_vec_i } else { // "pure load" + convert. dst_prc must be FP32 or I32. switch (src_prc_) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: load_bytes(Vmm(out_vec_idx), reg_src, offset, load_size_); break; - case Precision::I8: + case ov::element::i8: load_bytes_to_dword_extension(Vmm(out_vec_idx), reg_src, offset, true, load_size_); break; - case Precision::U8: + case ov::element::u8: load_bytes_to_dword_extension(Vmm(out_vec_idx), reg_src, offset, false, load_size_); break; - case Precision::I16: - case Precision::U16: - case Precision::BF16: - case Precision::FP16: + case ov::element::i16: + case ov::element::u16: + case ov::element::bf16: + case ov::element::f16: load_words_to_dword_extension(Vmm(out_vec_idx), reg_src, offset, src_prc_, load_size_); break; default: @@ -153,12 +153,12 @@ void jit_load_emitter::emit_isa(const Xbyak::Reg64 ®_src, const int out_vec_i // post convert between I32 and FP32 if (src_prc_ != dst_prc_) { switch (dst_prc_) { - case Precision::FP32: - if (!src_prc_.is_float()) + case ov::element::f32: + if (!src_prc_.is_real()) h->uni_vcvtdq2ps(Vmm(out_vec_idx), Vmm(out_vec_idx)); break; - case Precision::I32: - if (src_prc_.is_float()) { + case ov::element::i32: + if (src_prc_.is_real()) { h->uni_vcvtps2dq(Vmm(out_vec_idx), Vmm(out_vec_idx)); } break; @@ -464,7 +464,7 @@ void jit_load_emitter::load_bytes_to_dword_extension(const Vmm &vmm, const Xbyak * [0.. 32] for ZMM version of the function. i.e. 16 words -> 16 * 32 bit == 512 bit */ template -void jit_load_emitter::load_words_to_dword_extension(const Vmm &vmm, const Xbyak::Reg64 ®, int offset, InferenceEngine::Precision prc, int load_size) const { +void jit_load_emitter::load_words_to_dword_extension(const Vmm &vmm, const Xbyak::Reg64 ®, int offset, ov::element::Type prc, int load_size) const { constexpr bool is_xmm = std::is_same::value; constexpr bool is_ymm = std::is_same::value; constexpr bool is_zmm = std::is_same::value; @@ -473,9 +473,9 @@ void jit_load_emitter::load_words_to_dword_extension(const Vmm &vmm, const Xbyak MAYBE_UNUSED(is_ymm); MAYBE_UNUSED(is_zmm); - bool is_bf16 = (prc == Precision::BF16); - bool is_f16 = (prc == Precision::FP16); - bool is_signed = prc.isSigned(); + bool is_bf16 = (prc == ov::element::bf16); + bool is_f16 = (prc == ov::element::f16); + bool is_signed = prc.is_signed(); if (is_f16 && !mayiuse(cpu::x64::avx512_core_fp16)) OPENVINO_THROW("Load emitter in ", name_, " only support fp16 on platform with avx512_core_fp16."); @@ -615,7 +615,7 @@ void jit_load_emitter::register_table_entries() { /// STORE /// jit_store_emitter::jit_store_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - Precision src_prc, Precision dst_prc, int store_num, arithmetic_mode mode, Precision exec_prc, + ov::element::Type src_prc, ov::element::Type dst_prc, int store_num, arithmetic_mode mode, ov::element::Type exec_prc, emitter_in_out_map in_out_type) : jit_emitter(host, host_isa, exec_prc, in_out_type), name_("unknown"), store_num_(store_num), src_prc_(src_prc), dst_prc_(dst_prc), mode_(mode) { prepare_table(); @@ -631,7 +631,7 @@ inline bool jit_store_emitter::is_saturation() const { // case for SSE and AVX2 when we should use AND to truncate values inline bool jit_store_emitter::is_truncation_emulation() const { return !mayiuse(cpu::x64::avx512_core) && !is_saturation() && - src_prc_ != dst_prc_ && one_of(dst_prc_, Precision::U16, Precision::I16, Precision::U8, Precision::I8); + src_prc_ != dst_prc_ && one_of(dst_prc_, ov::element::u16, ov::element::i16, ov::element::u8, ov::element::i8); } size_t jit_store_emitter::aux_gprs_count() const { @@ -654,11 +654,11 @@ size_t jit_store_emitter::aux_vecs_count() const { count++; // for data swapping to avoid using Xmm(0) as I/O xmm for jit_uni_vcvtneps2bf16 - if ((host_isa_ == cpu::x64::sse41) && (src_prc_ == Precision::FP32 && dst_prc_ == Precision::BF16)) + if ((host_isa_ == cpu::x64::sse41) && (src_prc_ == ov::element::f32 && dst_prc_ == ov::element::bf16)) count++; // zero value, zeroed and passed from caller from performance standpoint(zeroed one time and not need preserve and restore status) - if (mayiuse(cpu::x64::avx512_core) && one_of(dst_prc_, Precision::U8, Precision::U16)) + if (mayiuse(cpu::x64::avx512_core) && one_of(dst_prc_, ov::element::u8, ov::element::u16)) count++; return count; @@ -687,13 +687,13 @@ void jit_store_emitter::emit_impl(const std::vector &in_idxs, const std: template void jit_store_emitter::emit_isa(const int in_vec_idx, const Xbyak::Reg64 ®_dst, const int offset) const { - bool matched_prc = (src_prc_ == dst_prc_) || (src_prc_ == Precision::FP32) || (src_prc_ == Precision::I32); + bool matched_prc = (src_prc_ == dst_prc_) || (src_prc_ == ov::element::f32) || (src_prc_ == ov::element::i32); if (!matched_prc) { OPENVINO_THROW("Store emitter in ", name_, " only support input precision of FP32 or I32 or the same precision as output."); } - if ((src_prc_ == Precision::FP32) || (src_prc_ == Precision::I32)) { + if ((src_prc_ == ov::element::f32) || (src_prc_ == ov::element::i32)) { if ((isa == cpu::x64::sse41 && store_num_ > 4) || (isa == cpu::x64::avx2 && store_num_ > 8) || (isa == cpu::x64::avx512_core && store_num_ > 16) || store_num_ < 0) { OPENVINO_THROW("Store emitter in ", name_, " has unexpected number of values to store."); @@ -706,8 +706,8 @@ void jit_store_emitter::emit_isa(const int in_vec_idx, const Xbyak::Reg64 ®_d aux_src_idx = aux_vec_idxs.back(); // for avoid src pollution if (src_prc_ != dst_prc_) { switch (src_prc_) { - case Precision::FP32: - if (!dst_prc_.is_float()) { + case ov::element::f32: + if (!dst_prc_.is_real()) { if (is_saturation()) { h->uni_vcvtps2dq(Vmm(aux_src_idx), Vmm(data_idx)); } else { @@ -717,8 +717,8 @@ void jit_store_emitter::emit_isa(const int in_vec_idx, const Xbyak::Reg64 ®_d data_reg_updated = true; } break; - case Precision::I32: - if (dst_prc_.is_float()) { + case ov::element::i32: + if (dst_prc_.is_real()) { h->uni_vcvtdq2ps(Vmm(aux_src_idx), Vmm(data_idx)); data_idx = aux_src_idx; data_reg_updated = true; @@ -733,20 +733,20 @@ void jit_store_emitter::emit_isa(const int in_vec_idx, const Xbyak::Reg64 ®_d store_bytes(reg_dst, offset, store_size_); } else { switch (dst_prc_) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: store_bytes(reg_dst, offset, store_size_); break; - case Precision::I8: + case ov::element::i8: store_dword_to_byte_extension(reg_dst, offset, true, store_num_); break; - case Precision::U8: + case ov::element::u8: store_dword_to_byte_extension(reg_dst, offset, false, store_num_); break; - case Precision::I16: - case Precision::U16: - case Precision::BF16: - case Precision::FP16: + case ov::element::i16: + case ov::element::u16: + case ov::element::bf16: + case ov::element::f16: store_dword_to_word_extension(reg_dst, offset, dst_prc_, store_num_); break; default: @@ -1082,10 +1082,10 @@ void jit_store_emitter::store_dword_to_byte_extension(const Xbyak::Reg64 ®, i */ template void jit_store_emitter::store_dword_to_word_extension(const Xbyak::Reg64 ®, - int offset, InferenceEngine::Precision precision, int store_num) const { - const bool is_bf16 = (precision == Precision::BF16); - const bool is_f16 = (precision == Precision::FP16); - const bool is_signed = precision.isSigned(); + int offset, ov::element::Type precision, int store_num) const { + const bool is_bf16 = (precision == ov::element::bf16); + const bool is_f16 = (precision == ov::element::f16); + const bool is_signed = precision.is_signed(); constexpr bool is_xmm = std::is_same::value; constexpr bool is_ymm = std::is_same::value; @@ -1160,7 +1160,7 @@ void jit_store_emitter::store_dword_to_word_extension(const Xbyak::Reg64 ®, if (is_bf16) { if (mayiuse(cpu::x64::avx512_core)) { // to avoid src vmm pollution, this check means no precision convert happens, so data_idx is still original_data_idx. - if (src_prc_ == Precision::FP32) { + if (src_prc_ == ov::element::f32) { ymm = Ymm(aux_vec_idxs[0]); } uni_vcvtneps2bf16_->emit_code({static_cast(zmm.getIdx())}, {static_cast(ymm.getIdx())}); @@ -1172,11 +1172,11 @@ void jit_store_emitter::store_dword_to_word_extension(const Xbyak::Reg64 ®, } } else { // to avoid src vmm pollution - if (src_prc_ == Precision::FP32) { + if (src_prc_ == ov::element::f32) { xmm = Xmm(aux_vec_idxs[0]); } // For sse41 mask register has to be Xmm(0) so we cannot use Xmm(0) as I/O vmm in uni_vcvtneps2bf16_ - if (host_isa_ == cpu::x64::sse41 && src_prc_ == Precision::FP32) { + if (host_isa_ == cpu::x64::sse41 && src_prc_ == ov::element::f32) { auto xmm_aux1 = Xmm(aux_vec_idxs[1]); h->uni_vmovups(xmm_aux1, vmm); uni_vcvtneps2bf16_->emit_code({static_cast(vmm.getIdx())}, {static_cast(vmm.getIdx())}, @@ -1194,7 +1194,7 @@ void jit_store_emitter::store_dword_to_word_extension(const Xbyak::Reg64 ®, if (!mayiuse(cpu::x64::avx512_core_fp16)) OPENVINO_THROW("Store emitter in ", name_, " only support fp16 on platform with avx512_core_fp16."); // to avoid src vmm pollution - if (src_prc_ == Precision::FP32) { + if (src_prc_ == ov::element::f32) { // since avx512, zmm(fp32) => ymm(fp16) ymm = Ymm(aux_vec_idxs[0]); } // in I32 case, zmm&ymm is already in aux reg diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.hpp index 7230a81b724f49..096f002b64b3db 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_load_store_emitters.hpp @@ -12,27 +12,27 @@ namespace ov { namespace intel_cpu { struct load_emitter_params : public emitter_params { - load_emitter_params(InferenceEngine::Precision src_prc, InferenceEngine::Precision dst_prc, + load_emitter_params(ov::element::Type src_prc, ov::element::Type dst_prc, int load_num, bool is_fill = false, std::string fill_value = "zero"): src_prc_(src_prc), dst_prc_(dst_prc), load_num_(load_num), is_fill_(is_fill), fill_value_(fill_value) {} size_t hash() const override; - InferenceEngine::Precision src_prc_; - InferenceEngine::Precision dst_prc_; + ov::element::Type src_prc_; + ov::element::Type dst_prc_; int load_num_; bool is_fill_; std::string fill_value_; }; struct store_emitter_params : public emitter_params { - store_emitter_params(InferenceEngine::Precision src_prc, InferenceEngine::Precision dst_prc, int store_num): + store_emitter_params(ov::element::Type src_prc, ov::element::Type dst_prc, int store_num): src_prc_(src_prc), dst_prc_(dst_prc), store_num_(store_num) {} size_t hash() const override; - InferenceEngine::Precision src_prc_; - InferenceEngine::Precision dst_prc_; + ov::element::Type src_prc_; + ov::element::Type dst_prc_; int store_num_; }; @@ -45,8 +45,8 @@ enum arithmetic_mode { class jit_load_emitter : public jit_emitter { public: jit_load_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision src_prc, InferenceEngine::Precision dst_prc, int load_num, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32, + ov::element::Type src_prc, ov::element::Type dst_prc, int load_num, + ov::element::Type exec_prc = ov::element::f32, bool is_fill = false, std::string fill_value = "zero", emitter_in_out_map in_out_type = emitter_in_out_map::gpr_to_vec); /** @@ -82,7 +82,7 @@ class jit_load_emitter : public jit_emitter { void load_bytes_to_dword_extension(const Vmm &vmm, const Xbyak::Reg64 ®, int offset, bool is_signed, int load_size) const; template - void load_words_to_dword_extension(const Vmm &vmm, const Xbyak::Reg64 ®, int offset, InferenceEngine::Precision prc, int load_size) const; + void load_words_to_dword_extension(const Vmm &vmm, const Xbyak::Reg64 ®, int offset, ov::element::Type prc, int load_size) const; template void fill_with_default(const Vmm &vmm, std::string fill_value, const int &load_num) const; @@ -95,8 +95,8 @@ class jit_load_emitter : public jit_emitter { int v_len_elt_; // 4/8/16 int load_num_; int load_size_; - InferenceEngine::Precision src_prc_; - InferenceEngine::Precision dst_prc_; + ov::element::Type src_prc_; + ov::element::Type dst_prc_; bool is_fill_; std::string fill_value_; }; @@ -104,9 +104,9 @@ class jit_load_emitter : public jit_emitter { class jit_store_emitter : public jit_emitter { public: jit_store_emitter(dnnl::impl::cpu::x64::jit_generator *host, dnnl::impl::cpu::x64::cpu_isa_t host_isa, - InferenceEngine::Precision src_prc, InferenceEngine::Precision dst_prc, int store_num, + ov::element::Type src_prc, ov::element::Type dst_prc, int store_num, arithmetic_mode mode = arithmetic_mode::saturation, - InferenceEngine::Precision exec_prc = InferenceEngine::Precision::FP32, + ov::element::Type exec_prc = ov::element::f32, emitter_in_out_map in_out_type = emitter_in_out_map::vec_to_gpr); /** @@ -145,7 +145,7 @@ class jit_store_emitter : public jit_emitter { void store_dword_to_byte_extension(const Xbyak::Reg64 ®, int offset, bool is_signed, int store_size) const; template - void store_dword_to_word_extension(const Xbyak::Reg64 ®, int offset, InferenceEngine::Precision precision, int store_size) const; + void store_dword_to_word_extension(const Xbyak::Reg64 ®, int offset, ov::element::Type precision, int store_size) const; void register_table_entries() override; @@ -159,8 +159,8 @@ class jit_store_emitter : public jit_emitter { int v_len_elt_; // 4/8/16 int store_num_; int store_size_; - InferenceEngine::Precision src_prc_; - InferenceEngine::Precision dst_prc_; + ov::element::Type src_prc_; + ov::element::Type dst_prc_; arithmetic_mode mode_ = arithmetic_mode::saturation; std::shared_ptr uni_vcvtneps2bf16_; // below members are to keep original vector values diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.cpp b/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.cpp index f845725b2c5b74..40e49a7b158b6f 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.cpp @@ -540,16 +540,16 @@ void ScalarEmitter::emit_isa(const std::vector &in, const std::vectorget_node(); - src_prc = InferenceEngine::details::convertPrecision(n->get_input_element_type(0)); - dst_prc = InferenceEngine::details::convertPrecision(n->get_output_element_type(0)); + src_prc = n->get_input_element_type(0); + dst_prc = n->get_output_element_type(0); } StoreEmitter::StoreEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPtr& expr) : MemoryEmitter(h, isa, expr) { if (src_prc != dst_prc) OPENVINO_THROW("StoreEmitter supports only equal input and output types but gets: ", - src_prc.name(), + src_prc.get_type_name(), " and ", - dst_prc.name()); + dst_prc.get_type_name()); const auto store = ov::as_type_ptr(expr->get_node()); count = store->get_count(); @@ -585,9 +585,9 @@ void StoreEmitter::emit_data() const { LoadEmitter::LoadEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPtr& expr) : MemoryEmitter(h, isa, expr) { if (src_prc != dst_prc) OPENVINO_THROW("LoadEmitter supports only equal input and output types but gets: ", - src_prc.name(), + src_prc.get_type_name(), " and ", - dst_prc.name()); + dst_prc.get_type_name()); const auto load = std::dynamic_pointer_cast(expr->get_node()); count = load->get_count(); @@ -624,9 +624,9 @@ BroadcastLoadEmitter::BroadcastLoadEmitter(jit_generator* h, cpu_isa_t isa, cons : MemoryEmitter(h, isa, expr) { if (src_prc != dst_prc) OPENVINO_THROW("BroadcastEmitters support only equal input and output types but gets: ", - src_prc.name(), + src_prc.get_type_name(), " and ", - dst_prc.name()); + dst_prc.get_type_name()); const auto broadcast_load = std::dynamic_pointer_cast(expr->get_node()); byte_offset = broadcast_load->get_offset(); @@ -820,9 +820,8 @@ BrgemmEmitter::BrgemmEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPt if (brgemm_node->is_with_data_repacking()) leading_dimensions[1] = rnd_up(m_N, brgemm_copy->get_n_block_size()); - - auto brg0Prc = InferenceEngine::details::convertPrecision(brgemm_node->get_input_element_type(0)); - auto brg1Prc = InferenceEngine::details::convertPrecision(brgemm_node->get_input_element_type(1)); + auto brg0Prc = brgemm_node->get_input_element_type(0); + auto brg1Prc = brgemm_node->get_input_element_type(1); m_brg0VnniFactor = 4 / brg0Prc.size(); bool brgWithAMX = brgemm_node->is_amx(); @@ -873,8 +872,8 @@ BrgemmEmitter::BrgemmEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPt brgemmCtx.LDA = leading_dimensions[0]; brgemmCtx.LDB = leading_dimensions[1]; brgemmCtx.LDC = leading_dimensions[2]; - brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg0Prc)); - brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg1Prc)); + brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg0Prc)); + brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg1Prc)); brgemmCtx.beta = has_K_kernel ? 1 : 0; if (brgemmCtx.N == 0 || brgemmCtx.N > m_N || @@ -1283,8 +1282,8 @@ BrgemmCopyBEmitter::BrgemmCopyBEmitter(jit_generator* h, cpu_isa_t isa, const Ex m_K_tail = m_K % m_K_blk; m_LDB = m_brgemm_prc_in1 == ov::element::f32 ? leading_dimension : rnd_up(m_N, m_N_blk); - const auto dt_in0 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(InferenceEngine::details::convertPrecision(m_brgemm_prc_in0))); - const auto dt_in1 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(InferenceEngine::details::convertPrecision(m_brgemm_prc_in1))); + const auto dt_in0 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(m_brgemm_prc_in0)); + const auto dt_in1 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(m_brgemm_prc_in1)); const bool isAMXSupported = mayiuse(avx512_core_amx); const auto use_amx = isAMXSupported && m_brgemm_prc_in0 != ov::element::f32 && (m_K % m_brgemmVNNIFactor == 0) && (m_N % m_brgemmVNNIFactor == 0); @@ -1491,7 +1490,7 @@ void BrgemmCopyBEmitter::execute(matmul::jit_brgemm_matmul_copy_b_t *kernel, con } HorizonEmitter::HorizonEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPtr& expr) - : jit_emitter(h, isa, Precision::FP32, emitter_in_out_map::vec_to_vec) { + : jit_emitter(h, isa, ov::element::f32, emitter_in_out_map::vec_to_vec) { if (ov::is_type(expr->get_node())) { m_op_type = OpType::max; } else if (ov::is_type(expr->get_node())) { @@ -1559,7 +1558,7 @@ void HorizonEmitter::perform_op(const Vmm &vmm1, const Vmm &vmm2, const Vmm &vmm } FillEmitter::FillEmitter(jit_generator* h, cpu_isa_t isa, const ExpressionPtr& expr) - : jit_emitter(h, isa, Precision::FP32, emitter_in_out_map::vec_to_vec) { + : jit_emitter(h, isa, ov::element::f32, emitter_in_out_map::vec_to_vec) { const auto fill = ov::as_type_ptr(expr->get_node()); if (fill->get_element_type().size() != 4) { OPENVINO_THROW("Fill emitter supports only 4 Byte element types but gets: ", fill->get_element_type()); diff --git a/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.hpp b/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.hpp index 0ff5b864d0368b..c2e3a07cfa108a 100644 --- a/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.hpp +++ b/src/plugins/intel_cpu/src/emitters/x64/jit_snippets_emitters.hpp @@ -254,8 +254,8 @@ class MemoryEmitter : public jit_emitter { const ov::snippets::lowered::ExpressionPtr& expr); protected: - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; size_t count = 0; size_t byte_offset = 0; diff --git a/src/plugins/intel_cpu/src/graph.cpp b/src/plugins/intel_cpu/src/graph.cpp index d477c94c60218b..33d32696499170 100644 --- a/src/plugins/intel_cpu/src/graph.cpp +++ b/src/plugins/intel_cpu/src/graph.cpp @@ -211,7 +211,7 @@ void Graph::Replicate(const std::shared_ptr &model) { for (size_t i = 0; i < childEdges.size(); i++) { const auto child = childEdges[i]->getChild(); const auto child_prec = child->getOriginalInputPrecisionAtPort(childEdges[i]->getOutputNum()); - if (!one_of(child_prec, Precision::BF16, Precision::FP16) && + if (!one_of(child_prec, ov::element::bf16, ov::element::f16) && // remove this WA when #78939 is resolved !hasSubgraphConsumers(child)) child->setOriginalInputPrecisionAtPort(childEdges[i]->getOutputNum(), precToSet); @@ -480,7 +480,7 @@ void Graph::InitEdges() { const auto& outDesc = edge->getOutputDesc(); std::string convertName = edge->getParent()->getName() + "_" + - inDesc.getPrecision().name() + "_" + outDesc.getPrecision().name(); + inDesc.getPrecision().get_type_name() + "_" + outDesc.getPrecision().get_type_name(); auto convertNode = std::make_shared(inDesc.getShape(), inDesc.getPrecision(), outDesc.getPrecision(), convertName, context); @@ -670,7 +670,7 @@ void Graph::AllocateWithReuse() { MemorySolver staticMemSolver(definedBoxes); size_t total_size = static_cast(staticMemSolver.solve()) * alignment; - memWorkspace = std::make_shared(getEngine(), DnnlBlockedMemoryDesc(InferenceEngine::Precision::I8, Shape(VectorDims{total_size}))); + memWorkspace = std::make_shared(getEngine(), DnnlBlockedMemoryDesc(ov::element::i8, Shape(VectorDims{total_size}))); if (edge_clusters.empty()) return; @@ -1015,15 +1015,21 @@ void Graph::PullOutputData(std::unordered_map>& if (actualDesc.getBlockingDesc() != expectedDesc.getBlockingDesc() && !isScalarOutput) { // User can initialize output via SetOutput API using tensorDesc with ANY layout. // For these cases we create planar memory descriptor. - auto outBlobDesc = expectedDesc.getLayout() == InferenceEngine::Layout::ANY - ? DnnlBlockedMemoryDesc(expectedDesc.getPrecision(), Shape(expectedDesc.getDims())) - : MemoryDescUtils::convertToDnnlBlockedMemoryDesc(expectedDesc); + auto outBlobDesc = + expectedDesc.getLayout() == InferenceEngine::Layout::ANY + ? DnnlBlockedMemoryDesc(InferenceEngine::details::convertPrecision(expectedDesc.getPrecision()), + Shape(expectedDesc.getDims())) + : MemoryDescUtils::convertToDnnlBlockedMemoryDesc(expectedDesc); Memory outBloMem(getEngine(), outBlobDesc, ext_blob_ptr, false); outBloMem.load(intr_blob, false); } else { size_t size_to_copy = intr_blob.getDescWithType()->getPaddedElementsCount(); DEBUG_LOG("pull_output: convert ", srcPrec, " to ", dstPrec); - cpu_convert(intr_blob_ptr, ext_blob_ptr, srcPrec, dstPrec, size_to_copy); + cpu_convert(intr_blob_ptr, + ext_blob_ptr, + InferenceEngine::details::convertPrecision(srcPrec), + InferenceEngine::details::convertPrecision(dstPrec), + size_to_copy); } } } @@ -1552,8 +1558,8 @@ NodePtr Graph::InsertReorder(EdgePtr edge, std::string layerName, const MemoryDe reorderPtr->setSrcPermutation(src_perm); DEBUG_LOG(reorderPtr->getName(), " edge=", edge->name(), " isOptimized=", isOptimized); - DEBUG_LOG(" inDesc: ", inDesc.getShape().toString(), inDesc.getPrecision().name(), " ", inDesc.serializeFormat()); - DEBUG_LOG(" outDesc: ", outDesc.getShape().toString(), outDesc.getPrecision().name(), " ", outDesc.serializeFormat()); + DEBUG_LOG(" inDesc: ", inDesc.getShape().toString(), inDesc.getPrecision().get_type_name(), " ", inDesc.serializeFormat()); + DEBUG_LOG(" outDesc: ", outDesc.getShape().toString(), outDesc.getPrecision().get_type_name(), " ", outDesc.serializeFormat()); InsertNode(edge, newReorder, true); @@ -1614,12 +1620,12 @@ bool Graph::InsertNode(NodePtr parent, NodePtr child, NodePtr node, int parentPo void Graph::EnforceInferencePrecision() { CPU_DEBUG_CAP_ENABLE(static EnforceInferPrcDebug inferPrecDebug); - const auto inferPrec = convertPrecision(getConfig().inferencePrecision); + const auto inferPrec = getConfig().inferencePrecision; - if (inferPrec == Precision::FP32) + if (inferPrec == ov::element::f32) return; // nothing to do, only precision reduction is currently allowed #if defined(OV_CPU_ARM_ENABLE_FP16) - if (inferPrec == Precision::FP16) + if (inferPrec == ov::element::f16) return; // precision of configured by ov::pass::ConvertPrecision #endif std::function& skipNodes)> searchForNodesToSkip; @@ -1627,7 +1633,7 @@ void Graph::EnforceInferencePrecision() { for (size_t i = 0; i < node->getParentEdges().size(); i++) { const auto& parent = node->getParentEdgeAt(i)->getParent(); - if (inferPrec == InferenceEngine::Precision::BF16) { + if (inferPrec == ov::element::bf16) { /* list of node types that must be forced to be executed in BF16 precision * because of performance gains */ if (one_of(parent->getType(), @@ -1639,7 +1645,7 @@ void Graph::EnforceInferencePrecision() { Type::ROIPooling, // object detection nets Type::Interpolate)) // super resolution nets continue; // stop at significant nodes - } else if (inferPrec == InferenceEngine::Precision::FP16) { + } else if (inferPrec == ov::element::f16) { /* list of node types that must be forced to be executed in FP16 precision * because of performance gains */ if (one_of(parent->getType(), @@ -1688,13 +1694,13 @@ void Graph::EnforceInferencePrecision() { for (size_t i = 0; i < node->getOriginalInputsNumber(); i++) { auto keepOriginalInputPrecisionAtPort = [](const NodePtr& node, const size_t inPort) { // keep non-float precisions - if (node->getOriginalInputPrecisionAtPort(inPort) != Precision::FP32) + if (node->getOriginalInputPrecisionAtPort(inPort) != ov::element::f32) return true; const auto &parent = node->getParentEdgesAtPort(inPort)[0]->getParent(); /* Skip BF16 enforcement for nodes after Constant Inputs for maintaining precision for fusing. - * Precision conversion to BF16 is done automatically, if convolution follows up after Constant Inputs - * and activation is BF16 */ + * Element type conversion to bf16 is done automatically, if convolution follows up after Constant Inputs + * and activation is bf16 */ if (parent->getType() == Type::Input && parent->isConstant() && // Concatenation node is exception because it doesn't change an accuracy for BF16 activation node->getType() != Type::Concatenation) @@ -1714,7 +1720,7 @@ void Graph::EnforceInferencePrecision() { for (size_t i = 0; i < node->getOriginalOutputsNumber(); i++) { // keep non-float precisions - if (node->getOriginalOutputPrecisionAtPort(i) != Precision::FP32) + if (node->getOriginalOutputPrecisionAtPort(i) != ov::element::f32) continue; // exclude Convert before Range since it may cause precision loss when integter type to LP. diff --git a/src/plugins/intel_cpu/src/graph_dumper.cpp b/src/plugins/intel_cpu/src/graph_dumper.cpp index d239b229e15055..a035ef4ce46793 100644 --- a/src/plugins/intel_cpu/src/graph_dumper.cpp +++ b/src/plugins/intel_cpu/src/graph_dumper.cpp @@ -48,7 +48,7 @@ std::map extract_node_metadata(const NodePtr &node) { std::string outputPrecisionsStr; if (!node->getChildEdges().empty()) { - outputPrecisionsStr = node->getChildEdgeAt(0)->getMemory().getDesc().getPrecision().name(); + outputPrecisionsStr = node->getChildEdgeAt(0)->getMemory().getDesc().getPrecision().get_type_name(); bool isAllEqual = true; for (size_t i = 1; i < node->getChildEdges().size(); i++) { @@ -61,12 +61,12 @@ std::map extract_node_metadata(const NodePtr &node) { // If all output precisions are the same, we store the name only once if (!isAllEqual) { for (size_t i = 1; i < node->getChildEdges().size(); i++) - outputPrecisionsStr += "," + std::string(node->getChildEdgeAt(i)->getMemory().getDesc().getPrecision().name()); + outputPrecisionsStr += "," + std::string(node->getChildEdgeAt(i)->getMemory().getDesc().getPrecision().get_type_name()); } } else { // Branch to correctly handle output nodes if (!node->getParentEdges().empty()) { - outputPrecisionsStr = node->getParentEdgeAt(0)->getMemory().getDesc().getPrecision().name(); + outputPrecisionsStr = node->getParentEdgeAt(0)->getMemory().getDesc().getPrecision().get_type_name(); } } serialization_info[ExecGraphInfoSerialization::OUTPUT_PRECISIONS] = outputPrecisionsStr; @@ -105,7 +105,7 @@ std::map extract_node_metadata(const NodePtr &node) { serialization_info[ExecGraphInfoSerialization::EXECUTION_ORDER] = std::to_string(node->getExecIndex()); - serialization_info[ExecGraphInfoSerialization::RUNTIME_PRECISION] = node->getRuntimePrecision().name(); + serialization_info[ExecGraphInfoSerialization::RUNTIME_PRECISION] = node->getRuntimePrecision().get_type_name(); return serialization_info; } @@ -164,7 +164,7 @@ std::shared_ptr dump_graph_as_ie_ngraph_net(const Graph &graph) { std::shared_ptr return_node; if (is_input) { auto& desc = node->getChildEdgeAt(0)->getMemory().getDesc(); - auto param = std::make_shared(details::convertPrecision(desc.getPrecision()), desc.getShape().toPartialShape()); + auto param = std::make_shared(desc.getPrecision(), desc.getShape().toPartialShape()); return_node = param; params.push_back(param); } else if (is_output) { @@ -176,7 +176,7 @@ std::shared_ptr dump_graph_as_ie_ngraph_net(const Graph &graph) { for (size_t port = 0; port < return_node->get_output_size(); ++port) { auto& desc = node->getChildEdgeAt(port)->getMemory().getDesc(); - return_node->set_output_type(port, details::convertPrecision(desc.getPrecision()), desc.getShape().toPartialShape()); + return_node->set_output_type(port, desc.getPrecision(), desc.getShape().toPartialShape()); } } @@ -240,13 +240,13 @@ void serializeToCout(const Graph &graph) { if (nodeDesc) { auto& inConfs = nodeDesc->getConfig().inConfs; if (!inConfs.empty()) { - std::cout << "in: " << inConfs.front().getMemDesc()->getPrecision().name() + std::cout << "in: " << inConfs.front().getMemDesc()->getPrecision().get_type_name() << "/l=" << inConfs.front().getMemDesc()->serializeFormat() << "; "; } auto& outConfs = nodeDesc->getConfig().outConfs; if (!outConfs.empty()) { - std::cout << "out: " << outConfs.front().getMemDesc()->getPrecision().name() + std::cout << "out: " << outConfs.front().getMemDesc()->getPrecision().get_type_name() << "/l=" << outConfs.front().getMemDesc()->serializeFormat(); } } diff --git a/src/plugins/intel_cpu/src/graph_optimizer.cpp b/src/plugins/intel_cpu/src/graph_optimizer.cpp index 78745066038974..e6f5ce0ff357be 100644 --- a/src/plugins/intel_cpu/src/graph_optimizer.cpp +++ b/src/plugins/intel_cpu/src/graph_optimizer.cpp @@ -285,9 +285,8 @@ void GraphOptimizer::FuseConvMatmulFCDeconvAndDQScales(Graph &graph) { } void GraphOptimizer::FuseFCAndWeightsDecompression(Graph &graph) { - std::set supportedWeightsPrecisions{InferenceEngine::Precision::U8, InferenceEngine::Precision::NF4, - InferenceEngine::Precision::U4, InferenceEngine::Precision::I4}; - const std::set supportedDataPrecisions{InferenceEngine::Precision::FP32, InferenceEngine::Precision::BF16}; + std::set supportedWeightsPrecisions{ov::element::u8, ov::element::nf4, ov::element::u4, ov::element::i4}; + const std::set supportedDataPrecisions{ov::element::f32, ov::element::bf16}; auto expectedNode = [](NodePtr node, Type expectedType) { return node->getType() == expectedType && node->getChildEdges().size() == 1; }; @@ -418,7 +417,7 @@ void GraphOptimizer::FuseFCAndWeightsDecompression(Graph &graph) { // HW specific shape limitations if (impl::cpu::x64::mayiuse(impl::cpu::x64::avx512_core_amx) && - fcNode->getOriginalInputPrecisionAtPort(0) == InferenceEngine::Precision::BF16) { + fcNode->getOriginalInputPrecisionAtPort(0) == ov::element::bf16) { // OneDNN AMX IP implementation has limited shapes support due to performance considerations. As a current solution conditions below are copied // from OneDNN to make sure correct IP impl will be used since fallback one doesn't support weights decompression feature. size_t OC = fcInputWeightsShape.getDims()[0]; @@ -459,7 +458,7 @@ void GraphOptimizer::FuseFCAndWeightsDecompression(Graph &graph) { } VectorDims memoryDims(decompressionConstShape.size(), 1); - CpuBlockedMemoryDesc memoryDesc(Precision::FP32, Shape(memoryDims)); + CpuBlockedMemoryDesc memoryDesc(ov::element::f32, Shape(memoryDims)); auto memory = std::make_shared(graph.getEngine(), memoryDesc, nullptr, false); (static_cast(memory->getData()))[0] = -1.f * eltwiseNode->getGamma(); fcNode->fuseDecompressionSubtract(memory); @@ -633,7 +632,7 @@ void GraphOptimizer::FuseConvolutionMatMulDeconvAndBias(Graph &graph) { // Construct Ngraph Reshape node and CPU Reshape node. auto reshapeConstInput = std::make_shared(ov::element::i32, ov::Shape{1}, flattenShape); auto reshapeDummyInput = std::make_shared( - details::convertPrecision(biasNode->getOriginalOutputPrecisionAtPort(0)), + biasNode->getOriginalOutputPrecisionAtPort(0), biasOutputShape.toPartialShape()); const auto reshape = std::make_shared(reshapeDummyInput, reshapeConstInput, false); reshape->set_friendly_name(biasNode->getName() + "_flatten_reshape"); @@ -860,9 +859,9 @@ void GraphOptimizer::MergeConvertAndScaleShift(Graph& graph) { auto isSuitableParentNode = [](NodePtr parentNode) { return parentNode->getType() == Type::Convert && parentNode->getChildEdges().size() == 1 && - (parentNode->getOriginalInputPrecisionAtPort(0) == Precision::U8 || - parentNode->getOriginalInputPrecisionAtPort(0) == Precision::I8) && - parentNode->getOriginalOutputPrecisionAtPort(0) == Precision::FP32; + (parentNode->getOriginalInputPrecisionAtPort(0) == ov::element::u8 || + parentNode->getOriginalInputPrecisionAtPort(0) == ov::element::i8) && + parentNode->getOriginalOutputPrecisionAtPort(0) == ov::element::f32; }; auto isSuitableChildNode = [](NodePtr childNode) { @@ -936,8 +935,8 @@ void GraphOptimizer::FuseFCAndConvertOnWeights(Graph& graph) { && parent->getChildEdges().size() == 1 && parent->getChildEdgeAt(0)->getOutputNum() == 1 && parent->getChildEdgeAt(0)->getChild()->getType() == Type::FullyConnected - && one_of(parent->getOriginalInputPrecisionAtPort(0), Precision::FP16) - && one_of(parent->getOriginalOutputPrecisionAtPort(0), Precision::FP32, Precision::BF16) + && one_of(parent->getOriginalInputPrecisionAtPort(0), ov::element::f16) + && one_of(parent->getOriginalOutputPrecisionAtPort(0), ov::element::f32, ov::element::bf16) && parent->isConstant(); return res; }; @@ -1013,7 +1012,7 @@ void GraphOptimizer::FuseConvolutionAndZeroPoints(Graph &graph) { // The plug-in doesn't support FP32 convolution with input/weights zero points. // In case weights are in FP32 (or we have zero points on weights which are not supported by INT8 convolution) we cannot use // INT8 implementation so we have to disable input zero points fusing as well. - if (parent1->getType() != Type::Input || !parent1->isConstant() || parent1->getOriginalOutputPrecisionAtPort(0) != Precision::I8) { + if (parent1->getType() != Type::Input || !parent1->isConstant() || parent1->getOriginalOutputPrecisionAtPort(0) != ov::element::i8) { return false; } @@ -1027,7 +1026,7 @@ void GraphOptimizer::FuseConvolutionAndZeroPoints(Graph &graph) { if (subtractArg1->getType() != Type::Input || !subtractArg1->isConstant()) return false; - if (subtractArg1->getOriginalOutputPrecisionAtPort(0) != Precision::U8) + if (subtractArg1->getOriginalOutputPrecisionAtPort(0) != ov::element::u8) return false; if (parent0->getInputShapeAtPort(1).getRank() < 2) { @@ -1046,7 +1045,7 @@ void GraphOptimizer::FuseConvolutionAndZeroPoints(Graph &graph) { const auto& parentEdge = parent0->getParentEdgeAt(0); const auto& subtractArg0 = parentEdge->getParent(); const size_t portNum = parentEdge->getInputNum(); - if (subtractArg0->getOriginalOutputPrecisionAtPort(portNum) != Precision::U8) + if (subtractArg0->getOriginalOutputPrecisionAtPort(portNum) != ov::element::u8) return false; auto zeroPointsConstant = dynamic_cast(subtractArg1.get()); @@ -1289,7 +1288,7 @@ void GraphOptimizer::FuseConvolutionAndDWConvolution(Graph &graph) { if (convParent == nullptr) OPENVINO_THROW("Cannot cast to convolution node ", parentNode->getName()); - if (!everyone_is(Precision::FP32, convParent->getOriginalOutputPrecisionAtPort(0), convChild->getOriginalInputPrecisionAtPort(0), + if (!everyone_is(ov::element::f32, convParent->getOriginalOutputPrecisionAtPort(0), convChild->getOriginalInputPrecisionAtPort(0), convChild->getOriginalOutputPrecisionAtPort(0))) return false; @@ -1301,7 +1300,7 @@ void GraphOptimizer::FuseConvolutionAndDWConvolution(Graph &graph) { ? childNode->fusedWith[childNode->fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0) : childNode->getOriginalOutputPrecisionAtPort(0); - if (!everyone_is(Precision::FP32, parentOutputPrecision, childOutputPrecision)) + if (!everyone_is(ov::element::f32, parentOutputPrecision, childOutputPrecision)) return false; if (!convChild->legacyInputZeroPoints.empty() || !convChild->legacyWeightsZeroPoints.empty()) @@ -1380,7 +1379,7 @@ void GraphOptimizer::FuseConvolutionAndSimpleOperationThroughMaxPool(Graph &grap auto isSuitableParentNode = [](NodePtr node) { return (node->getType() == Type::Convolution || node->getType() == Type::BinaryConvolution) && node->getChildEdges().size() == 1 && - node->getOriginalOutputPrecisionAtPort(0) == Precision::FP32; + node->getOriginalOutputPrecisionAtPort(0) == ov::element::f32; }; auto parent = graphNodes.begin(); @@ -1470,7 +1469,7 @@ void GraphOptimizer::FusePoolingAndFakeQuantize(Graph &graph) { auto isSuitableParentNode = [](NodePtr node) { if (node->getType() == Type::Pooling) { - if (!one_of(node->getOriginalInputPrecisionAtPort(0), Precision::U8, Precision::I8)) + if (!one_of(node->getOriginalInputPrecisionAtPort(0), ov::element::u8, ov::element::i8)) return false; return node->getChildEdges().size() == 1 && node->getAlgorithm() == Algorithm::PoolingAvg; } @@ -1669,7 +1668,7 @@ void GraphOptimizer::FuseConvolutionSumAndConvolutionSumActivation(Graph &graph) const auto branchPrecision = fused.empty() ? branchParent->getOriginalOutputPrecisionAtPort(0) : fused[fused.size() - 1]->getOriginalOutputPrecisionAtPort(0); - return (branchPrecision == Precision::I8) || (branchPrecision == Precision::U8); + return (branchPrecision == ov::element::i8) || (branchPrecision == ov::element::u8); }; const auto isBranch1Quantized = isBranchQuantized(graphNode->getParentEdgesAtPort(0)[0]->getParent()); @@ -2666,7 +2665,7 @@ void GraphOptimizer::reshapeRnnSeq(Graph &graph) { const auto secondInput = std::make_shared(ov::element::i32, ov::Shape{1}, std::vector{1}); const auto unsqueeze = std::make_shared( - std::make_shared(details::convertPrecision(parentNode->getOriginalOutputPrecisionAtPort(0)), + std::make_shared(parentNode->getOriginalOutputPrecisionAtPort(0), parentNode->getOutputShapeAtPort(0).toPartialShape()), secondInput); unsqueeze->set_friendly_name(parentNode->getName() + "_abc_a1bc_" + std::to_string(j)); diff --git a/src/plugins/intel_cpu/src/infer_request.cpp b/src/plugins/intel_cpu/src/infer_request.cpp index 736834886f42c3..85d0e59ee96f49 100644 --- a/src/plugins/intel_cpu/src/infer_request.cpp +++ b/src/plugins/intel_cpu/src/infer_request.cpp @@ -617,7 +617,7 @@ void SyncInferRequest::init_tensor(const std::string& name) { if (!tensor) { ov::Shape tensor_shape; if (isDynamic) { - const auto model_prec = InferenceEngine::details::convertPrecision(port.get_element_type()); + const auto model_prec = port.get_element_type(); const auto graph_prec = output->second->getParentEdgesAtPort(0)[0]->getMemory().getDesc().getPrecision(); OutputControlBlock control_block{model_prec, Shape{shape}}; @@ -703,7 +703,7 @@ void SyncInferRequest::push_input_data() { } } -SyncInferRequest::OutputControlBlock::OutputControlBlock(const InferenceEngine::Precision& precision, const Shape& shape) { +SyncInferRequest::OutputControlBlock::OutputControlBlock(const ov::element::Type& precision, const Shape& shape) { dnnl::engine eng(dnnl::engine::kind::cpu, 0); m_buffers[m_buffIndx] = std::make_shared(); m_proxyMemMngr = std::make_shared(m_buffers[m_buffIndx]); diff --git a/src/plugins/intel_cpu/src/infer_request.h b/src/plugins/intel_cpu/src/infer_request.h index c59bb1754c9c20..4d334db9fef7de 100644 --- a/src/plugins/intel_cpu/src/infer_request.h +++ b/src/plugins/intel_cpu/src/infer_request.h @@ -52,7 +52,7 @@ class SyncInferRequest : public ov::ISyncInferRequest { using MemMngrPtr = std::shared_ptr; public: - OutputControlBlock(const InferenceEngine::Precision& precision, const Shape& shape); + OutputControlBlock(const ov::element::Type& precision, const Shape& shape); OutputControlBlock(const OutputControlBlock&) = delete; OutputControlBlock& operator=(const OutputControlBlock&) = delete; diff --git a/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.cpp b/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.cpp index 969a0aaab2af85..bb15f307bfce03 100644 --- a/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.cpp +++ b/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.cpp @@ -15,10 +15,10 @@ static VectorDims makeRange(size_t size) { return retVec; } -CpuBlockedMemoryDesc::CpuBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape) : +CpuBlockedMemoryDesc::CpuBlockedMemoryDesc(ov::element::Type prc, const Shape& shape) : CpuBlockedMemoryDesc(prc, shape, shape.getDims(), makeRange(shape.getDims().size())) {} -CpuBlockedMemoryDesc::CpuBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& blockedDims, +CpuBlockedMemoryDesc::CpuBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& blockedDims, const VectorDims& order, size_t offsetPadding, const VectorDims& offsetPaddingToData, const VectorDims& strides) : MemoryDesc(shape, Blocked), precision(prc) { if (std::any_of(order.begin(), order.end(), [](size_t val) { return val == Shape::UNDEFINED_DIM; })) { @@ -124,7 +124,7 @@ size_t CpuBlockedMemoryDesc::getCurrentMemSizeImp() const { e_size += (getBlockDims()[j] - 1) * getStrides()[j]; } - e_size *= getPrecision() == InferenceEngine::Precision::BIN ? 1 : getPrecision().size(); + e_size *= getPrecision() == ov::element::u1 ? 1 : getPrecision().size(); return e_size; } @@ -303,7 +303,7 @@ size_t CpuBlockedMemoryDesc::getPaddedElementsCount() const { return std::accumulate(blockedDims.begin(), blockedDims.end(), size_t{1}, std::multiplies()); } -MemoryDescPtr CpuBlockedMemoryDesc::cloneWithNewPrecision(const InferenceEngine::Precision prec) const { +MemoryDescPtr CpuBlockedMemoryDesc::cloneWithNewPrecision(const ov::element::Type prec) const { auto newDesc = std::make_shared(*this); newDesc->setPrecision(prec); return newDesc; diff --git a/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.h b/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.h index 27b8346d498653..4ca278fce8f9d4 100644 --- a/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.h +++ b/src/plugins/intel_cpu/src/memory_desc/cpu_blocked_memory_desc.h @@ -12,9 +12,9 @@ namespace intel_cpu { class CpuBlockedMemoryDesc : public BlockedMemoryDesc { public: - CpuBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape); + CpuBlockedMemoryDesc(ov::element::Type prc, const Shape& shape); - CpuBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& blockedDims, + CpuBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& blockedDims, const VectorDims& order, size_t offsetPadding = 0, const VectorDims& offsetPaddingToData = {}, const VectorDims& strides = {}); @@ -27,7 +27,7 @@ class CpuBlockedMemoryDesc : public BlockedMemoryDesc { bool isCompatible(const CpuBlockedMemoryDesc &rhs, CmpMask cmpMask = BlockedMemoryDesc::FULL_MASK) const; bool isCompatible(const DnnlBlockedMemoryDesc &rhs, CmpMask cmpMask = BlockedMemoryDesc::FULL_MASK) const; - InferenceEngine::Precision getPrecision() const override { + ov::element::Type getPrecision() const override { return precision; } @@ -78,7 +78,7 @@ class CpuBlockedMemoryDesc : public BlockedMemoryDesc { size_t getPaddedElementsCount() const override; - MemoryDescPtr cloneWithNewPrecision(const InferenceEngine::Precision prec) const override; + MemoryDescPtr cloneWithNewPrecision(const ov::element::Type prec) const override; private: size_t getElementOffset(size_t elemNumber) const override; @@ -91,12 +91,12 @@ class CpuBlockedMemoryDesc : public BlockedMemoryDesc { bool isDefinedImp() const override; MemoryDescPtr cloneWithNewDimsImp(const VectorDims& dims) const override; - void setPrecision(InferenceEngine::Precision prc) override { + void setPrecision(ov::element::Type prc) override { precision = prc; } private: - InferenceEngine::Precision precision; + ov::element::Type precision; size_t offsetPadding; }; diff --git a/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc.h b/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc.h index d87532d1fe17e5..2f3124e705e63d 100644 --- a/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc.h +++ b/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc.h @@ -5,10 +5,11 @@ #pragma once #include -#include + #include "cpu_shape.h" #include "cpu_types.h" #include "memory_desc/cpu_memory_desc_utils.h" +#include "openvino/core/type/element_type.hpp" /** * @brief @@ -58,7 +59,7 @@ class MemoryDesc { virtual ~MemoryDesc() = default; - virtual InferenceEngine::Precision getPrecision() const = 0; + virtual ov::element::Type getPrecision() const = 0; virtual MemoryDescPtr clone() const = 0; @@ -97,7 +98,7 @@ class MemoryDesc { return cloneWithNewDimsImp(dims); } - virtual MemoryDescPtr cloneWithNewPrecision(const InferenceEngine::Precision prec) const = 0; + virtual MemoryDescPtr cloneWithNewPrecision(const ov::element::Type prec) const = 0; virtual bool isCompatible(const MemoryDesc& rhs) const = 0; @@ -162,7 +163,7 @@ class MemoryDesc { MemoryDesc(const VectorDims& dims, MemoryDescType type) : type(type), shape(dims) {} - virtual void setPrecision(InferenceEngine::Precision prc) = 0; + virtual void setPrecision(ov::element::Type prc) = 0; virtual size_t getCurrentMemSizeImp() const = 0; diff --git a/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc_utils.cpp b/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc_utils.cpp index 5a7b6f0223ae5b..75f14d3ea8ce1d 100644 --- a/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc_utils.cpp +++ b/src/plugins/intel_cpu/src/memory_desc/cpu_memory_desc_utils.cpp @@ -3,6 +3,7 @@ // #include "cpu_memory_desc.h" +#include "ie_ngraph_utils.hpp" #include "memory_desc/cpu_memory_desc_utils.h" #include #include "memory_desc/dnnl_blocked_memory_desc.h" @@ -59,8 +60,13 @@ CpuBlockedMemoryDesc MemoryDescUtils::convertToCpuBlockedMemoryDesc(const Infere std::fill(strides.begin(), strides.end(), 0); } - return CpuBlockedMemoryDesc(desc.getPrecision(), Shape(dims), blkDesc.getBlockDims(), blkDesc.getOrder(), blkDesc.getOffsetPadding(), - blkDesc.getOffsetPaddingToData(), strides); + return CpuBlockedMemoryDesc(InferenceEngine::details::convertPrecision(desc.getPrecision()), + Shape(dims), + blkDesc.getBlockDims(), + blkDesc.getOrder(), + blkDesc.getOffsetPadding(), + blkDesc.getOffsetPaddingToData(), + strides); } DnnlBlockedMemoryDesc MemoryDescUtils::convertToDnnlBlockedMemoryDesc(const InferenceEngine::TensorDesc& desc) { @@ -77,8 +83,13 @@ DnnlBlockedMemoryDesc MemoryDescUtils::convertToDnnlBlockedMemoryDesc(const Infe std::fill(strides.begin(), strides.end(), 0); } - return DnnlBlockedMemoryDesc(desc.getPrecision(), Shape(desc.getDims()), blkDesc.getBlockDims(), blkDesc.getOrder(), blkDesc.getOffsetPadding(), - blkDesc.getOffsetPaddingToData(), strides); + return DnnlBlockedMemoryDesc(InferenceEngine::details::convertPrecision(desc.getPrecision()), + Shape(desc.getDims()), + blkDesc.getBlockDims(), + blkDesc.getOrder(), + blkDesc.getOffsetPadding(), + blkDesc.getOffsetPaddingToData(), + strides); } BlockedMemoryDescPtr MemoryDescUtils::convertToBlockedMemoryDesc(const MemoryDescPtr &desc) { @@ -107,16 +118,19 @@ InferenceEngine::TensorDesc MemoryDescUtils::interpretAsBlobDesc(const IMemory & InferenceEngine::TensorDesc MemoryDescUtils::convertToTensorDesc(const MemoryDesc& desc) { if (auto blockingDesc = dynamic_cast(&desc)) { - InferenceEngine::BlockingDesc blkDesc = desc.getShape().hasZeroDims() ? InferenceEngine::BlockingDesc(blockingDesc->getBlockDims(), - blockingDesc->getOrder(), - blockingDesc->getOffsetPadding(), - blockingDesc->getOffsetPaddingToData()) : - InferenceEngine::BlockingDesc(blockingDesc->getBlockDims(), - blockingDesc->getOrder(), - blockingDesc->getOffsetPadding(), - blockingDesc->getOffsetPaddingToData(), - blockingDesc->getStrides()); - return InferenceEngine::TensorDesc(blockingDesc->getPrecision(), blockingDesc->getShape().getStaticDims(), blkDesc); + InferenceEngine::BlockingDesc blkDesc = + desc.getShape().hasZeroDims() ? InferenceEngine::BlockingDesc(blockingDesc->getBlockDims(), + blockingDesc->getOrder(), + blockingDesc->getOffsetPadding(), + blockingDesc->getOffsetPaddingToData()) + : InferenceEngine::BlockingDesc(blockingDesc->getBlockDims(), + blockingDesc->getOrder(), + blockingDesc->getOffsetPadding(), + blockingDesc->getOffsetPaddingToData(), + blockingDesc->getStrides()); + return InferenceEngine::TensorDesc(InferenceEngine::details::convertPrecision(blockingDesc->getPrecision()), + blockingDesc->getShape().getStaticDims(), + blkDesc); } else { IE_THROW() << "Cannot convert MemoryDesc to InferenceEngine::TensorDesc"; } diff --git a/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.cpp b/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.cpp index 705c8c2fb38b54..66b48c77b042d1 100644 --- a/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.cpp +++ b/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.cpp @@ -21,7 +21,7 @@ using namespace InferenceEngine; namespace ov { namespace intel_cpu { -DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& strides) +DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& strides) : MemoryDesc(shape, DnnlBlocked) { const auto ndims = shape.getRank(); const auto &dims = shape.getDims(); @@ -31,7 +31,7 @@ DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, con OPENVINO_THROW("Can't create DnnlBlockedMemoryDesc with zero dim, but with non zero strides"); } desc = {DnnlExtensionUtils::convertToDnnlDims(dims), - DnnlExtensionUtils::IEPrecisionToDataType(prc), + DnnlExtensionUtils::ElementTypeToDataType(prc), DnnlExtensionUtils::convertToDnnlDims(strides)}; } else { dnnl::memory::dims plain_strides; @@ -46,7 +46,7 @@ DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, con } } - desc = {DnnlExtensionUtils::convertToDnnlDims(dims), DnnlExtensionUtils::IEPrecisionToDataType(prc), plain_strides}; + desc = {DnnlExtensionUtils::convertToDnnlDims(dims), DnnlExtensionUtils::ElementTypeToDataType(prc), plain_strides}; } order.resize(ndims); @@ -74,14 +74,14 @@ DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, con * * Limitation of conversion first N elements of order should be permutation of [0,1,2 ... N] */ -DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& blockedDims, +DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& blockedDims, const VectorDims& order, size_t offsetPadding, const VectorDims& offsetPaddingToData, const VectorDims& strides) : MemoryDesc(shape, DnnlBlocked) { using namespace dnnl; // scalar case if (shape.getRank() == 0) { desc.get()->format_kind = dnnl_blocked; - desc.get()->data_type = memory::convert_to_c(DnnlExtensionUtils::IEPrecisionToDataType(prc)); + desc.get()->data_type = memory::convert_to_c(DnnlExtensionUtils::ElementTypeToDataType(prc)); desc.get()->ndims = 1; desc.get()->dims[0] = 1; desc.get()->padded_dims[0] = 1; @@ -162,7 +162,7 @@ DnnlBlockedMemoryDesc::DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, con // Fill general memory desc fields desc.get()->format_kind = dnnl_blocked; desc.get()->extra.flags = 0; - desc.get()->data_type = memory::convert_to_c(DnnlExtensionUtils::IEPrecisionToDataType(prc)); + desc.get()->data_type = memory::convert_to_c(DnnlExtensionUtils::ElementTypeToDataType(prc)); desc.get()->ndims = dims.size(); desc.get()->offset0 = DnnlExtensionUtils::convertToDnnlDim(offsetPadding); std::copy(dims.begin(), dims.end(), desc.get()->dims); @@ -655,7 +655,7 @@ void DnnlBlockedMemoryDesc::initOffsetPadding() { offsetPaddingToData = VectorDims(std::begin(padded_offset), std::begin(padded_offset) + getOrder().size()); } -MemoryDescPtr DnnlBlockedMemoryDesc::cloneWithNewPrecision(const InferenceEngine::Precision prec) const { +MemoryDescPtr DnnlBlockedMemoryDesc::cloneWithNewPrecision(const ov::element::Type prec) const { auto newDesc = std::make_shared(*this); newDesc->setPrecision(prec); diff --git a/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.h b/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.h index 6c00ec7564c993..7071034ff869de 100644 --- a/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.h +++ b/src/plugins/intel_cpu/src/memory_desc/dnnl_blocked_memory_desc.h @@ -18,7 +18,7 @@ OPENVINO_DISABLE_WARNING_MSVC_BEGIN(4250) // Visual Studio warns us about inher class DnnlBlockedMemoryDesc : public BlockedMemoryDesc, public DnnlMemoryDesc { public: // Creates planar DnnlBlockedMemoryDesc - DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& strides = {}); + DnnlBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& strides = {}); DnnlBlockedMemoryDesc(const Shape& shape, dnnl::memory::data_type dataType, dnnl::memory::format_tag format); @@ -59,13 +59,13 @@ class DnnlBlockedMemoryDesc : public BlockedMemoryDesc, public DnnlMemoryDesc { size_t getPaddedElementsCount() const override; - MemoryDescPtr cloneWithNewPrecision(const InferenceEngine::Precision prec) const override; + MemoryDescPtr cloneWithNewPrecision(const ov::element::Type prec) const override; using DnnlMemoryDesc::setPrecision; using DnnlMemoryDesc::getPrecision; private: - DnnlBlockedMemoryDesc(InferenceEngine::Precision prc, const Shape& shape, const VectorDims& blockedDims, + DnnlBlockedMemoryDesc(ov::element::Type prc, const Shape& shape, const VectorDims& blockedDims, const VectorDims& order, size_t offsetPadding = 0, const VectorDims& offsetPaddingToData = {}, const VectorDims& strides = {}); diff --git a/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.cpp b/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.cpp index 3a7b65c71277d7..f55c00381a3521 100644 --- a/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.cpp +++ b/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.cpp @@ -21,15 +21,15 @@ DnnlMemoryDesc::DnnlMemoryDesc(const_dnnl_memory_desc_t cdesc) : OPENVINO_THROW("Unexpected: Memory format any is prohibited!"); } -InferenceEngine::Precision DnnlMemoryDesc::getPrecision() const { - return DnnlExtensionUtils::DataTypeToIEPrecision(getDataType()); +ov::element::Type DnnlMemoryDesc::getPrecision() const { + return DnnlExtensionUtils::DataTypeToElementType(getDataType()); } MemoryDescPtr DnnlMemoryDesc::clone() const { return std::make_shared(*this); } -MemoryDescPtr DnnlMemoryDesc::cloneWithNewPrecision(const InferenceEngine::Precision prec) const { +MemoryDescPtr DnnlMemoryDesc::cloneWithNewPrecision(const ov::element::Type prec) const { auto newDesc = std::make_shared(*this); newDesc->setPrecision(prec); return newDesc; diff --git a/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.h b/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.h index 373e66679f8824..697437233ff0d5 100644 --- a/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.h +++ b/src/plugins/intel_cpu/src/memory_desc/dnnl_memory_desc.h @@ -19,11 +19,11 @@ using DnnlMemoryDescCPtr = std::shared_ptr; class DnnlMemoryDesc : public virtual MemoryDesc { public: - InferenceEngine::Precision getPrecision() const override; + ov::element::Type getPrecision() const override; MemoryDescPtr clone() const override; - MemoryDescPtr cloneWithNewPrecision(const InferenceEngine::Precision prec) const override; + MemoryDescPtr cloneWithNewPrecision(const ov::element::Type prec) const override; bool isCompatible(const MemoryDesc& rhs) const override; bool isCompatible(const DnnlMemoryDesc& rhs) const; @@ -54,8 +54,8 @@ class DnnlMemoryDesc : public virtual MemoryDesc { dnnl::memory::desc desc; - void setPrecision(InferenceEngine::Precision prc) override { - desc.get()->data_type = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(prc)); + void setPrecision(ov::element::Type prc) override { + desc.get()->data_type = static_cast(DnnlExtensionUtils::ElementTypeToDataType(prc)); } private: diff --git a/src/plugins/intel_cpu/src/memory_state.h b/src/plugins/intel_cpu/src/memory_state.h index c1dd1bcb7354e6..047b5ebbe320d4 100644 --- a/src/plugins/intel_cpu/src/memory_state.h +++ b/src/plugins/intel_cpu/src/memory_state.h @@ -20,8 +20,9 @@ namespace intel_cpu { class VariableState : public ov::IVariableState { public: VariableState(std::string name, MemoryPtr storage) : ov::IVariableState{name} { - const auto& memDesc = MemoryDescUtils::convertToTensorDesc(storage->getDesc()); - m_state = ov::make_tensor(InferenceEngine::details::convertPrecision(memDesc.getPrecision()), memDesc.getDims()); + const auto& memDesc = storage->getDesc(); + m_state = ov::make_tensor(memDesc.getPrecision(), + memDesc.getShape().getDims()); cpu_memcpy(m_state->data(), storage->getData(), storage->getSize()); } diff --git a/src/plugins/intel_cpu/src/node.cpp b/src/plugins/intel_cpu/src/node.cpp index bb41040448375c..013313af146e87 100644 --- a/src/plugins/intel_cpu/src/node.cpp +++ b/src/plugins/intel_cpu/src/node.cpp @@ -106,7 +106,7 @@ Node::Node(const std::shared_ptr& op, bool isScalar = shape.rank().get_length() == 0; inputShapes.emplace_back(isScalar ? ov::PartialShape{1} : shape); - originalInputPrecisions.emplace_back(details::convertPrecision(op->get_input_element_type(i))); + originalInputPrecisions.emplace_back(op->get_input_element_type(i)); } if (typeStr != "Result" && typeStr != "Assign") { @@ -124,7 +124,7 @@ Node::Node(const std::shared_ptr& op, bool isScalar = shape.rank().get_length() == 0; outputShapes.emplace_back(isScalar ? ov::PartialShape{1} : shape); - originalOutputPrecisions.emplace_back(details::convertPrecision(op->get_output_element_type(i))); + originalOutputPrecisions.emplace_back(op->get_output_element_type(i)); } } @@ -512,14 +512,14 @@ std::string Node::getPrimitiveDescriptorType() const { // it is mixed precision. if (selectedPrimitiveDesc) { if (!selectedPrimitiveDesc->getConfig().inConfs.empty()) { - if (selectedPrimitiveDesc->getConfig().inConfs[0].getMemDesc()->getPrecision() != InferenceEngine::Precision::U8) { - str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().inConfs[0].getMemDesc()->getPrecision().name()); + if (selectedPrimitiveDesc->getConfig().inConfs[0].getMemDesc()->getPrecision() != ov::element::u8) { + str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().inConfs[0].getMemDesc()->getPrecision().get_type_name()); } else { str_type += "_I8"; } } else { - if (selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision() != InferenceEngine::Precision::U8) { - str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision().name()); + if (selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision() != ov::element::u8) { + str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision().get_type_name()); } else { str_type += "_I8"; } @@ -735,7 +735,7 @@ void Node::filterSupportedPrimitiveDescriptors() { // Compare by format tag auto areCompatible = [](const MemoryDesc& desc, dnnl::memory::format_tag fmt) -> bool { auto fmt_tdesc = DnnlBlockedMemoryDesc(desc.getShape(), - DnnlExtensionUtils::IEPrecisionToDataType(desc.getPrecision()), + DnnlExtensionUtils::ElementTypeToDataType(desc.getPrecision()), fmt); return desc.isCompatible(fmt_tdesc); }; @@ -1281,8 +1281,8 @@ void Node::appendPostOps(dnnl::post_ops& ops, const VectorDims &postOpDims, std: OPENVINO_THROW("Fusing of ", NameFromType(this->getType()), " operation is not implemented"); } -std::vector Node::getInputPrecisions() const { - std::vector inputPrecisions; +std::vector Node::getInputPrecisions() const { + std::vector inputPrecisions; for (size_t i = 0; i < getParentEdges().size(); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated) { @@ -1292,8 +1292,8 @@ std::vector Node::getInputPrecisions() const { return inputPrecisions; } -std::vector Node::getOutputPrecisions() const { - std::vector outputPrecisions; +std::vector Node::getOutputPrecisions() const { + std::vector outputPrecisions; for (size_t i = 0; i < getChildEdges().size(); i++) { auto childEdge = getChildEdgeAt(i); if (childEdge && childEdge->getStatus() == Edge::Status::Validated) { @@ -1303,10 +1303,10 @@ std::vector Node::getOutputPrecisions() const { return outputPrecisions; } -InferenceEngine::Precision Node::getRuntimePrecision() const { +ov::element::Type Node::getRuntimePrecision() const { // Base implementation consider precision only on data path and // assumes it is placed on 0-th port (which is true for almost all layers) - InferenceEngine::Precision runtimePrecision = Precision::UNSPECIFIED; + ov::element::Type runtimePrecision = ov::element::undefined; auto inputPrecisions = getInputPrecisions(); if (!inputPrecisions.empty()) { runtimePrecision = inputPrecisions[0]; @@ -1466,8 +1466,8 @@ std::pair, std::vector> Node::getScalesAndShifts(const buffer.resize(elementsCount); cpu_convert(constBlob->getData(), &buffer[0], - DnnlExtensionUtils::DataTypeToIEPrecision(constBlob->getDataType()), - Precision::FP32, + DnnlExtensionUtils::DataTypeToElementType(constBlob->getDataType()), + ov::element::f32, elementsCount); }; @@ -1696,7 +1696,7 @@ void Node::addSupportedPrimDesc(const std::vector& inPortConfi const std::vector& outPortConfigs, impl_desc_type implType) { auto fill_port = [] (const PortConfigurator& portConfigurator, const Shape& shape, - InferenceEngine::Precision prc, std::vector& port) -> bool { + ov::element::Type prc, std::vector& port) -> bool { // In order to simplify particular node initialization logic we just don't add config in case target shape is not supported by blockedDescCreator. // This should be suitable for major of scenarios since almost all nodes add `ncsp` blockedDescCreator which supports any shape rank. if (shape.getRank() < portConfigurator.blockedDescCreator->getMinimalRank()) @@ -1715,14 +1715,14 @@ void Node::addSupportedPrimDesc(const std::vector& inPortConfi NodeConfig config; for (size_t i = 0; i < inPortConfigs.size(); i++) { auto shape = inPortConfigs[i].shape.getRank() == 0 ? getInputShapeAtPort(i) : inPortConfigs[i].shape; - auto prc = inPortConfigs[i].prc == InferenceEngine::Precision::UNSPECIFIED ? getOriginalInputPrecisionAtPort(i) : inPortConfigs[i].prc; + auto prc = inPortConfigs[i].prc == ov::element::undefined ? getOriginalInputPrecisionAtPort(i) : inPortConfigs[i].prc; if (!fill_port(inPortConfigs[i], shape, prc, config.inConfs)) return; } for (size_t i = 0; i < outPortConfigs.size(); i++) { auto dims = outPortConfigs[i].shape.getRank() == 0 ? getOutputShapeAtPort(i) : outPortConfigs[i].shape; - auto prc = outPortConfigs[i].prc == InferenceEngine::Precision::UNSPECIFIED ? getOriginalOutputPrecisionAtPort(i) : outPortConfigs[i].prc; + auto prc = outPortConfigs[i].prc == ov::element::undefined ? getOriginalOutputPrecisionAtPort(i) : outPortConfigs[i].prc; if (!fill_port(outPortConfigs[i], dims, prc, config.outConfs)) return; } diff --git a/src/plugins/intel_cpu/src/node.h b/src/plugins/intel_cpu/src/node.h index 0e88a1f32dd84c..084bf2f403ee42 100644 --- a/src/plugins/intel_cpu/src/node.h +++ b/src/plugins/intel_cpu/src/node.h @@ -23,7 +23,6 @@ #include #include "utils/ngraph_utils.hpp" #include "openvino/core/node.hpp" -#include #include #include "cpu_types.h" #include "cpu_shape.h" @@ -52,16 +51,16 @@ using NodeWeakPtr = std::weak_ptr; class PortConfigurator { public: - PortConfigurator(ov::intel_cpu::LayoutType blockedDescType, InferenceEngine::Precision prc, const Shape& shape, + PortConfigurator(ov::intel_cpu::LayoutType blockedDescType, ov::element::Type prc, const Shape& shape, bool constant = false, int inPlace = -1) : blockedDescCreator(getBlockedDescCreator(blockedDescType)), prc(prc), shape(shape), constant(constant), inPlace(inPlace) {} - PortConfigurator(ov::intel_cpu::LayoutType blockedDescType, InferenceEngine::Precision prc = InferenceEngine::Precision::UNSPECIFIED, + PortConfigurator(ov::intel_cpu::LayoutType blockedDescType, ov::element::Type prc = ov::element::undefined, bool constant = false, int inPlace = -1) : blockedDescCreator(getBlockedDescCreator(blockedDescType)), prc(prc), constant(constant), inPlace(inPlace) {} ov::intel_cpu::BlockedDescCreator::CreatorConstPtr blockedDescCreator; - const InferenceEngine::Precision prc; + const ov::element::Type prc; const Shape shape; bool constant = false; int inPlace = -1; @@ -430,47 +429,47 @@ class Node { * @brief Returns runtime node precision based on input/output data types or data type used for computations * @return Runtime node precision */ - virtual InferenceEngine::Precision getRuntimePrecision() const; + virtual ov::element::Type getRuntimePrecision() const; - const std::vector& getOriginalInputPrecisions() const { + const std::vector& getOriginalInputPrecisions() const { return originalInputPrecisions; } - const std::vector& getOriginalOutputPrecisions() const { + const std::vector& getOriginalOutputPrecisions() const { return originalOutputPrecisions; } - InferenceEngine::Precision getOriginalInputPrecisionAtPort(size_t port) const { + ov::element::Type getOriginalInputPrecisionAtPort(size_t port) const { if (originalInputPrecisions.size() <= port) { OPENVINO_THROW("Incorrect input port number for node ", getName()); } return originalInputPrecisions[port]; } - InferenceEngine::Precision getOriginalOutputPrecisionAtPort(size_t port) const { + ov::element::Type getOriginalOutputPrecisionAtPort(size_t port) const { if (originalOutputPrecisions.size() <= port) { OPENVINO_THROW("Incorrect output port number for node ", getName()); } return originalOutputPrecisions[port]; } - void setOriginalInputPrecisionAtPort(size_t port, InferenceEngine::Precision precision) { + void setOriginalInputPrecisionAtPort(size_t port, ov::element::Type precision) { if (originalInputPrecisions.size() <= port) { OPENVINO_THROW("Incorrect input port number for node ", getName()); } originalInputPrecisions[port] = precision; } - void setOriginalOutputPrecisionAtPort(size_t port, InferenceEngine::Precision precision) { + void setOriginalOutputPrecisionAtPort(size_t port, ov::element::Type precision) { if (originalOutputPrecisions.size() <= port) { OPENVINO_THROW("Incorrect output port number for node ", getName()); } originalOutputPrecisions[port] = precision; } - void addOriginalInputPrecision(InferenceEngine::Precision precision) { + void addOriginalInputPrecision(ov::element::Type precision) { originalInputPrecisions.push_back(precision); } - void addOriginalOutputPrecision(InferenceEngine::Precision precision) { + void addOriginalOutputPrecision(ov::element::Type precision) { originalOutputPrecisions.push_back(precision); } @@ -640,13 +639,13 @@ class Node { * @brief Auxiliary function to get node input precisions * @return Vector of precisions based on information from node input edges. Return empty vector in case edges are not initialized yet. */ - virtual std::vector getInputPrecisions() const; + virtual std::vector getInputPrecisions() const; /** * @brief Auxiliary function to get node output precisions * @return Vector of precisions based on information from node output edges. Return empty vector in case edges are not initialized yet. */ - virtual std::vector getOutputPrecisions() const; + virtual std::vector getOutputPrecisions() const; void addSupportedPrimDesc(const std::vector& inPortConfigs, const std::vector& outPortConfigs, @@ -703,8 +702,8 @@ class Node { std::vector parentEdges; std::vector childEdges; - std::vector originalInputPrecisions; - std::vector originalOutputPrecisions; + std::vector originalInputPrecisions; + std::vector originalOutputPrecisions; int fusingPort; diff --git a/src/plugins/intel_cpu/src/nodes/adaptive_pooling.cpp b/src/plugins/intel_cpu/src/nodes/adaptive_pooling.cpp index 8e49ecd442581a..9c836c7a16c6aa 100644 --- a/src/plugins/intel_cpu/src/nodes/adaptive_pooling.cpp +++ b/src/plugins/intel_cpu/src/nodes/adaptive_pooling.cpp @@ -103,7 +103,7 @@ void AdaptivePooling::initSupportedPrimitiveDescriptors() { return; // we supports only fp32 currently - precision = Precision::FP32; + precision = ov::element::f32; InferenceEngine::LayerConfig config; config.inConfs.resize(2); @@ -118,12 +118,12 @@ void AdaptivePooling::initSupportedPrimitiveDescriptors() { } for (const auto &df : dataFormats) { if (algorithm == Algorithm::AdaptivePoolingAvg) { - addSupportedPrimDesc({{df, precision}, {LayoutType::ncsp, Precision::I32}}, + addSupportedPrimDesc({{df, precision}, {LayoutType::ncsp, ov::element::i32}}, {{df, precision}}, impl_desc_type::unknown); } else { - addSupportedPrimDesc({{df, precision}, {LayoutType::ncsp, Precision::I32}}, - {{df, precision}, {LayoutType::ncsp, Precision::I32}}, + addSupportedPrimDesc({{df, precision}, {LayoutType::ncsp, ov::element::i32}}, + {{df, precision}, {LayoutType::ncsp, ov::element::i32}}, impl_desc_type::unknown); } } diff --git a/src/plugins/intel_cpu/src/nodes/adaptive_pooling.h b/src/plugins/intel_cpu/src/nodes/adaptive_pooling.h index 0d8710fc054846..3ac7606c1a5e35 100644 --- a/src/plugins/intel_cpu/src/nodes/adaptive_pooling.h +++ b/src/plugins/intel_cpu/src/nodes/adaptive_pooling.h @@ -28,7 +28,7 @@ class AdaptivePooling : public Node { private: int spatialDimsCount; mutable std::vector spatialDimsValue = {}; - InferenceEngine::Precision precision = InferenceEngine::Precision::FP32; + ov::element::Type precision = ov::element::f32; inline void setBinBorders(size_t *startPtr, size_t *endPtr, size_t idx, size_t inputLength, size_t outputLength); std::string errorPrefix; diff --git a/src/plugins/intel_cpu/src/nodes/batch_to_space.cpp b/src/plugins/intel_cpu/src/nodes/batch_to_space.cpp index 34ab77a1c2165c..226c38cf3af986 100644 --- a/src/plugins/intel_cpu/src/nodes/batch_to_space.cpp +++ b/src/plugins/intel_cpu/src/nodes/batch_to_space.cpp @@ -58,33 +58,33 @@ void BatchToSpace::initSupportedPrimitiveDescriptors() { const auto precision = getOriginalInputPrecisionAtPort(0); const std::set supported_precision_sizes = {1, 2, 4, 8}; if (supported_precision_sizes.find(precision.size()) == supported_precision_sizes.end()) - OPENVINO_THROW(errorPrefix, " has unsupported precision: ", precision.name()); + OPENVINO_THROW(errorPrefix, " has unsupported precision: ", precision.get_type_name()); addSupportedPrimDesc({{LayoutType::nspc, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nspc, precision}}, impl_desc_type::ref_any); addSupportedPrimDesc({{LayoutType::ncsp, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::ncsp, precision}}, impl_desc_type::ref_any); if (inDims[1] != Shape::UNDEFINED_DIM && inDims[1] % 8 == 0) { addSupportedPrimDesc({{LayoutType::nCsp8c, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nCsp8c, precision}}, impl_desc_type::ref_any); } if (inDims[1] != Shape::UNDEFINED_DIM && inDims[1] % 16 == 0) { addSupportedPrimDesc({{LayoutType::nCsp16c, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nCsp16c, precision}}, impl_desc_type::ref_any); } @@ -238,12 +238,12 @@ void BatchToSpace::executeDynamicImpl(dnnl::stream strm) { void BatchToSpace::execute(dnnl::stream strm) { switch (getParentEdgeAt(0)->getMemory().getDesc().getPrecision().size()) { - case 1: batchToSpaceKernel::value_type>(); break; - case 2: batchToSpaceKernel::value_type>(); break; - case 4: batchToSpaceKernel::value_type>(); break; + case 1: batchToSpaceKernel::value_type>(); break; + case 2: batchToSpaceKernel::value_type>(); break; + case 4: batchToSpaceKernel::value_type>(); break; default: OPENVINO_THROW("BatchToSpace layer does not support precision '", - std::string(getParentEdgeAt(0)->getMemory().getDesc().getPrecision().name()), + std::string(getParentEdgeAt(0)->getMemory().getDesc().getPrecision().get_type_name()), "'"); } } diff --git a/src/plugins/intel_cpu/src/nodes/bin_conv.cpp b/src/plugins/intel_cpu/src/nodes/bin_conv.cpp index 9c59dbfb0d8dff..28c671b70466cb 100644 --- a/src/plugins/intel_cpu/src/nodes/bin_conv.cpp +++ b/src/plugins/intel_cpu/src/nodes/bin_conv.cpp @@ -985,7 +985,7 @@ void BinaryConvolution::initSupportedPrimitiveDescriptors() { //activation auto nspcCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::nspc); - config.inConfs[0].setMemDesc(nspcCreator->createSharedDesc(Precision::BIN, getInputShapeAtPort(0))); + config.inConfs[0].setMemDesc(nspcCreator->createSharedDesc(ov::element::u1, getInputShapeAtPort(0))); //weights size_t weiFirstDimBlockSize = implType == impl_desc_type::jit_avx512 ? 16 : 8; //memory::format_tag::OIhw16o32i : memory::format_tag::OIhw8o32i; @@ -994,10 +994,10 @@ void BinaryConvolution::initSupportedPrimitiveDescriptors() { weiDims[2], weiDims[3], weiFirstDimBlockSize, 32}; std::vector weiOrder = {0, 1, 2, 3, 0, 1}; - config.inConfs[1].setMemDesc(std::make_shared(Precision::BIN, Shape(weiDims), weiBlockDims, weiOrder)); + config.inConfs[1].setMemDesc(std::make_shared(ov::element::u1, Shape(weiDims), weiBlockDims, weiOrder)); //result - auto outputPrecision = withBinarization ? Precision::BIN : Precision::FP32; + auto outputPrecision = withBinarization ? ov::element::u1 : ov::element::f32; config.outConfs[0].setMemDesc(nspcCreator->createSharedDesc(outputPrecision, getOutputShapeAtPort(0))); if (withSum) { config.inConfs.push_back(config.outConfs[0]); @@ -1009,9 +1009,9 @@ void BinaryConvolution::initSupportedPrimitiveDescriptors() { auto weiCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::ncsp); auto nspcCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::nspc); - config.inConfs[0].setMemDesc(nspcCreator->createSharedDesc(Precision::BIN, getInputShapeAtPort(0))); - config.inConfs[1].setMemDesc(weiCreator->createSharedDesc(Precision::BIN, getInputShapeAtPort(1))); - config.outConfs[0].setMemDesc(nspcCreator->createSharedDesc(Precision::FP32, getOutputShapeAtPort(0))); + config.inConfs[0].setMemDesc(nspcCreator->createSharedDesc(ov::element::u1, getInputShapeAtPort(0))); + config.inConfs[1].setMemDesc(weiCreator->createSharedDesc(ov::element::u1, getInputShapeAtPort(1))); + config.outConfs[0].setMemDesc(nspcCreator->createSharedDesc(ov::element::f32, getOutputShapeAtPort(0))); supportedPrimitiveDescriptors.push_back({config, implType}); } } @@ -1080,9 +1080,9 @@ void BinaryConvolution::createPrimitive() { auto srcPrecision = getParentEdgeAt(0)->getMemory().getDesc().getPrecision(); auto dstPrecision = getChildEdgeAt(0)->getMemory().getDesc().getPrecision(); - jcp.dst_dt = DnnlExtensionUtils::IEPrecisionToDataType(dstPrecision); - jcp.typesize_in = srcPrecision == Precision::BIN ? 1 : srcPrecision.size(); - jcp.typesize_out = dstPrecision == Precision::BIN ? 1 : dstPrecision.size(); + jcp.dst_dt = DnnlExtensionUtils::ElementTypeToDataType(dstPrecision); + jcp.typesize_in = srcPrecision == ov::element::u1 ? 1 : srcPrecision.size(); + jcp.typesize_out = dstPrecision == ov::element::u1 ? 1 : dstPrecision.size(); int r_pad_no_tail = nstl::max(0, (jcp.ow - jcp.ur_w_tail - 1) * jcp.stride_w + (jcp.kw - 1) * (jcp.dilate_w + 1) - (jcp.iw + jcp.l_pad - 1)); diff --git a/src/plugins/intel_cpu/src/nodes/bucketize.cpp b/src/plugins/intel_cpu/src/nodes/bucketize.cpp index d70ac1858eee84..e9c99a6fee57b1 100644 --- a/src/plugins/intel_cpu/src/nodes/bucketize.cpp +++ b/src/plugins/intel_cpu/src/nodes/bucketize.cpp @@ -58,18 +58,18 @@ void Bucketize::initSupportedPrimitiveDescriptors() { // check precisions for input and output tensors input_precision = getOriginalInputPrecisionAtPort(INPUT_TENSOR_PORT); - if (input_precision != Precision::FP32 && input_precision != Precision::I32 && - input_precision != Precision::I64) { - input_precision = Precision::FP32; + if (input_precision != ov::element::f32 && input_precision != ov::element::i32 && + input_precision != ov::element::i64) { + input_precision = ov::element::f32; } boundaries_precision = getOriginalInputPrecisionAtPort(INPUT_BINS_PORT); - if (boundaries_precision != Precision::FP32 && boundaries_precision != Precision::I32 && - boundaries_precision != Precision::I64) { - boundaries_precision = Precision::FP32; + if (boundaries_precision != ov::element::f32 && boundaries_precision != ov::element::i32 && + boundaries_precision != ov::element::i64) { + boundaries_precision = ov::element::f32; } output_precision = getOriginalOutputPrecisionAtPort(OUTPUT_TENSOR_PORT); - if (output_precision != Precision::I32 && output_precision != Precision::I64) { - output_precision = Precision::I32; + if (output_precision != ov::element::i32 && output_precision != ov::element::i64) { + output_precision = ov::element::i32; } addSupportedPrimDesc({{LayoutType::ncsp, input_precision}, @@ -78,99 +78,109 @@ void Bucketize::initSupportedPrimitiveDescriptors() { impl_desc_type::ref_any); } +inline constexpr uint32_t getElementsMask(ov::element::Type precision1, + ov::element::Type precision2, + ov::element::Type precision3 = ov::element::undefined, + ov::element::Type precision4 = ov::element::undefined) { + return static_cast(ov::element::Type_t(precision1)) | + (static_cast(ov::element::Type_t(precision2)) << 8) | + (static_cast(ov::element::Type_t(precision3)) << 16) | + (static_cast(ov::element::Type_t(precision4)) << 24); +} + void Bucketize::execute(dnnl::stream strm) { - auto precision_mask = getPrecisionMask(input_precision, boundaries_precision, output_precision); + auto precision_mask = getElementsMask(input_precision, boundaries_precision, output_precision); switch (precision_mask) { - case getPrecisionMask(Precision::FP32, Precision::FP32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::FP32, Precision::FP32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::FP32, Precision::I32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::FP32, Precision::I32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::FP32, Precision::I64, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::FP32, Precision::I64, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::FP32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::FP32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::I32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::I32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::I64, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I32, Precision::I64, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::FP32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::FP32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::I32, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::I32, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::I64, Precision::I32): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); - break; - case getPrecisionMask(Precision::I64, Precision::I64, Precision::I64): - bucketize::value_type, - PrecisionTrait::value_type, - PrecisionTrait::value_type>(); + case getElementsMask(ov::element::f32, ov::element::f32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::f32, ov::element::f32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::f32, ov::element::i32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::f32, ov::element::i32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::f32, ov::element::i64, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::f32, ov::element::i64, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::f32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::f32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::i32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::i32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::i64, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i32, ov::element::i64, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::f32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::f32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::i32, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::i32, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::i64, ov::element::i32): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); + break; + case getElementsMask(ov::element::i64, ov::element::i64, ov::element::i64): + bucketize::value_type, + element_type_traits::value_type, + element_type_traits::value_type>(); break; default: OPENVINO_THROW(errorPrefix, " has unsupported precision: ", precision_mask); diff --git a/src/plugins/intel_cpu/src/nodes/bucketize.h b/src/plugins/intel_cpu/src/nodes/bucketize.h index 70ad495adfdc1c..60c20bf3204519 100644 --- a/src/plugins/intel_cpu/src/nodes/bucketize.h +++ b/src/plugins/intel_cpu/src/nodes/bucketize.h @@ -41,9 +41,9 @@ class Bucketize : public Node { bool with_right = false; bool with_bins = false; - InferenceEngine::Precision input_precision; - InferenceEngine::Precision boundaries_precision; - InferenceEngine::Precision output_precision; + ov::element::Type input_precision; + ov::element::Type boundaries_precision; + ov::element::Type output_precision; std::string errorPrefix; }; diff --git a/src/plugins/intel_cpu/src/nodes/color_convert.cpp b/src/plugins/intel_cpu/src/nodes/color_convert.cpp index 5bb287be592254..cfd9fa45bda049 100644 --- a/src/plugins/intel_cpu/src/nodes/color_convert.cpp +++ b/src/plugins/intel_cpu/src/nodes/color_convert.cpp @@ -273,9 +273,9 @@ namespace nv12 { ColorConvert::Converter::PrimitiveDescs supportedPrimitiveDescs(Node *node) { const LayoutType layout = LayoutType::ncsp; // 0,1,2,3 - const Precision precision = node->getOriginalInputPrecisionAtPort(0) == Precision::U8 - ? Precision::U8 - : Precision::FP32; + const ov::element::Type precision = node->getOriginalInputPrecisionAtPort(0) == ov::element::u8 + ? ov::element::u8 + : ov::element::f32; ColorConvert::Converter::PrimitiveDescs descs; @@ -623,9 +623,9 @@ namespace i420 { ColorConvert::Converter::PrimitiveDescs supportedPrimitiveDescs(Node *node) { const LayoutType layout = LayoutType::ncsp; // 0,1,2,3 - const Precision precision = node->getOriginalInputPrecisionAtPort(0) == Precision::U8 - ? Precision::U8 - : Precision::FP32; + const ov::element::Type precision = node->getOriginalInputPrecisionAtPort(0) == ov::element::u8 + ? ov::element::u8 + : ov::element::f32; ColorConvert::Converter::PrimitiveDescs descs; @@ -979,11 +979,11 @@ ColorConvert::Converter::Converter(Node *node, const ColorFormat & colorFormat) , _colorFormat(colorFormat) { } -InferenceEngine::Precision ColorConvert::Converter::inputPrecision(size_t idx) const { +ov::element::Type ColorConvert::Converter::inputPrecision(size_t idx) const { return _node->getParentEdgesAtPort(idx)[0]->getMemory().getDesc().getPrecision(); } -InferenceEngine::Precision ColorConvert::Converter::outputPrecision(size_t idx) const { +ov::element::Type ColorConvert::Converter::outputPrecision(size_t idx) const { return _node->getChildEdgesAtPort(idx)[0]->getMemory().getDesc().getPrecision(); } @@ -1056,20 +1056,20 @@ void ColorConvert::initSupportedNV12Impls() { // ref { auto &impls = _supportedImpls[impl_desc_type::ref][algorithm]; - impls[Precision::U8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, ref); - impls[Precision::U8][false] = SUPPORTED_IMPL(TwoPlaneConvert, uint8_t, ref); - impls[Precision::FP32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, ref); - impls[Precision::FP32][false] = SUPPORTED_IMPL(TwoPlaneConvert, float, ref); + impls[ov::element::Type_t::u8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, ref); + impls[ov::element::Type_t::u8][false] = SUPPORTED_IMPL(TwoPlaneConvert, uint8_t, ref); + impls[ov::element::Type_t::f32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, ref); + impls[ov::element::Type_t::f32][false] = SUPPORTED_IMPL(TwoPlaneConvert, float, ref); } #if defined(OPENVINO_ARCH_X86_64) // jit_uni { auto &impls = _supportedImpls[impl_desc_type::jit_uni][algorithm]; - impls[Precision::U8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, jit_uni); - impls[Precision::U8][false] = SUPPORTED_IMPL(TwoPlaneConvert, uint8_t, jit_uni); - impls[Precision::FP32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, jit_uni); - impls[Precision::FP32][false] = SUPPORTED_IMPL(TwoPlaneConvert, float, jit_uni); + impls[ov::element::Type_t::u8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, jit_uni); + impls[ov::element::Type_t::u8][false] = SUPPORTED_IMPL(TwoPlaneConvert, uint8_t, jit_uni); + impls[ov::element::Type_t::f32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, jit_uni); + impls[ov::element::Type_t::f32][false] = SUPPORTED_IMPL(TwoPlaneConvert, float, jit_uni); } #endif #undef SUPPORTED_IMPL @@ -1084,20 +1084,20 @@ void ColorConvert::initSupportedI420Impls() { // ref { auto &impls = _supportedImpls[impl_desc_type::ref][algorithm]; - impls[Precision::U8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, ref); - impls[Precision::U8][false] = SUPPORTED_IMPL(ThreePlaneConvert, uint8_t, ref); - impls[Precision::FP32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, ref); - impls[Precision::FP32][false] = SUPPORTED_IMPL(ThreePlaneConvert, float, ref); + impls[ov::element::Type_t::u8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, ref); + impls[ov::element::Type_t::u8][false] = SUPPORTED_IMPL(ThreePlaneConvert, uint8_t, ref); + impls[ov::element::Type_t::f32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, ref); + impls[ov::element::Type_t::f32][false] = SUPPORTED_IMPL(ThreePlaneConvert, float, ref); } #if defined(OPENVINO_ARCH_X86_64) // jit_uni { auto &impls = _supportedImpls[impl_desc_type::jit_uni][algorithm]; - impls[Precision::U8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, jit_uni); - impls[Precision::U8][false] = SUPPORTED_IMPL(ThreePlaneConvert, uint8_t, jit_uni); - impls[Precision::FP32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, jit_uni); - impls[Precision::FP32][false] = SUPPORTED_IMPL(ThreePlaneConvert, float, jit_uni); + impls[ov::element::Type_t::u8][true] = SUPPORTED_IMPL(SinglePlaneConvert, uint8_t, jit_uni); + impls[ov::element::Type_t::u8][false] = SUPPORTED_IMPL(ThreePlaneConvert, uint8_t, jit_uni); + impls[ov::element::Type_t::f32][true] = SUPPORTED_IMPL(SinglePlaneConvert, float, jit_uni); + impls[ov::element::Type_t::f32][false] = SUPPORTED_IMPL(ThreePlaneConvert, float, jit_uni); } #endif #undef SUPPORTED_IMPL diff --git a/src/plugins/intel_cpu/src/nodes/color_convert.h b/src/plugins/intel_cpu/src/nodes/color_convert.h index be26dc2e4cae5c..e5b97de616d43e 100644 --- a/src/plugins/intel_cpu/src/nodes/color_convert.h +++ b/src/plugins/intel_cpu/src/nodes/color_convert.h @@ -38,7 +38,7 @@ class ColorConvert : public Node { using ConverterBuilder = std::function; using SupportedImpls = multidim_map; @@ -63,8 +63,8 @@ class ColorConvert::Converter { Converter(Node *node, const ColorFormat & colorFormat); virtual ~Converter() = default; - InferenceEngine::Precision inputPrecision(size_t idx) const; - InferenceEngine::Precision outputPrecision(size_t idx) const; + ov::element::Type inputPrecision(size_t idx) const; + ov::element::Type outputPrecision(size_t idx) const; const void * input(size_t idx) const; void * output(size_t idx) const; const VectorDims & inputDims(size_t idx) const; diff --git a/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.cpp b/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.cpp index c272c9d47e6ea8..c26d13887de210 100644 --- a/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.cpp +++ b/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.cpp @@ -15,7 +15,7 @@ constexpr size_t channelsPos = 1lu; class PlainFormatCreator : public BlockedDescCreator { public: - CpuBlockedMemoryDesc createDesc(const InferenceEngine::Precision& precision, const Shape& srcShape) const override { + CpuBlockedMemoryDesc createDesc(const ov::element::Type &precision, const Shape& srcShape) const override { SizeVector order(srcShape.getRank()); std::iota(order.begin(), order.end(), 0); return CpuBlockedMemoryDesc(precision, srcShape, srcShape.getDims(), order); @@ -25,7 +25,7 @@ class PlainFormatCreator : public BlockedDescCreator { class PerChannelCreator : public BlockedDescCreator { public: - CpuBlockedMemoryDesc createDesc(const InferenceEngine::Precision &precision, const Shape& srcShape) const override { + CpuBlockedMemoryDesc createDesc(const ov::element::Type &precision, const Shape& srcShape) const override { SizeVector order(srcShape.getRank()); std::iota(order.begin(), order.end(), 0); SizeVector blkDims = srcShape.getDims(); @@ -47,7 +47,7 @@ class PerChannelCreator : public BlockedDescCreator { class ChannelBlockedCreator : public BlockedDescCreator { public: ChannelBlockedCreator(size_t blockSize) : _blockSize(blockSize) {} - CpuBlockedMemoryDesc createDesc(const InferenceEngine::Precision& precision, const Shape& srcShape) const override { + CpuBlockedMemoryDesc createDesc(const ov::element::Type& precision, const Shape& srcShape) const override { if (srcShape.getRank() < 2) { OPENVINO_THROW("Can't create blocked tensor descriptor!"); } diff --git a/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.h b/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.h index df603395d76c10..7a8f531141a0de 100644 --- a/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.h +++ b/src/plugins/intel_cpu/src/nodes/common/blocked_desc_creator.h @@ -28,9 +28,9 @@ class BlockedDescCreator { makeFilteredRange(const CreatorsMap& map, unsigned rank, const std::vector& supportedTypes); static std::pair makeFilteredRange(const CreatorsMap& map, Predicate predicate); - virtual CpuBlockedMemoryDesc createDesc(const InferenceEngine::Precision& precision, const Shape& srcShape) const = 0; + virtual CpuBlockedMemoryDesc createDesc(const ov::element::Type& precision, const Shape& srcShape) const = 0; - std::shared_ptr createSharedDesc(const InferenceEngine::Precision& precision, const Shape& srcShape) const { + std::shared_ptr createSharedDesc(const ov::element::Type& precision, const Shape& srcShape) const { return std::make_shared(createDesc(precision, srcShape)); } diff --git a/src/plugins/intel_cpu/src/nodes/common/cpu_convert.cpp b/src/plugins/intel_cpu/src/nodes/common/cpu_convert.cpp index 62dfbd3c4bc094..58fcf70d4944f4 100644 --- a/src/plugins/intel_cpu/src/nodes/common/cpu_convert.cpp +++ b/src/plugins/intel_cpu/src/nodes/common/cpu_convert.cpp @@ -164,23 +164,23 @@ void jit_convert(const TI* arg, TO* out, size_t count) { #endif -template +template struct PrecisionInfo { - using value_type = typename PrecisionTrait

::value_type; + using value_type = typename element_type_traits

::value_type; }; template <> -struct PrecisionInfo { +struct PrecisionInfo { using value_type = ov::intel_cpu::bfloat16_t; }; template <> -struct PrecisionInfo { +struct PrecisionInfo { using value_type = ov::float16; }; template <> -struct PrecisionInfo { +struct PrecisionInfo { using value_type = uint8_t; }; @@ -190,7 +190,7 @@ template::value, float, T>::type> struct Range { - const std::tuple & fit(const Precision & prec); + const std::tuple & fit(const ov::element::Type & prec); private: std::tuple _range { @@ -200,23 +200,23 @@ struct Range { }; template -const std::tuple & Range::fit(const Precision & prec) { - if (prec.is_float()) { +const std::tuple & Range::fit(const ov::element::Type & prec) { + if (prec.is_real()) { double lbound, ubound; switch (prec) { - case Precision::BF16: + case ov::element::bf16: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::FP16: + case ov::element::f16: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::FP32: + case ov::element::f32: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::FP64: + case ov::element::f64: lbound = std::numeric_limits::lowest(); ubound = std::numeric_limits::max(); break; @@ -236,36 +236,36 @@ const std::tuple & Range::fit(const Precision & prec) { int64_t lbound; uint64_t ubound; switch (prec) { - case Precision::BOOL: - case Precision::U8: + case ov::element::boolean: + case ov::element::u8: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::I8: + case ov::element::i8: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::U16: + case ov::element::u16: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::I16: + case ov::element::i16: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::U32: + case ov::element::u32: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::I32: + case ov::element::i32: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::U64: + case ov::element::u64: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; - case Precision::I64: + case ov::element::i64: lbound = static_cast(std::numeric_limits::lowest()); ubound = static_cast(std::numeric_limits::max()); break; @@ -288,8 +288,8 @@ struct ConvertContext { const void *srcPtr; void *dstPtr; size_t size; - Precision interimPrc; - Precision dstPrc; + ov::element::Type interimPrc; + ov::element::Type dstPrc; bool converted; template @@ -312,7 +312,7 @@ struct ConvertPrecision> { std::tie(lbound, ubound) = ctx.range(); if (std::is_integral::value - || ctx.interimPrc.is_float() + || ctx.interimPrc.is_real() || std::is_integral::value) { parallel_for(ctx.size, [&](size_t i) { dst[i] = static_cast(std::max(std::min(src[i], ubound), lbound)); @@ -333,7 +333,7 @@ struct ConvertPrecision> { auto src = static_cast(ctx.srcPtr); auto dst = static_cast(ctx.dstPtr); - if (ctx.interimPrc.is_float()) { + if (ctx.interimPrc.is_real()) { parallel_for(ctx.size, [&](size_t i) { dst[i] = static_cast(src[i]); }); @@ -355,7 +355,7 @@ struct ConvertPrecision> { auto src = static_cast(ctx.srcPtr); auto dst = static_cast(ctx.dstPtr); - if (ctx.interimPrc.is_float()) { + if (ctx.interimPrc.is_real()) { parallel_for(ctx.size, [&](size_t i) { dst[i] = static_cast(src[i]); }); @@ -386,7 +386,7 @@ struct ConvertPrecision> { std::tie(lbound, ubound) = ctx.range(); if (std::is_integral::value - || ctx.interimPrc.is_float()) { + || ctx.interimPrc.is_real()) { parallel_for(iterations, [&](size_t i) { batch_type tmp; const size_t offset = i * batch; @@ -423,7 +423,7 @@ struct ConvertPrecision> { float lbound, ubound; std::tie(lbound, ubound) = ctx.range(); - if (ctx.interimPrc.is_float() + if (ctx.interimPrc.is_real() || std::is_integral::value) { parallel_for(iterations, [&](size_t i) { batch_type tmp; @@ -461,7 +461,7 @@ struct ConvertPrecision> { float lbound, ubound; std::tie(lbound, ubound) = ctx.range(); - if (ctx.interimPrc.is_float()) { + if (ctx.interimPrc.is_real()) { cpu_memcpy(dst, src, ctx.size * sizeof(ov::float16)); } else { parallel_for(iterations, [&](size_t i) { @@ -482,61 +482,65 @@ struct ConvertPrecision> { } // namespace -#define INTEL_CPU_CVT(ST, DT) OV_CASE2(Precision::ST, Precision::DT, PrecisionInfo::value_type, PrecisionInfo::value_type) - -#define INTEL_CPU_CVT_LIST \ - INTEL_CPU_CVT(U8, I8), INTEL_CPU_CVT(U8, U16), INTEL_CPU_CVT(U8, I16), INTEL_CPU_CVT(U8, U32), \ - INTEL_CPU_CVT(U8, I32), INTEL_CPU_CVT(U8, U64), INTEL_CPU_CVT(U8, I64), INTEL_CPU_CVT(U8, FP32), \ - INTEL_CPU_CVT(U8, FP16), INTEL_CPU_CVT(U8, BF16), INTEL_CPU_CVT(U8, FP64), INTEL_CPU_CVT(U8, BOOL), \ - INTEL_CPU_CVT(I8, U8), INTEL_CPU_CVT(I8, U16), INTEL_CPU_CVT(I8, I16), INTEL_CPU_CVT(I8, U32), \ - INTEL_CPU_CVT(I8, I32), INTEL_CPU_CVT(I8, U64), INTEL_CPU_CVT(I8, I64), INTEL_CPU_CVT(I8, FP32), \ - INTEL_CPU_CVT(I8, FP16), INTEL_CPU_CVT(I8, BF16), INTEL_CPU_CVT(I8, FP64), INTEL_CPU_CVT(I8, BOOL), \ - INTEL_CPU_CVT(U16, U8), INTEL_CPU_CVT(U16, I8), INTEL_CPU_CVT(U16, I16), INTEL_CPU_CVT(U16, U32), \ - INTEL_CPU_CVT(U16, I32), INTEL_CPU_CVT(U16, U64), INTEL_CPU_CVT(U16, I64), INTEL_CPU_CVT(U16, FP32), \ - INTEL_CPU_CVT(U16, FP16), INTEL_CPU_CVT(U16, BF16), INTEL_CPU_CVT(U16, FP64), INTEL_CPU_CVT(U16, BOOL), \ - INTEL_CPU_CVT(I16, U8), INTEL_CPU_CVT(I16, I8), INTEL_CPU_CVT(I16, U16), INTEL_CPU_CVT(I16, U32), \ - INTEL_CPU_CVT(I16, I32), INTEL_CPU_CVT(I16, U64), INTEL_CPU_CVT(I16, I64), INTEL_CPU_CVT(I16, FP32), \ - INTEL_CPU_CVT(I16, FP16), INTEL_CPU_CVT(I16, BF16), INTEL_CPU_CVT(I16, FP64), INTEL_CPU_CVT(I16, BOOL), \ - INTEL_CPU_CVT(U32, U8), INTEL_CPU_CVT(U32, I8), INTEL_CPU_CVT(U32, U16), INTEL_CPU_CVT(U32, I16), \ - INTEL_CPU_CVT(U32, I32), INTEL_CPU_CVT(U32, U64), INTEL_CPU_CVT(U32, I64), INTEL_CPU_CVT(U32, FP32), \ - INTEL_CPU_CVT(U32, FP16), INTEL_CPU_CVT(U32, BF16), INTEL_CPU_CVT(U32, FP64), INTEL_CPU_CVT(U32, BOOL), \ - INTEL_CPU_CVT(I32, U8), INTEL_CPU_CVT(I32, I8), INTEL_CPU_CVT(I32, U16), INTEL_CPU_CVT(I32, I16), \ - INTEL_CPU_CVT(I32, U32), INTEL_CPU_CVT(I32, U64), INTEL_CPU_CVT(I32, I64), INTEL_CPU_CVT(I32, FP32), \ - INTEL_CPU_CVT(I32, FP16), INTEL_CPU_CVT(I32, BF16), INTEL_CPU_CVT(I32, FP64), INTEL_CPU_CVT(I32, BOOL), \ - INTEL_CPU_CVT(U64, U8), INTEL_CPU_CVT(U64, I8), INTEL_CPU_CVT(U64, U16), INTEL_CPU_CVT(U64, I16), \ - INTEL_CPU_CVT(U64, U32), INTEL_CPU_CVT(U64, I32), INTEL_CPU_CVT(U64, I64), INTEL_CPU_CVT(U64, FP32), \ - INTEL_CPU_CVT(U64, FP16), INTEL_CPU_CVT(U64, BF16), INTEL_CPU_CVT(U64, FP64), INTEL_CPU_CVT(U64, BOOL), \ - INTEL_CPU_CVT(I64, U8), INTEL_CPU_CVT(I64, I8), INTEL_CPU_CVT(I64, U16), INTEL_CPU_CVT(I64, I16), \ - INTEL_CPU_CVT(I64, U32), INTEL_CPU_CVT(I64, I32), INTEL_CPU_CVT(I64, U64), INTEL_CPU_CVT(I64, FP32), \ - INTEL_CPU_CVT(I64, FP16), INTEL_CPU_CVT(I64, BF16), INTEL_CPU_CVT(I64, FP64), INTEL_CPU_CVT(I64, BOOL), \ - INTEL_CPU_CVT(FP32, U8), INTEL_CPU_CVT(FP32, I8), INTEL_CPU_CVT(FP32, U16), INTEL_CPU_CVT(FP32, I16), \ - INTEL_CPU_CVT(FP32, U32), INTEL_CPU_CVT(FP32, I32), INTEL_CPU_CVT(FP32, U64), INTEL_CPU_CVT(FP32, I64), \ - INTEL_CPU_CVT(FP32, FP16), INTEL_CPU_CVT(FP32, BF16), INTEL_CPU_CVT(FP32, FP64), INTEL_CPU_CVT(FP32, BOOL), \ - INTEL_CPU_CVT(FP16, U8), INTEL_CPU_CVT(FP16, I8), INTEL_CPU_CVT(FP16, U16), INTEL_CPU_CVT(FP16, I16), \ - INTEL_CPU_CVT(FP16, U32), INTEL_CPU_CVT(FP16, I32), INTEL_CPU_CVT(FP16, U64), INTEL_CPU_CVT(FP16, I64), \ - INTEL_CPU_CVT(FP16, FP32), INTEL_CPU_CVT(FP16, BF16), INTEL_CPU_CVT(FP16, FP64), INTEL_CPU_CVT(FP16, BOOL), \ - INTEL_CPU_CVT(BF16, U8), INTEL_CPU_CVT(BF16, I8), INTEL_CPU_CVT(BF16, U16), INTEL_CPU_CVT(BF16, I16), \ - INTEL_CPU_CVT(BF16, U32), INTEL_CPU_CVT(BF16, I32), INTEL_CPU_CVT(BF16, U64), INTEL_CPU_CVT(BF16, I64), \ - INTEL_CPU_CVT(BF16, FP32), INTEL_CPU_CVT(BF16, FP16), INTEL_CPU_CVT(BF16, FP64), INTEL_CPU_CVT(BF16, BOOL), \ - INTEL_CPU_CVT(FP64, U8), INTEL_CPU_CVT(FP64, I8), INTEL_CPU_CVT(FP64, U16), INTEL_CPU_CVT(FP64, I16), \ - INTEL_CPU_CVT(FP64, U32), INTEL_CPU_CVT(FP64, I32), INTEL_CPU_CVT(FP64, U64), INTEL_CPU_CVT(FP64, I64), \ - INTEL_CPU_CVT(FP64, FP32), INTEL_CPU_CVT(FP64, FP16), INTEL_CPU_CVT(FP64, BF16), INTEL_CPU_CVT(FP64, BOOL), \ - INTEL_CPU_CVT(BOOL, U8), INTEL_CPU_CVT(BOOL, I8), INTEL_CPU_CVT(BOOL, U16), INTEL_CPU_CVT(BOOL, I16), \ - INTEL_CPU_CVT(BOOL, U32), INTEL_CPU_CVT(BOOL, I32), INTEL_CPU_CVT(BOOL, U64), INTEL_CPU_CVT(BOOL, I64), \ - INTEL_CPU_CVT(BOOL, FP32), INTEL_CPU_CVT(BOOL, FP16), INTEL_CPU_CVT(BOOL, BF16), INTEL_CPU_CVT(BOOL, FP64), \ - INTEL_CPU_CVT(U8, U8), INTEL_CPU_CVT(I8, I8), INTEL_CPU_CVT(U16, U16), INTEL_CPU_CVT(I16, I16), \ - INTEL_CPU_CVT(U32, U32), INTEL_CPU_CVT(I32, I32), INTEL_CPU_CVT(U64, U64), INTEL_CPU_CVT(I64, I64), \ - INTEL_CPU_CVT(FP32, FP32), INTEL_CPU_CVT(FP16, FP16), INTEL_CPU_CVT(BF16, BF16), INTEL_CPU_CVT(FP64, FP64), \ - INTEL_CPU_CVT(BOOL, BOOL) - -#define INTEL_CPU_CVT_FROM_BIN(DT) OV_CASE(Precision::DT, PrecisionInfo::value_type) - -#define INTEL_CPU_CVT_FROM_BIN_LIST \ - INTEL_CPU_CVT_FROM_BIN(FP32), INTEL_CPU_CVT_FROM_BIN(FP16), INTEL_CPU_CVT_FROM_BIN(BF16), \ - INTEL_CPU_CVT_FROM_BIN(FP64), INTEL_CPU_CVT_FROM_BIN(I16), INTEL_CPU_CVT_FROM_BIN(U8), \ - INTEL_CPU_CVT_FROM_BIN(I8), INTEL_CPU_CVT_FROM_BIN(U16), INTEL_CPU_CVT_FROM_BIN(I32), \ - INTEL_CPU_CVT_FROM_BIN(U32), INTEL_CPU_CVT_FROM_BIN(I64), INTEL_CPU_CVT_FROM_BIN(U64), \ - INTEL_CPU_CVT_FROM_BIN(BOOL) +#define INTEL_CPU_CVT(ST, DT) \ + OV_CASE2(ov::element::ST, \ + ov::element::DT, \ + PrecisionInfo::value_type, \ + PrecisionInfo::value_type) + +#define INTEL_CPU_CVT_LIST \ + INTEL_CPU_CVT(u8, i8), INTEL_CPU_CVT(u8, u16), INTEL_CPU_CVT(u8, i16), INTEL_CPU_CVT(u8, u32), \ + INTEL_CPU_CVT(u8, i32), INTEL_CPU_CVT(u8, u64), INTEL_CPU_CVT(u8, i64), INTEL_CPU_CVT(u8, f32), \ + INTEL_CPU_CVT(u8, f16), INTEL_CPU_CVT(u8, bf16), INTEL_CPU_CVT(u8, f64), INTEL_CPU_CVT(u8, boolean), \ + INTEL_CPU_CVT(i8, u8), INTEL_CPU_CVT(i8, u16), INTEL_CPU_CVT(i8, i16), INTEL_CPU_CVT(i8, u32), \ + INTEL_CPU_CVT(i8, i32), INTEL_CPU_CVT(i8, u64), INTEL_CPU_CVT(i8, i64), INTEL_CPU_CVT(i8, f32), \ + INTEL_CPU_CVT(i8, f16), INTEL_CPU_CVT(i8, bf16), INTEL_CPU_CVT(i8, f64), INTEL_CPU_CVT(i8, boolean), \ + INTEL_CPU_CVT(u16, u8), INTEL_CPU_CVT(u16, i8), INTEL_CPU_CVT(u16, i16), INTEL_CPU_CVT(u16, u32), \ + INTEL_CPU_CVT(u16, i32), INTEL_CPU_CVT(u16, u64), INTEL_CPU_CVT(u16, i64), INTEL_CPU_CVT(u16, f32), \ + INTEL_CPU_CVT(u16, f16), INTEL_CPU_CVT(u16, bf16), INTEL_CPU_CVT(u16, f64), INTEL_CPU_CVT(u16, boolean), \ + INTEL_CPU_CVT(i16, u8), INTEL_CPU_CVT(i16, i8), INTEL_CPU_CVT(i16, u16), INTEL_CPU_CVT(i16, u32), \ + INTEL_CPU_CVT(i16, i32), INTEL_CPU_CVT(i16, u64), INTEL_CPU_CVT(i16, i64), INTEL_CPU_CVT(i16, f32), \ + INTEL_CPU_CVT(i16, f16), INTEL_CPU_CVT(i16, bf16), INTEL_CPU_CVT(i16, f64), INTEL_CPU_CVT(i16, boolean), \ + INTEL_CPU_CVT(u32, u8), INTEL_CPU_CVT(u32, i8), INTEL_CPU_CVT(u32, u16), INTEL_CPU_CVT(u32, i16), \ + INTEL_CPU_CVT(u32, i32), INTEL_CPU_CVT(u32, u64), INTEL_CPU_CVT(u32, i64), INTEL_CPU_CVT(u32, f32), \ + INTEL_CPU_CVT(u32, f16), INTEL_CPU_CVT(u32, bf16), INTEL_CPU_CVT(u32, f64), INTEL_CPU_CVT(u32, boolean), \ + INTEL_CPU_CVT(i32, u8), INTEL_CPU_CVT(i32, i8), INTEL_CPU_CVT(i32, u16), INTEL_CPU_CVT(i32, i16), \ + INTEL_CPU_CVT(i32, u32), INTEL_CPU_CVT(i32, u64), INTEL_CPU_CVT(i32, i64), INTEL_CPU_CVT(i32, f32), \ + INTEL_CPU_CVT(i32, f16), INTEL_CPU_CVT(i32, bf16), INTEL_CPU_CVT(i32, f64), INTEL_CPU_CVT(i32, boolean), \ + INTEL_CPU_CVT(u64, u8), INTEL_CPU_CVT(u64, i8), INTEL_CPU_CVT(u64, u16), INTEL_CPU_CVT(u64, i16), \ + INTEL_CPU_CVT(u64, u32), INTEL_CPU_CVT(u64, i32), INTEL_CPU_CVT(u64, i64), INTEL_CPU_CVT(u64, f32), \ + INTEL_CPU_CVT(u64, f16), INTEL_CPU_CVT(u64, bf16), INTEL_CPU_CVT(u64, f64), INTEL_CPU_CVT(u64, boolean), \ + INTEL_CPU_CVT(i64, u8), INTEL_CPU_CVT(i64, i8), INTEL_CPU_CVT(i64, u16), INTEL_CPU_CVT(i64, i16), \ + INTEL_CPU_CVT(i64, u32), INTEL_CPU_CVT(i64, i32), INTEL_CPU_CVT(i64, u64), INTEL_CPU_CVT(i64, f32), \ + INTEL_CPU_CVT(i64, f16), INTEL_CPU_CVT(i64, bf16), INTEL_CPU_CVT(i64, f64), INTEL_CPU_CVT(i64, boolean), \ + INTEL_CPU_CVT(f32, u8), INTEL_CPU_CVT(f32, i8), INTEL_CPU_CVT(f32, u16), INTEL_CPU_CVT(f32, i16), \ + INTEL_CPU_CVT(f32, u32), INTEL_CPU_CVT(f32, i32), INTEL_CPU_CVT(f32, u64), INTEL_CPU_CVT(f32, i64), \ + INTEL_CPU_CVT(f32, f16), INTEL_CPU_CVT(f32, bf16), INTEL_CPU_CVT(f32, f64), INTEL_CPU_CVT(f32, boolean), \ + INTEL_CPU_CVT(f16, u8), INTEL_CPU_CVT(f16, i8), INTEL_CPU_CVT(f16, u16), INTEL_CPU_CVT(f16, i16), \ + INTEL_CPU_CVT(f16, u32), INTEL_CPU_CVT(f16, i32), INTEL_CPU_CVT(f16, u64), INTEL_CPU_CVT(f16, i64), \ + INTEL_CPU_CVT(f16, f32), INTEL_CPU_CVT(f16, bf16), INTEL_CPU_CVT(f16, f64), INTEL_CPU_CVT(f16, boolean), \ + INTEL_CPU_CVT(bf16, u8), INTEL_CPU_CVT(bf16, i8), INTEL_CPU_CVT(bf16, u16), INTEL_CPU_CVT(bf16, i16), \ + INTEL_CPU_CVT(bf16, u32), INTEL_CPU_CVT(bf16, i32), INTEL_CPU_CVT(bf16, u64), INTEL_CPU_CVT(bf16, i64), \ + INTEL_CPU_CVT(bf16, f32), INTEL_CPU_CVT(bf16, f16), INTEL_CPU_CVT(bf16, f64), INTEL_CPU_CVT(bf16, boolean), \ + INTEL_CPU_CVT(f64, u8), INTEL_CPU_CVT(f64, i8), INTEL_CPU_CVT(f64, u16), INTEL_CPU_CVT(f64, i16), \ + INTEL_CPU_CVT(f64, u32), INTEL_CPU_CVT(f64, i32), INTEL_CPU_CVT(f64, u64), INTEL_CPU_CVT(f64, i64), \ + INTEL_CPU_CVT(f64, f32), INTEL_CPU_CVT(f64, f16), INTEL_CPU_CVT(f64, bf16), INTEL_CPU_CVT(f64, boolean), \ + INTEL_CPU_CVT(boolean, u8), INTEL_CPU_CVT(boolean, i8), INTEL_CPU_CVT(boolean, u16), \ + INTEL_CPU_CVT(boolean, i16), INTEL_CPU_CVT(boolean, u32), INTEL_CPU_CVT(boolean, i32), \ + INTEL_CPU_CVT(boolean, u64), INTEL_CPU_CVT(boolean, i64), INTEL_CPU_CVT(boolean, f32), \ + INTEL_CPU_CVT(boolean, f16), INTEL_CPU_CVT(boolean, bf16), INTEL_CPU_CVT(boolean, f64), INTEL_CPU_CVT(u8, u8), \ + INTEL_CPU_CVT(i8, i8), INTEL_CPU_CVT(u16, u16), INTEL_CPU_CVT(i16, i16), INTEL_CPU_CVT(u32, u32), \ + INTEL_CPU_CVT(i32, i32), INTEL_CPU_CVT(u64, u64), INTEL_CPU_CVT(i64, i64), INTEL_CPU_CVT(f32, f32), \ + INTEL_CPU_CVT(f16, f16), INTEL_CPU_CVT(bf16, bf16), INTEL_CPU_CVT(f64, f64), INTEL_CPU_CVT(boolean, boolean) + +#define INTEL_CPU_CVT_FROM_BIN(DT) OV_CASE(ov::element::DT, PrecisionInfo::value_type) + +#define INTEL_CPU_CVT_FROM_BIN_LIST \ + INTEL_CPU_CVT_FROM_BIN(f32), INTEL_CPU_CVT_FROM_BIN(f16), INTEL_CPU_CVT_FROM_BIN(bf16), \ + INTEL_CPU_CVT_FROM_BIN(f64), INTEL_CPU_CVT_FROM_BIN(i16), INTEL_CPU_CVT_FROM_BIN(u8), \ + INTEL_CPU_CVT_FROM_BIN(i8), INTEL_CPU_CVT_FROM_BIN(u16), INTEL_CPU_CVT_FROM_BIN(i32), \ + INTEL_CPU_CVT_FROM_BIN(u32), INTEL_CPU_CVT_FROM_BIN(i64), INTEL_CPU_CVT_FROM_BIN(u64), \ + INTEL_CPU_CVT_FROM_BIN(boolean) struct ConvertFromBinContext { const void *srcPtr; @@ -563,15 +567,15 @@ struct ConvertFromBinPrecision { }; -void cpu_convert(const void *srcPtr, void *dstPtr, Precision srcPrc, Precision dstPrc, const size_t size) { +void cpu_convert(const void *srcPtr, void *dstPtr, ov::element::Type srcPrc, ov::element::Type dstPrc, const size_t size) { cpu_convert(srcPtr, dstPtr, srcPrc, dstPrc, dstPrc, size); } void cpu_convert(const void *srcPtr, void *dstPtr, - InferenceEngine::Precision srcPrc, - InferenceEngine::Precision interimPrc, - InferenceEngine::Precision dstPrc, + ov::element::Type srcPrc, + ov::element::Type interimPrc, + ov::element::Type dstPrc, const size_t size) { if (srcPtr == nullptr || dstPtr == nullptr) OPENVINO_THROW("cpu_convert has null data pointer"); @@ -590,12 +594,12 @@ void cpu_convert(const void *srcPtr, } else { cpu_memcpy(dstPtr, srcPtr, size * dstPrc.size()); } - } else if (srcPrc == Precision::BIN) { - if (srcPrc.bitsSize() != 1) + } else if (srcPrc == ov::element::u1) { + if (srcPrc.bitwidth() != 1) OPENVINO_THROW("cpu_convert can't convert from: ", srcPrc, " precision to: ", dstPrc, ". Not implemented."); @@ -610,7 +614,7 @@ void cpu_convert(const void *srcPtr, OPENVINO_THROW("cpu_convert can't convert from: ", srcPrc, " precision to: ", dstPrc); } else { diff --git a/src/plugins/intel_cpu/src/nodes/common/cpu_convert.h b/src/plugins/intel_cpu/src/nodes/common/cpu_convert.h index 7f4a65c829d391..2613c820b4c5dc 100644 --- a/src/plugins/intel_cpu/src/nodes/common/cpu_convert.h +++ b/src/plugins/intel_cpu/src/nodes/common/cpu_convert.h @@ -2,7 +2,7 @@ // SPDX-License-Identifier: Apache-2.0 // -#include +#include "openvino/core/type/element_type.hpp" namespace ov { namespace intel_cpu { @@ -24,8 +24,8 @@ namespace intel_cpu { */ void cpu_convert(const void *srcPtr, void *dstPtr, - InferenceEngine::Precision srcPrc, - InferenceEngine::Precision dstPrc, + ov::element::Type srcPrc, + ov::element::Type dstPrc, const size_t size); /** @@ -47,9 +47,9 @@ void cpu_convert(const void *srcPtr, */ void cpu_convert(const void *srcPtr, void *dstPtr, - InferenceEngine::Precision srcPrc, - InferenceEngine::Precision interimPrc, - InferenceEngine::Precision dstPrc, + ov::element::Type srcPrc, + ov::element::Type interimPrc, + ov::element::Type dstPrc, const size_t size); } // namespace intel_cpu diff --git a/src/plugins/intel_cpu/src/nodes/common/softmax.cpp b/src/plugins/intel_cpu/src/nodes/common/softmax.cpp index 13dc936a2e3b09..ee4313d9045f89 100644 --- a/src/plugins/intel_cpu/src/nodes/common/softmax.cpp +++ b/src/plugins/intel_cpu/src/nodes/common/softmax.cpp @@ -35,8 +35,8 @@ struct jit_args_softmax { }; struct jit_softmax_config_params { - Precision src_dt; - Precision dst_dt; + ov::element::Type src_dt; + ov::element::Type dst_dt; }; @@ -197,12 +197,12 @@ struct jit_uni_softmax_kernel_f32 : public jit_uni_softmax_kernel, public jit_ge jit_softmax_config_params jcp_; - inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, Precision src_dt) { + inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, ov::element::Type src_dt) { switch (src_dt) { - case Precision::FP32: + case ov::element::f32: uni_vmovups(vmm_src, op); break; - case Precision::BF16: + case ov::element::bf16: vpmovzxwd(vmm_src, op); uni_vpslld(vmm_src, vmm_src, 16); break; @@ -210,14 +210,14 @@ struct jit_uni_softmax_kernel_f32 : public jit_uni_softmax_kernel, public jit_ge assert(!"unknown src_dt"); } } - inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, Precision dst_dt) { + inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, ov::element::Type dst_dt) { Xbyak::Ymm ymm_dst = Xbyak::Ymm(vmm_dst.getIdx()); switch (dst_dt) { - case Precision::FP32: + case ov::element::f32: uni_vmovups(op, vmm_dst); break; - case Precision::BF16: + case ov::element::bf16: uni_vcvtneps2bf16->emit_code({static_cast(vmm_dst.getIdx())}, {static_cast(ymm_dst.getIdx())}); vmovdqu16(op, ymm_dst); break; @@ -227,9 +227,9 @@ struct jit_uni_softmax_kernel_f32 : public jit_uni_softmax_kernel, public jit_ge } }; #endif -SoftmaxGeneric::SoftmaxGeneric(Precision inpPrc, Precision outPrc) +SoftmaxGeneric::SoftmaxGeneric(ov::element::Type inpPrc, ov::element::Type outPrc) : input_prec(inpPrc), output_prec(outPrc) { - if (Precision::BF16 == output_prec) { + if (ov::element::bf16 == output_prec) { if (!mayiuse(avx512_core)) { OPENVINO_THROW("SoftmaxGeneric doesn't support BF16 precision on this target."); } @@ -301,30 +301,30 @@ void SoftmaxGeneric::calculate(const in_data_t *src_data, out_data_t *dst_data, } void SoftmaxGeneric::execute(const uint8_t *src_data, uint8_t *dst_data, int B, int C, int H, int W) { - if (Precision::FP32 == input_prec) { + if (ov::element::f32 == input_prec) { auto float_src_data = reinterpret_cast(src_data); - if (Precision::FP32 == output_prec) { + if (ov::element::f32 == output_prec) { auto float_dst_data = reinterpret_cast(dst_data); calculate(float_src_data, float_dst_data, B, C, H, W); - } else if (Precision::BF16 == output_prec) { + } else if (ov::element::bf16 == output_prec) { auto bf16_dst_data = reinterpret_cast(dst_data); calculate(float_src_data, bf16_dst_data, B, C, H, W); } else { - OPENVINO_THROW("Unsupported output precision: ", output_prec.name()); + OPENVINO_THROW("Unsupported output precision: ", output_prec.get_type_name()); } - } else if (Precision::BF16 == input_prec) { + } else if (ov::element::bf16 == input_prec) { auto bf16_src_data = reinterpret_cast(src_data); - if (Precision::FP32 == output_prec) { + if (ov::element::f32 == output_prec) { auto float_dst_data = reinterpret_cast(dst_data); calculate(bf16_src_data, float_dst_data, B, C, H, W); - } else if (Precision::BF16 == output_prec) { + } else if (ov::element::bf16 == output_prec) { auto bf16_dst_data = reinterpret_cast(dst_data); calculate(bf16_dst_data, bf16_dst_data, B, C, H, W); } else { - OPENVINO_THROW("Unsupported output precision: ", output_prec.name()); + OPENVINO_THROW("Unsupported output precision: ", output_prec.get_type_name()); } } else { - OPENVINO_THROW("Unsupported input precision: ", input_prec.name()); + OPENVINO_THROW("Unsupported input precision: ", input_prec.get_type_name()); } } diff --git a/src/plugins/intel_cpu/src/nodes/common/softmax.h b/src/plugins/intel_cpu/src/nodes/common/softmax.h index 6f02454ba3d47a..d1513e6f51818d 100644 --- a/src/plugins/intel_cpu/src/nodes/common/softmax.h +++ b/src/plugins/intel_cpu/src/nodes/common/softmax.h @@ -6,7 +6,7 @@ #include #include -#include +#include "openvino/core/type/element_type.hpp" #include "defs.h" #include "openvino/core/parallel.hpp" @@ -41,7 +41,7 @@ void softmax_many_batches(const float *src_data, float *dst_data, int B, int C, class SoftmaxGeneric { public: - SoftmaxGeneric(InferenceEngine::Precision inpPrc, InferenceEngine::Precision outPrc); + SoftmaxGeneric(ov::element::Type inpPrc, ov::element::Type outPrc); void execute(const uint8_t *src_data, uint8_t *dst_data, int B, int C, int H, int W); private: @@ -50,7 +50,7 @@ class SoftmaxGeneric { private: int block_size; - InferenceEngine::Precision input_prec, output_prec; + ov::element::Type input_prec, output_prec; std::shared_ptr softmax_kernel; }; diff --git a/src/plugins/intel_cpu/src/nodes/common/tile_broadcast_utils.cpp b/src/plugins/intel_cpu/src/nodes/common/tile_broadcast_utils.cpp index 327b102492a4bc..37855bcf9198ae 100644 --- a/src/plugins/intel_cpu/src/nodes/common/tile_broadcast_utils.cpp +++ b/src/plugins/intel_cpu/src/nodes/common/tile_broadcast_utils.cpp @@ -93,7 +93,7 @@ bool TileBroadcastCommon::canBeExecutedInNSPCLayout(VectorDims srcBlockedDims, V std::vector TileBroadcastCommon::getSupportedConfigs(const Node *node) { std::vector supportedPrimitiveDescriptors; auto precision = node->getOriginalInputPrecisionAtPort(0); - auto dataType = DnnlExtensionUtils::IEPrecisionToDataType(precision); + auto dataType = DnnlExtensionUtils::ElementTypeToDataType(precision); const auto& srcDims = node->getInputShapeAtPort(0).getDims(); const auto& inDataShape = node->getInputShapeAtPort(0); @@ -115,11 +115,11 @@ std::vector TileBroadcastCommon::getSupportedConfigs(const Node *node) config.inConfs[0].constant(constMap[0]); config.inConfs[1].inPlace(-1); config.inConfs[1].constant(constMap[1]); - config.inConfs[1].setMemDesc(std::make_shared(Precision::I32, node->getInputShapeAtPort(1))); + config.inConfs[1].setMemDesc(std::make_shared(ov::element::i32, node->getInputShapeAtPort(1))); if (config.inConfs.size() == 3) { config.inConfs[2].inPlace(-1); config.inConfs[2].constant(constMap[2]); - config.inConfs[2].setMemDesc(std::make_shared(Precision::I32, node->getInputShapeAtPort(2))); + config.inConfs[2].setMemDesc(std::make_shared(ov::element::i32, node->getInputShapeAtPort(2))); } config.outConfs.resize(node->getChildEdges().size()); diff --git a/src/plugins/intel_cpu/src/nodes/concat.cpp b/src/plugins/intel_cpu/src/nodes/concat.cpp index 15deb1499aae10..0636e2bada3054 100644 --- a/src/plugins/intel_cpu/src/nodes/concat.cpp +++ b/src/plugins/intel_cpu/src/nodes/concat.cpp @@ -111,7 +111,7 @@ void Concat::initSupportedPrimitiveDescriptors() { // Concat doesn't support different precision on inputs so fallback on FP32 in such case if (isMixedPrecision) - inputPrecision = Precision::FP32; + inputPrecision = ov::element::f32; // Concat supports only equal precisions for inputs and output outputPrecision = inputPrecision; @@ -476,7 +476,7 @@ void Concat::execute(dnnl::stream strm) { } } -InferenceEngine::Precision Concat::getRuntimePrecision() const { +ov::element::Type Concat::getRuntimePrecision() const { return getMaxPrecision(getInputPrecisions()); } diff --git a/src/plugins/intel_cpu/src/nodes/concat.h b/src/plugins/intel_cpu/src/nodes/concat.h index 5c34396e23197f..4424aa60216b92 100644 --- a/src/plugins/intel_cpu/src/nodes/concat.h +++ b/src/plugins/intel_cpu/src/nodes/concat.h @@ -7,7 +7,6 @@ #include #include #include -#include #include namespace ov { @@ -28,7 +27,7 @@ class Concat : public Node { void executeDynamicImpl(dnnl::stream strm) override { execute(strm); } void resolveInPlaceEdges(Edge::LOOK look) override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; bool isExecutable() const override; bool needPrepareParams() const override; @@ -47,8 +46,8 @@ class Concat : public Node { std::vector dstOffset; // dst offset for each input std::vector srcPtrs; bool hasOuterLoop = false; - InferenceEngine::Precision inputPrecision = InferenceEngine::Precision::FP32; - InferenceEngine::Precision outputPrecision = InferenceEngine::Precision::FP32; + ov::element::Type inputPrecision = ov::element::f32; + ov::element::Type outputPrecision = ov::element::f32; bool canExecRef = false; static constexpr size_t MAX_RANK_REF = 6; dnnl::primitive prim; diff --git a/src/plugins/intel_cpu/src/nodes/conv.cpp b/src/plugins/intel_cpu/src/nodes/conv.cpp index c7cc13add8eaa1..da339bf190e348 100644 --- a/src/plugins/intel_cpu/src/nodes/conv.cpp +++ b/src/plugins/intel_cpu/src/nodes/conv.cpp @@ -33,6 +33,7 @@ #include #include #include +#include "ie_ngraph_utils.hpp" using namespace dnnl; using namespace InferenceEngine; @@ -239,7 +240,7 @@ bool Convolution::isSupportedOperation(const std::shared_ptr& op Convolution::Convolution(const std::shared_ptr& op, const GraphContext::CPtr context) : Node(op, context, NgraphShapeInferFactory(op, EMPTY_PORT_MASK)), withBiases(false), withSum(false), withDWConv(false), isGrouped(false), dw_conv_oc(0), dw_conv_ih(0), dw_conv_iw(0), dw_conv_in_dt(memory::data_type::undef), - groupNum(1lu), IC(1), groupIC(1), groupOC(1), eltwisePrecision(Precision::FP32) { + groupNum(1lu), IC(1), groupIC(1), groupOC(1), eltwisePrecision(ov::element::f32) { std::string errorMessage; if (!isSupportedOperation(op, errorMessage)) { OPENVINO_THROW_NOT_IMPLEMENTED(errorMessage); @@ -298,8 +299,8 @@ Convolution::Convolution(const std::shared_ptr& op, const GraphContext } bool Convolution::canBeExecutedInInt8() const { - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(0)); - auto weightsDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(1)); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(0)); + auto weightsDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(1)); if (!legacyInputZeroPoints.empty()) inputDataType = memory::data_type::u8; @@ -310,11 +311,11 @@ bool Convolution::canBeExecutedInInt8() const { return one_of(inputDataType, memory::data_type::u8, memory::data_type::s8) && weightsDataType == memory::data_type::s8; } -InferenceEngine::Precision Convolution::fusedEltwisePrecision(const NodePtr& fusingNode) const { - if (sumPrc != Precision::UNSPECIFIED) +ov::element::Type Convolution::fusedEltwisePrecision(const NodePtr& fusingNode) const { + if (sumPrc != ov::element::undefined) return sumPrc; - InferenceEngine::Precision eltwisePrecision; + ov::element::Type eltwisePrecision; int fusingPort = fusingNode->getFusingPort(); if (fusingPort == 0) { @@ -398,15 +399,15 @@ void Convolution::getSupportedDescriptors() { } } - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(0)); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(0)); if (!legacyInputZeroPoints.empty()) inputDataType = memory::data_type::u8; - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalOutputPrecisionAtPort(0)); - eltwisePrecision = DnnlExtensionUtils::DataTypeToIEPrecision(outputDataType); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalOutputPrecisionAtPort(0)); + eltwisePrecision = DnnlExtensionUtils::DataTypeToElementType(outputDataType); if (!fusedWith.empty()) { - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); - eltwisePrecision = DnnlExtensionUtils::DataTypeToIEPrecision(outputDataType); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); + eltwisePrecision = DnnlExtensionUtils::DataTypeToElementType(outputDataType); } // We need to make sure that convolution output and second input of fused Eltwise operation @@ -418,8 +419,8 @@ void Convolution::getSupportedDescriptors() { auto* eltwiseNode = dynamic_cast(fusedWith[i].get()); if (eltwiseNode && eltwiseNode->isSpecialConvolutionAddFusing()) { eltwisePrecision = fusedEltwisePrecision(fusedWith[i]); - if (DnnlExtensionUtils::DataTypeToIEPrecision(outputDataType).size() != eltwisePrecision.size()) { - eltwisePrecision = Precision::FP32; + if (DnnlExtensionUtils::DataTypeToElementType(outputDataType).size() != eltwisePrecision.size()) { + eltwisePrecision = ov::element::f32; outputDataType = memory::data_type::f32; } break; @@ -462,9 +463,9 @@ void Convolution::getSupportedDescriptors() { if (canBeExecutedInInt8()) { if (i == 0) { - dw_conv_in_dt = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalOutputPrecisionAtPort(0)); + dw_conv_in_dt = DnnlExtensionUtils::ElementTypeToDataType(getOriginalOutputPrecisionAtPort(0)); } else { - dw_conv_in_dt = DnnlExtensionUtils::IEPrecisionToDataType(fusedWith[i - 1]->getOriginalOutputPrecisionAtPort(0)); + dw_conv_in_dt = DnnlExtensionUtils::ElementTypeToDataType(fusedWith[i - 1]->getOriginalOutputPrecisionAtPort(0)); } } else { dw_conv_in_dt = memory::data_type::f32; @@ -505,8 +506,8 @@ void Convolution::getSupportedDescriptors() { return; } - auto getSupportedDataType = [this, ndims](InferenceEngine::Precision originalPrec) { - auto originalDT = DnnlExtensionUtils::IEPrecisionToDataType(originalPrec); + auto getSupportedDataType = [this, ndims](ov::element::Type originalPrec) { + auto originalDT = DnnlExtensionUtils::ElementTypeToDataType(originalPrec); auto dt = memory::data_type::f32; // supported lower precisions: bf16, f16 @@ -522,7 +523,7 @@ void Convolution::getSupportedDescriptors() { inputDataType = getSupportedDataType(getOriginalInputPrecisionAtPort(0)); outputDataType = getSupportedDataType(getOriginalOutputPrecisionAtPort(0)); - eltwisePrecision = Precision::FP32; + eltwisePrecision = ov::element::f32; for (size_t i = 0; i < fusedWith.size(); i++) { if (fusedWith[i]->getAlgorithm() == Algorithm::EltwiseAdd) { auto* eltwiseNode = dynamic_cast(fusedWith[i].get()); @@ -536,16 +537,16 @@ void Convolution::getSupportedDescriptors() { // bofore the fused convolution. This behaviour might be more correct regarding expected markup // of the graph but performance of first and second approaches might be different. Need to verify outputDataType = getSupportedDataType(eltwisePrecision); - eltwisePrecision = DnnlExtensionUtils::DataTypeToIEPrecision(outputDataType); + eltwisePrecision = DnnlExtensionUtils::DataTypeToElementType(outputDataType); } } } // correction for cases of FP32 input - we do not have FP32 convolution supported BF16 output if (inputDataType == memory::data_type::f32 && - (outputDataType == memory::data_type::bf16 || eltwisePrecision == Precision::BF16 || - outputDataType == memory::data_type::f16 || eltwisePrecision == Precision::FP16)) { + (outputDataType == memory::data_type::bf16 || eltwisePrecision == ov::element::bf16 || + outputDataType == memory::data_type::f16 || eltwisePrecision == ov::element::f16)) { outputDataType = memory::data_type::f32; - eltwisePrecision = Precision::FP32; + eltwisePrecision = ov::element::f32; } SetPostOpsAndZeroPoints(attrs); @@ -632,7 +633,7 @@ void Convolution::setPostOps(dnnl::primitive_attr& attr, break; } DEBUG_LOG(getName(), ": Append ", node->getName(), " as sum post op"); - ops.append_sum(1.0, 0, DnnlExtensionUtils::IEPrecisionToDataType(eltwisePrecision)); + ops.append_sum(1.0, 0, DnnlExtensionUtils::ElementTypeToDataType(eltwisePrecision)); } else { if (useLegacyPostOps) { // try mapping with optimization w/o using binary postOps @@ -758,7 +759,7 @@ void Convolution::initSupportedPrimitiveDescriptors() { const std::vector dwWeightsDims{dw_conv_oc, 1, 1, dw_conv_kernel[Y_AXIS], dw_conv_kernel[X_AXIS]}; const std::vector dwBiasesDims{dw_conv_oc}; - const auto dwWeightsPrc = DnnlExtensionUtils::IEPrecisionToDataType(dw_conv_in_dt == dnnl_u8 ? Precision::I8 : Precision::FP32); + const auto dwWeightsPrc = DnnlExtensionUtils::ElementTypeToDataType(dw_conv_in_dt == dnnl_u8 ? ov::element::i8 : ov::element::f32); const auto dwWeightsDesc = std::make_shared(Shape(dwWeightsDims), dwWeightsPrc, memory::format_tag::Goihw8g); inConfs.emplace_back(dwWeightsDesc); @@ -925,7 +926,7 @@ void Convolution::addZeroPoints(dnnl::primitive_attr& attr) { attr.set_zero_points_mask(DNNL_ARG_SRC, 0); if (!stockInputZeroPointsMemPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::I32, {inputZeroPoints.size()}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::i32, {inputZeroPoints.size()}); stockInputZeroPointsMemPtr = std::make_shared(getEngine(), memoryDesc, inputZeroPoints.data()); } } @@ -935,7 +936,7 @@ void Convolution::addLegacyZeroPoints(dnnl::primitive_attr& attr) { DEBUG_LOG(getName(), ": Set legacy input zero points"); attr.set_input_zero_points(legacyInputZeroPoints.size(), 1 << 1 /*through C dim*/); if (!legacyInputZeroPointsMemPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::U8, {legacyInputZeroPoints.size()}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::u8, {legacyInputZeroPoints.size()}); legacyInputZeroPointsMemPtr.reset(new Memory(getEngine(), memoryDesc, legacyInputZeroPoints.data())); } } @@ -945,7 +946,7 @@ void Convolution::addLegacyZeroPoints(dnnl::primitive_attr& attr) { attr.set_weights_zero_points(legacyWeightsZeroPoints.size(), 1 << 1 /*through C dim*/); if (!legacyWeightsZeroPointsMemPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::FP32, {legacyWeightsZeroPoints.size()}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, {legacyWeightsZeroPoints.size()}); legacyWeightsZeroPointsMemPtr = std::make_shared(getEngine(), memoryDesc, legacyWeightsZeroPoints.data()); } } @@ -955,7 +956,7 @@ void Convolution::addLegacyZeroPoints(dnnl::primitive_attr& attr) { attr.set_output_compensations(legacyOutputCompensation.size(), 1 << 1 /*through C dim*/); if (!legacyOutputCompensationMemPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::I32, {legacyOutputCompensation.size()}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::i32, {legacyOutputCompensation.size()}); legacyOutputCompensationMemPtr = std::make_shared(getEngine(), memoryDesc, legacyOutputCompensation.data()); } } @@ -1103,14 +1104,14 @@ dnnl::memory Convolution::getBias() const { return getParentEdgeAt(2)->getMemory().getPrimitive(); } -InferenceEngine::Precision Convolution::getRuntimePrecision() const { - std::vector inputPrecisions; +ov::element::Type Convolution::getRuntimePrecision() const { + std::vector inputPrecisions; // Don't take bias precision into account size_t inputsNumLimit = 2; for (size_t i = 0; i < std::min(getParentEdges().size(), inputsNumLimit); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToElementType((parentEdge->getMemoryPtr()->getDataType()))); } } @@ -1203,7 +1204,7 @@ InferenceEngine::Blob::Ptr Convolution::createInternalBlob(InferenceEngine::Size auto const elementsCount = blb->getDescWithType()->getPaddedElementsCount(); - InferenceEngine::TensorDesc desc(InferenceEngine::Precision::FP32, dims, getWeightsLayoutByDims(dims, isGrouped)); + InferenceEngine::TensorDesc desc(InferenceEngine::details::convertPrecision(ov::element::f32), dims, getWeightsLayoutByDims(dims, isGrouped)); Blob::Ptr internalBlob = InferenceEngine::make_shared_blob(desc); internalBlob->allocate(); @@ -1214,8 +1215,8 @@ InferenceEngine::Blob::Ptr Convolution::createInternalBlob(InferenceEngine::Size cpu_convert(blb->getData(), internalBlob->buffer(), - DnnlExtensionUtils::DataTypeToIEPrecision(blb->getDataType()), - internalBlob->getTensorDesc().getPrecision(), + DnnlExtensionUtils::DataTypeToElementType(blb->getDataType()), + InferenceEngine::details::convertPrecision(internalBlob->getTensorDesc().getPrecision()), elementsCount); return internalBlob; diff --git a/src/plugins/intel_cpu/src/nodes/conv.h b/src/plugins/intel_cpu/src/nodes/conv.h index 65f5b943cf9ad7..2279e2fc80ef67 100644 --- a/src/plugins/intel_cpu/src/nodes/conv.h +++ b/src/plugins/intel_cpu/src/nodes/conv.h @@ -32,7 +32,7 @@ class Convolution : public Node { bool canBeInPlace() const override { return false; } - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; std::shared_ptr getSrcMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const override; dnnl::memory getWeights() const; @@ -67,7 +67,7 @@ class Convolution : public Node { } protected: - InferenceEngine::Precision fusedEltwisePrecision(const NodePtr& fusingNode) const; + ov::element::Type fusedEltwisePrecision(const NodePtr& fusingNode) const; void redefineOutputMemory(const std::vector &newOutputShapes) override; void addFusedNode(const NodePtr &fusingNode) override; const std::vector& getDefaultImplPriority() override; @@ -157,7 +157,7 @@ class Convolution : public Node { size_t groupIC; size_t groupOC; - InferenceEngine::Precision eltwisePrecision; + ov::element::Type eltwisePrecision; const size_t X_AXIS = 0; const size_t Y_AXIS = 1; @@ -174,7 +174,7 @@ class Convolution : public Node { MemoryPtr legacyOutputCompensationMemPtr; MemoryPtr stockInputZeroPointsMemPtr; dnnl::memory::data_type outputDataType = dnnl::memory::data_type::undef; - InferenceEngine::Precision sumPrc = InferenceEngine::Precision::UNSPECIFIED; + ov::element::Type sumPrc = ov::element::undefined; // TODO: migrate on convolution_auto algorithm for x64 #if defined(OPENVINO_ARCH_X86_64) diff --git a/src/plugins/intel_cpu/src/nodes/convert.cpp b/src/plugins/intel_cpu/src/nodes/convert.cpp index cf7f7096380f55..86d14fadc0a531 100644 --- a/src/plugins/intel_cpu/src/nodes/convert.cpp +++ b/src/plugins/intel_cpu/src/nodes/convert.cpp @@ -40,10 +40,10 @@ Convert::Convert(const std::shared_ptr& op, const GraphContext::CPtr c } auto convert = ov::as_type_ptr(op); - convertParams.origPrc = details::convertPrecision(convert->get_destination_type()); + convertParams.origPrc = convert->get_destination_type(); } -Convert::Convert(const Shape &shape, const InferenceEngine::Precision &inPrc, const InferenceEngine::Precision &outPrc, +Convert::Convert(const Shape &shape, const ov::element::Type &inPrc, const ov::element::Type &outPrc, const std::string &nodeName, const GraphContext::CPtr context) : Node("Convert", nodeName, context) { convertParams.origPrc = outPrc; diff --git a/src/plugins/intel_cpu/src/nodes/convert.h b/src/plugins/intel_cpu/src/nodes/convert.h index afde5f2d3ad0c3..9e2a048a049a6c 100644 --- a/src/plugins/intel_cpu/src/nodes/convert.h +++ b/src/plugins/intel_cpu/src/nodes/convert.h @@ -17,7 +17,7 @@ namespace node { class Convert : public Node { public: Convert(const std::shared_ptr& op, const GraphContext::CPtr context); - Convert(const Shape &shape, const InferenceEngine::Precision &inPrc, const InferenceEngine::Precision &outPrc, + Convert(const Shape &shape, const ov::element::Type &inPrc, const ov::element::Type &outPrc, const std::string &nodeName, const GraphContext::CPtr context); void getSupportedDescriptors() override; diff --git a/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder.cpp b/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder.cpp index 6abf257288455f..96f349f02102a1 100644 --- a/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder.cpp +++ b/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder.cpp @@ -55,17 +55,17 @@ void CTCGreedyDecoder::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inDataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); - if (!one_of(inDataPrecision, Precision::FP32, Precision::BF16, Precision::FP16)) + ov::element::Type inDataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); + if (!one_of(inDataPrecision, ov::element::f32, ov::element::bf16, ov::element::f16)) OPENVINO_THROW(errorPrefix, "has unsupported 'data' input precision: ", inDataPrecision); - Precision seqLenPrecision = getOriginalInputPrecisionAtPort(SEQUENCE_LENGTH_INDEX); - if (!one_of(inDataPrecision, Precision::FP32, Precision::BF16, Precision::FP16)) + ov::element::Type seqLenPrecision = getOriginalInputPrecisionAtPort(SEQUENCE_LENGTH_INDEX); + if (!one_of(seqLenPrecision, ov::element::f32, ov::element::bf16, ov::element::f16)) OPENVINO_THROW(errorPrefix, "has unsupported 'sequence_length' input precision: ", seqLenPrecision); - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder_seq_len.cpp b/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder_seq_len.cpp index b1a12c30ad1dd4..11c1a147e7e65e 100644 --- a/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder_seq_len.cpp +++ b/src/plugins/intel_cpu/src/nodes/ctc_greedy_decoder_seq_len.cpp @@ -54,23 +54,23 @@ void CTCGreedyDecoderSeqLen::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inDataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); - if (!one_of(inDataPrecision, Precision::FP32, Precision::BF16, Precision::FP16)) + ov::element::Type inDataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); + if (!one_of(inDataPrecision, ov::element::f32, ov::element::bf16, ov::element::f16)) OPENVINO_THROW(errorPrefix, "has unsupported 'data' input precision: ", inDataPrecision); - Precision seqLenPrecision = getOriginalInputPrecisionAtPort(SEQUENCE_LENGTH_INDEX); - if (seqLenPrecision != Precision::I32 && seqLenPrecision != Precision::I64) + ov::element::Type seqLenPrecision = getOriginalInputPrecisionAtPort(SEQUENCE_LENGTH_INDEX); + if (seqLenPrecision != ov::element::i32 && seqLenPrecision != ov::element::i64) OPENVINO_THROW(errorPrefix, "has unsupported 'sequence_length' input precision: ", seqLenPrecision); std::vector inDataConf; inDataConf.reserve(inputShapes.size()); - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); for (size_t i = 1; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::I32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::i32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {{LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/ctc_loss.cpp b/src/plugins/intel_cpu/src/nodes/ctc_loss.cpp index 4e53509203ea27..d2b73084b32bfd 100644 --- a/src/plugins/intel_cpu/src/nodes/ctc_loss.cpp +++ b/src/plugins/intel_cpu/src/nodes/ctc_loss.cpp @@ -51,12 +51,12 @@ void CTCLoss::initSupportedPrimitiveDescriptors() { std::vector inDataConf; inDataConf.reserve(inputShapes.size()); - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); for (size_t i = 1; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::I32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::i32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/cum_sum.cpp b/src/plugins/intel_cpu/src/nodes/cum_sum.cpp index edafa9c870384e..d4eef57dcf5472 100644 --- a/src/plugins/intel_cpu/src/nodes/cum_sum.cpp +++ b/src/plugins/intel_cpu/src/nodes/cum_sum.cpp @@ -8,7 +8,6 @@ #include #include #include "openvino/core/parallel.hpp" -#include "ie_precision.hpp" #include #include "cum_sum.h" #include "utils/bfloat16.hpp" @@ -73,22 +72,22 @@ void CumSum::initSupportedPrimitiveDescriptors() { dataPrecision = getOriginalInputPrecisionAtPort(CUM_SUM_DATA); if (!one_of(dataPrecision, - Precision::I8, Precision::U8, - Precision::I16, Precision::I32, Precision::I64, Precision::U64, - Precision::BF16, Precision::FP16, Precision::FP32)) - OPENVINO_THROW(errorPrefix, " has unsupported 'data' input precision: ", dataPrecision.name()); + ov::element::i8, ov::element::u8, + ov::element::i16, ov::element::i32, ov::element::i64, ov::element::u64, + ov::element::bf16, ov::element::f16, ov::element::f32)) + OPENVINO_THROW(errorPrefix, " has unsupported 'data' input precision: ", dataPrecision.get_type_name()); if (inputShapes.size() == numOfInputs) { const auto &axisTensorPrec = getOriginalInputPrecisionAtPort(AXIS); - if (axisTensorPrec != Precision::I32 && axisTensorPrec != Precision::I64) - OPENVINO_THROW(errorPrefix, " has unsupported 'axis' input precision: ", axisTensorPrec.name()); + if (axisTensorPrec != ov::element::i32 && axisTensorPrec != ov::element::i64) + OPENVINO_THROW(errorPrefix, " has unsupported 'axis' input precision: ", axisTensorPrec.get_type_name()); } std::vector inDataConf; inDataConf.reserve(inputShapes.size()); inDataConf.emplace_back(LayoutType::ncsp, dataPrecision); for (size_t i = 1; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::I32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::i32); addSupportedPrimDesc(inDataConf, {{LayoutType::ncsp, dataPrecision}}, @@ -100,15 +99,15 @@ void CumSum::execute(dnnl::stream strm) { axis = getAxis(getParentEdgeAt(AXIS)->getMemory(), getParentEdgeAt(CUM_SUM_DATA)->getMemory()); OV_SWITCH(intel_cpu, CumSumExecute, this, dataPrecision, - OV_CASE(Precision::I8, int8_t), - OV_CASE(Precision::U8, uint8_t), - OV_CASE(Precision::I16, int16_t), - OV_CASE(Precision::BF16, bfloat16_t), - OV_CASE(Precision::FP16, ov::float16), - OV_CASE(Precision::I32, int32_t), - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::I64, int64_t), - OV_CASE(Precision::U64, uint64_t)) + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t), + OV_CASE(ov::element::i16, int16_t), + OV_CASE(ov::element::bf16, bfloat16_t), + OV_CASE(ov::element::f16, ov::float16), + OV_CASE(ov::element::i32, int32_t), + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::i64, int64_t), + OV_CASE(ov::element::u64, uint64_t)) } template @@ -235,18 +234,18 @@ size_t CumSum::getAxis(const IMemory& _axis, const IMemory& _data) const { const int64_t dataShapeSize = static_cast(_data.getShape().getRank()); int64_t axisValueFromBlob = 0; switch (axisPrecision) { - case Precision::I32 : { + case ov::element::i32 : { const auto *axisPtr = reinterpret_cast(_axis.getData()); axisValueFromBlob = static_cast(axisPtr[0]); break; } - case Precision::I64 : { + case ov::element::i64 : { const auto *axisPtr = reinterpret_cast(_axis.getData()); axisValueFromBlob = axisPtr[0]; break; } - default: { - OPENVINO_THROW(errorPrefix, " doesn't support 'axis' input with precision: ", axisPrecision.name()); + default : { + OPENVINO_THROW(errorPrefix, " doesn't support 'axis' input with precision: ", axisPrecision.get_type_name()); } } if (axisValueFromBlob < -dataShapeSize || axisValueFromBlob > dataShapeSize - 1) diff --git a/src/plugins/intel_cpu/src/nodes/cum_sum.h b/src/plugins/intel_cpu/src/nodes/cum_sum.h index 8334eb47f91334..cf443d603db606 100644 --- a/src/plugins/intel_cpu/src/nodes/cum_sum.h +++ b/src/plugins/intel_cpu/src/nodes/cum_sum.h @@ -46,7 +46,7 @@ class CumSum : public Node { size_t numOfDims; size_t axis = 0; - InferenceEngine::Precision dataPrecision; + ov::element::Type dataPrecision; std::string errorPrefix; template diff --git a/src/plugins/intel_cpu/src/nodes/deconv.cpp b/src/plugins/intel_cpu/src/nodes/deconv.cpp index db4f4cbe8591b5..c9e73677dc1f02 100644 --- a/src/plugins/intel_cpu/src/nodes/deconv.cpp +++ b/src/plugins/intel_cpu/src/nodes/deconv.cpp @@ -257,7 +257,10 @@ InferenceEngine::Blob::Ptr Deconvolution::createWeiBlobAsIO(InferenceEngine::Siz orderForBlockedDesc.push_back(i); BlockingDesc blkDesc(dimsForBlockedDesc, orderForBlockedDesc); - InferenceEngine::TensorDesc tensorDesc(DnnlExtensionUtils::DataTypeToIEPrecision(blb->getDataType()), dims, blkDesc); + InferenceEngine::TensorDesc tensorDesc( + InferenceEngine::details::convertPrecision(DnnlExtensionUtils::DataTypeToElementType(blb->getDataType())), + dims, + blkDesc); Blob::Ptr internalBlob = InferenceEngine::make_shared_blob(tensorDesc); internalBlob->allocate(); @@ -310,11 +313,11 @@ bool Deconvolution::canBeExecutedInInt8() const { if (!impl::cpu::x64::mayiuse(impl::cpu::x64::avx512_core) && deconvAttrs.stride.back() > 3) return false; - InferenceEngine::Precision inPrecision = getOriginalInputPrecisionAtPort(0); - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(inPrecision); + ov::element::Type inPrecision = getOriginalInputPrecisionAtPort(0); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(inPrecision); - InferenceEngine::Precision weiPrecision = getOriginalInputPrecisionAtPort(1); - auto weightsDataType = DnnlExtensionUtils::IEPrecisionToDataType(weiPrecision); + ov::element::Type weiPrecision = getOriginalInputPrecisionAtPort(1); + auto weightsDataType = DnnlExtensionUtils::ElementTypeToDataType(weiPrecision); if (isDW && (inputDataType == dnnl_s8 || deconvAttrs.dilation.size() == 3)) return false; @@ -434,28 +437,28 @@ void Deconvolution::getSupportedDescriptors() { OPENVINO_THROW(errorPrefix, " supports bias fusing only for int8 execution precision"); } - InferenceEngine::Precision inPrecision = getOriginalInputPrecisionAtPort(0); - InferenceEngine::Precision outPrecision = getOriginalOutputPrecisionAtPort(0); + ov::element::Type inPrecision = getOriginalInputPrecisionAtPort(0); + ov::element::Type outPrecision = getOriginalOutputPrecisionAtPort(0); if (isInt8) { // TODO: We have to extend jit_avx512_core_x8s8s32x_deconv_fwd_kernel from oneDNN to support BF16 output data type - if (InferenceEngine::Precision::BF16 == inPrecision) - inPrecision = InferenceEngine::Precision::FP32; - if (InferenceEngine::Precision::BF16 == outPrecision) - outPrecision = InferenceEngine::Precision::FP32; + if (ov::element::bf16 == inPrecision) + inPrecision = ov::element::f32; + if (ov::element::bf16 == outPrecision) + outPrecision = ov::element::f32; } else { - if (!inPrecision.is_float()) - inPrecision = InferenceEngine::Precision::FP32; - if (!outPrecision.is_float()) - outPrecision = InferenceEngine::Precision::FP32; + if (!inPrecision.is_real()) + inPrecision = ov::element::f32; + if (!outPrecision.is_real()) + outPrecision = ov::element::f32; } - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(inPrecision); - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(outPrecision); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(inPrecision); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(outPrecision); if (inputDataType == memory::data_type::bf16 || outputDataType == memory::data_type::bf16) inputDataType = outputDataType = memory::data_type::bf16; if (inputDataType == memory::data_type::f16 || outputDataType == memory::data_type::f16) inputDataType = outputDataType = memory::data_type::f16; if (!fusedWith.empty()) { - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); } if (getParentEdges().size() != (withBiases ? (biasPort + 1) : biasPort)) { OPENVINO_THROW(errorPrefix, " has incorrect number of input edges"); @@ -623,7 +626,7 @@ VectorDims Deconvolution::shapeInferInternal(const VectorDims &inDims, std::vect } outSpDimsVecShape = {outSpDims.size()}; inputShapesRefs.push_back(std::cref(outSpDimsVecShape)); - CpuBlockedMemoryDesc desc(Precision::I32, Shape(outSpDimsVecShape)); + CpuBlockedMemoryDesc desc(ov::element::i32, Shape(outSpDimsVecShape)); auto mem = std::make_shared(getEngine(), desc, outSpDims.data()); inputValues[i] = mem; break; @@ -1109,7 +1112,7 @@ void Deconvolution::createDescriptor(const std::vector &inputDesc std::shared_ptr Deconvolution::getSrcMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const { if (idx == 2 && !withBiases) { - return std::make_shared(InferenceEngine::Precision::I32, Shape(getInputShapeAtPort(2).getStaticDims())); + return std::make_shared(ov::element::i32, Shape(getInputShapeAtPort(2).getStaticDims())); } else if (idx > 0 && isInt8) { // we need to store 'weight' input as edge, // because at this moment we can't simple replace internal blob with input, since we need to save weight data as is, but with different order @@ -1131,14 +1134,14 @@ std::shared_ptr Deconvolution::getDstMemDesc(const dnnl::primitive_d return DnnlExtensionUtils::makeDescriptor(desc); } -InferenceEngine::Precision Deconvolution::getRuntimePrecision() const { - std::vector inputPrecisions; +ov::element::Type Deconvolution::getRuntimePrecision() const { + std::vector inputPrecisions; // Don't take bias precision into account size_t inputsNumLimit = 2; for (size_t i = 0; i < std::min(getParentEdges().size(), inputsNumLimit); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToElementType((parentEdge->getMemoryPtr()->getDataType()))); } } diff --git a/src/plugins/intel_cpu/src/nodes/deconv.h b/src/plugins/intel_cpu/src/nodes/deconv.h index a0683d17330199..5477feadc4ffc6 100644 --- a/src/plugins/intel_cpu/src/nodes/deconv.h +++ b/src/plugins/intel_cpu/src/nodes/deconv.h @@ -38,7 +38,7 @@ class Deconvolution : public Node { std::shared_ptr getSrcMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const override; std::shared_ptr getDstMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; static bool isSupportedOperation(const std::shared_ptr& op, std::string& errorMessage) noexcept; bool canFuse(const NodePtr& node) const override; diff --git a/src/plugins/intel_cpu/src/nodes/def_conv.cpp b/src/plugins/intel_cpu/src/nodes/def_conv.cpp index 4af291d1b2a038..2d495913b6632e 100644 --- a/src/plugins/intel_cpu/src/nodes/def_conv.cpp +++ b/src/plugins/intel_cpu/src/nodes/def_conv.cpp @@ -1327,7 +1327,7 @@ bool DeformableConvolution::created() const { return getType() == Type::DeformableConvolution; } -InferenceEngine::Precision DeformableConvolution::getRuntimePrecision() const { +ov::element::Type DeformableConvolution::getRuntimePrecision() const { return getMaxPrecision(getInputPrecisions()); } diff --git a/src/plugins/intel_cpu/src/nodes/def_conv.h b/src/plugins/intel_cpu/src/nodes/def_conv.h index 5030ce27040d89..b4a9694e52159f 100644 --- a/src/plugins/intel_cpu/src/nodes/def_conv.h +++ b/src/plugins/intel_cpu/src/nodes/def_conv.h @@ -84,7 +84,7 @@ class DeformableConvolution : public Node { bool enforceRef = false; constexpr static int sampledPointsPerPixel = 4; // count of sampling points ({top|bottom}, {left|right}) - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; struct DefConvAttr { size_t group = 1; diff --git a/src/plugins/intel_cpu/src/nodes/depth_to_space.cpp b/src/plugins/intel_cpu/src/nodes/depth_to_space.cpp index d567844d5b04f9..2e22d662d7d3dc 100644 --- a/src/plugins/intel_cpu/src/nodes/depth_to_space.cpp +++ b/src/plugins/intel_cpu/src/nodes/depth_to_space.cpp @@ -113,7 +113,7 @@ void DepthToSpace::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); impl_desc_type impl_type = impl_desc_type::ref; if (cpu::x64::mayiuse(cpu::x64::avx512_core)) { diff --git a/src/plugins/intel_cpu/src/nodes/detection_output.cpp b/src/plugins/intel_cpu/src/nodes/detection_output.cpp index d325f31b2ebbff..379863168971ff 100644 --- a/src/plugins/intel_cpu/src/nodes/detection_output.cpp +++ b/src/plugins/intel_cpu/src/nodes/detection_output.cpp @@ -149,10 +149,10 @@ void DetectionOutput::initSupportedPrimitiveDescriptors() { std::vector inDataConf; inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/dft.cpp b/src/plugins/intel_cpu/src/nodes/dft.cpp index 3660791317e99d..c4cea196714cbe 100644 --- a/src/plugins/intel_cpu/src/nodes/dft.cpp +++ b/src/plugins/intel_cpu/src/nodes/dft.cpp @@ -11,7 +11,6 @@ #include #include "openvino/core/parallel.hpp" -#include "ie_precision.hpp" #include #include "utils/general_utils.h" #include "common/cpu_memcpy.h" @@ -88,30 +87,30 @@ void DFT::initSupportedPrimitiveDescriptors() { return; const auto& dataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); - if (!dataPrecision.is_float()) { - OPENVINO_THROW(layerErrorPrefix, " has unsupported 'data' input precision: ", dataPrecision.name()); + if (!dataPrecision.is_real()) { + OPENVINO_THROW(layerErrorPrefix, " has unsupported 'data' input precision: ", dataPrecision.get_type_name()); } const auto& axesPrecision = getOriginalInputPrecisionAtPort(AXES_INDEX); - if (axesPrecision != Precision::I32 && axesPrecision != Precision::I64) { - OPENVINO_THROW(layerErrorPrefix, " has unsupported 'axes' input precision: ", axesPrecision.name()); + if (axesPrecision != ov::element::i32 && axesPrecision != ov::element::i64) { + OPENVINO_THROW(layerErrorPrefix, " has unsupported 'axes' input precision: ", axesPrecision.get_type_name()); } if (inputShapes.size() > SIGNAL_SIZE_INDEX) { const auto& signalSizeTensorPrec = getOriginalInputPrecisionAtPort(SIGNAL_SIZE_INDEX); - if (signalSizeTensorPrec != Precision::I32 && signalSizeTensorPrec != Precision::I64) { + if (signalSizeTensorPrec != ov::element::i32 && signalSizeTensorPrec != ov::element::i64) { OPENVINO_THROW(layerErrorPrefix, " has unsupported 'signal_size' input precision: ", - signalSizeTensorPrec.name()); + signalSizeTensorPrec.get_type_name()); } } - std::vector inDataConfigurators({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}}); + std::vector inDataConfigurators({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}}); if (inputShapes.size() > SIGNAL_SIZE_INDEX) - inDataConfigurators.push_back({LayoutType::ncsp, Precision::I32}); + inDataConfigurators.push_back({LayoutType::ncsp, ov::element::i32}); - addSupportedPrimDesc(inDataConfigurators, {{LayoutType::ncsp, Precision::FP32}}, impl_desc_type::ref_any); + addSupportedPrimDesc(inDataConfigurators, {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } namespace { diff --git a/src/plugins/intel_cpu/src/nodes/eltwise.cpp b/src/plugins/intel_cpu/src/nodes/eltwise.cpp index a78842b88ef19b..a13e3960e3ac7e 100644 --- a/src/plugins/intel_cpu/src/nodes/eltwise.cpp +++ b/src/plugins/intel_cpu/src/nodes/eltwise.cpp @@ -79,7 +79,7 @@ struct EltwiseEmitterContext { jit_generator *host; cpu_isa_t host_isa; const Eltwise::EltwiseData& opData; - InferenceEngine::Precision exec_prc; + ov::element::Type exec_prc; }; template @@ -134,12 +134,13 @@ static void set_intersection(const std::set>& precisi } } -InferenceEngine::Precision eltwise_precision_helper::get_precision(const size_t inputs_number, - const InferenceEngine::Precision(&src_prc)[MAX_ELTWISE_INPUTS], - const std::vector& eltwise_data) { - Precision exec_prc = Precision::UNSPECIFIED; +ov::element::Type eltwise_precision_helper::get_precision(const size_t inputs_number, + const ov::element::Type (&src_prc)[MAX_ELTWISE_INPUTS], + const std::vector& eltwise_data) { + ov::element::Type exec_prc = ov::element::undefined; - std::set> supported_precision_intersection = get_supported_precisions(eltwise_data.front().algo); + std::set> supported_precision_intersection = + get_supported_precisions(eltwise_data.front().algo); // for element-wise operations all inputs must to have the same precisions auto has_same_precision = [](const std::vector& precisions) { @@ -179,19 +180,19 @@ InferenceEngine::Precision eltwise_precision_helper::get_precision(const size_t supported_precision_intersection.begin(), supported_precision_intersection.end(), [&prc](const std::vector& precisions) { return std::find(precisions.begin(), precisions.end(), prc) != precisions.end(); })) { - exec_prc = InferenceEngine::details::convertPrecision(prc); + exec_prc = prc; break; } } for (size_t i = 0; i < inputs_number; i++) { if (src_prc[i] != exec_prc) { - exec_prc = Precision::FP32; + exec_prc = ov::element::f32; break; } } - if (exec_prc == Precision::UNSPECIFIED) { + if (exec_prc == ov::element::undefined) { OPENVINO_THROW("Eltwise jitter failed to specify execution precision for Eltwise node"); } @@ -566,7 +567,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener const std::vector& ops_list_; const dnnl::post_ops& post_ops_; - std::shared_ptr create_eltwise_emitter(const Eltwise::EltwiseData& data, Precision exec_prec) { + std::shared_ptr create_eltwise_emitter(const Eltwise::EltwiseData& data, ov::element::Type exec_prec) { EltwiseEmitterContext ctx = { nullptr, this, @@ -666,7 +667,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } else if (ops_list_[i] == ov::intel_cpu::Type::FakeQuantize) { auto& p = post_ops_.get()->entry_[quantization_post_op_idx]; bool do_dequantization = p.quantization.alg == dnnl::impl::alg_kind::quantization_quantize_dequantize; - bool do_rounding = do_dequantization || jep_.dst_prc == Precision::FP32 || i != ops_list_.size() - 1; + bool do_rounding = do_dequantization || jep_.dst_prc == ov::element::f32 || i != ops_list_.size() - 1; int s_idx = vmm_dst.getIdx(); size_t ptrs_table_off = quantization_post_op_idx * quantization_injectors[quantization_post_op_idx]->memoryStep(); @@ -688,7 +689,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } - inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, Precision src_prc, Precision dst_prc, bool broadcast) { + inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, ov::element::Type src_prc, ov::element::Type dst_prc, bool broadcast) { Xmm xmm_src = Xmm(vmm_src.getIdx()); if (broadcast) { @@ -696,27 +697,27 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener uni_vbroadcastss(vmm_src, xmm_src); } else { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(vmm_src, op); break; - case Precision::BF16: + case ov::element::bf16: vpmovzxwd(vmm_src, op); uni_vpslld(vmm_src, vmm_src, 16); break; - case Precision::FP16: + case ov::element::f16: vcvtph2ps(vmm_src, op); break; - case Precision::U16: + case ov::element::u16: uni_vpmovzxwd(vmm_src, op); break; - case Precision::I16: + case ov::element::i16: uni_vpmovsxwd(vmm_src, op); break; - case Precision::I8: + case ov::element::i8: uni_vpmovsxbd(vmm_src, op); break; - case Precision::U8: + case ov::element::u8: uni_vpmovzxbd(vmm_src, op); break; default: @@ -724,12 +725,12 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } switch (dst_prc) { - case Precision::FP32: - if (!src_prc.is_float()) + case ov::element::f32: + if (!src_prc.is_real()) uni_vcvtdq2ps(vmm_src, vmm_src); break; - case Precision::I32: - if (src_prc.is_float()) + case ov::element::i32: + if (src_prc.is_real()) uni_vcvtps2dq(vmm_src, vmm_src); break; default: @@ -738,32 +739,32 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } - inline void load_scalar(Xmm xmm_src, const Xbyak::Address &op, Precision src_prc, Precision dst_prc) { + inline void load_scalar(Xmm xmm_src, const Xbyak::Address &op, ov::element::Type src_prc, ov::element::Type dst_prc) { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovss(xmm_src, op); break; - case Precision::BF16: + case ov::element::bf16: uni_vpinsrw(xmm_src, xmm_src, op, 0); uni_vpslld(xmm_src, xmm_src, 16); break; - case Precision::FP16: + case ov::element::f16: vcvtph2ps(xmm_src, op); break; - case Precision::I16: + case ov::element::i16: uni_vpinsrw(xmm_src, xmm_src, op, 0); uni_vpmovsxwd(xmm_src, op); break; - case Precision::U16: + case ov::element::u16: uni_vpinsrw(xmm_src, xmm_src, op, 0); uni_vpmovzxwd(xmm_src, op); break; - case Precision::I8: + case ov::element::i8: movsx(reg_tmp_32, op); uni_vmovq(xmm_src, reg_tmp_64); break; - case Precision::U8: + case ov::element::u8: movzx(reg_tmp_32, op); uni_vmovq(xmm_src, reg_tmp_64); break; @@ -772,12 +773,12 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } switch (dst_prc) { - case Precision::FP32: - if (!src_prc.is_float()) + case ov::element::f32: + if (!src_prc.is_real()) uni_vcvtdq2ps(xmm_src, xmm_src); break; - case Precision::I32: - if (src_prc.is_float()) + case ov::element::i32: + if (src_prc.is_real()) uni_vcvtps2dq(xmm_src, xmm_src); break; default: @@ -785,17 +786,17 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } - inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, Precision src_prc, Precision dst_prc) { + inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, ov::element::Type src_prc, ov::element::Type dst_prc) { Xmm xmm_dst = Xmm(vmm_dst.getIdx()); Ymm ymm_dst = Ymm(vmm_dst.getIdx()); switch (src_prc) { - case Precision::FP32: - if (!dst_prc.is_float()) + case ov::element::f32: + if (!dst_prc.is_real()) uni_vcvtps2dq(vmm_dst, vmm_dst); break; - case Precision::I32: - if (dst_prc.is_float()) + case ov::element::i32: + if (dst_prc.is_real()) uni_vcvtdq2ps(vmm_dst, vmm_dst); break; default: @@ -803,18 +804,18 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(op, vmm_dst); break; - case Precision::BF16: + case ov::element::bf16: uni_vcvtneps2bf16->emit_code({static_cast(vmm_dst.getIdx())}, {static_cast(ymm_dst.getIdx())}); vmovdqu16(op, ymm_dst); break; - case Precision::FP16: + case ov::element::f16: vcvtps2ph(op, vmm_dst, 0x4); break; - case Precision::I16: + case ov::element::i16: if (isa == x64::avx512_core) { vpmovsdw(op, vmm_dst); } else { @@ -827,7 +828,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } break; - case Precision::U16: + case ov::element::u16: if (isa == x64::avx512_core) { vpmaxsd(vmm_dst, vmm_zero, vmm_dst); vpmovusdw(op, vmm_dst); @@ -841,7 +842,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } break; - case Precision::I8: + case ov::element::i8: if (isa == x64::avx512_core) { vpmovsdb(op, vmm_dst); } else { @@ -855,7 +856,7 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener movd(op, xmm_dst); } break; - case Precision::U8: + case ov::element::u8: if (isa == x64::avx512_core) { vpmaxsd(vmm_dst, vmm_zero, vmm_dst); vpmovusdb(op, vmm_dst); @@ -875,14 +876,14 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } } - inline void store_scalar(const Xbyak::Address &op, Xmm xmm_dst, Precision src_prc, Precision dst_prc) { + inline void store_scalar(const Xbyak::Address &op, Xmm xmm_dst, ov::element::Type src_prc, ov::element::Type dst_prc) { switch (src_prc) { - case Precision::FP32: - if (!dst_prc.is_float()) + case ov::element::f32: + if (!dst_prc.is_real()) uni_vcvtps2dq(xmm_dst, xmm_dst); break; - case Precision::I32: - if (dst_prc.is_float()) + case ov::element::i32: + if (dst_prc.is_real()) uni_vcvtdq2ps(xmm_dst, xmm_dst); break; default: @@ -890,36 +891,36 @@ struct jit_uni_eltwise_generic : public jit_uni_eltwise_kernel, public jit_gener } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovss(op, xmm_dst); break; - case Precision::BF16: + case ov::element::bf16: uni_vpsrld(xmm_dst, xmm_dst, 16); uni_vpextrw(op, xmm_dst, 0x0); break; - case Precision::FP16: + case ov::element::f16: vcvtps2ph(xmm_dst, xmm_dst, 0x4); movq(reg_tmp_64, xmm_dst); mov(op, reg_tmp_16); break; - case Precision::I16: + case ov::element::i16: uni_vpackssdw(xmm_dst, xmm_dst, xmm_dst); movq(reg_tmp_64, xmm_dst); mov(op, reg_tmp_16); break; - case Precision::U16: + case ov::element::u16: uni_vpackusdw(xmm_dst, xmm_dst, xmm_dst); movq(reg_tmp_64, xmm_dst); mov(op, reg_tmp_16); break; - case Precision::I8: + case ov::element::i8: uni_vpackssdw(xmm_dst, xmm_dst, xmm_dst); uni_vpacksswb(xmm_dst, xmm_dst, xmm_dst); movq(reg_tmp_64, xmm_dst); mov(op, reg_tmp_8); break; - case Precision::U8: + case ov::element::u8: uni_vpackusdw(xmm_dst, xmm_dst, xmm_dst); uni_vpackuswb(xmm_dst, xmm_dst, xmm_dst); movq(reg_tmp_64, xmm_dst); @@ -1188,8 +1189,8 @@ struct EltwiseKey { VectorDims outBlkDims; VectorDims outOrder; std::vector inpDims; - std::vector inpPrc; - InferenceEngine::Precision outPrc; + std::vector inpPrc; + ov::element::Type outPrc; dnnl::post_ops postOps; EltwiseImplType implType; @@ -1221,10 +1222,10 @@ struct EltwiseKey { seed = get_vector_hash(seed, item); } } - std::for_each(inpPrc.begin(), inpPrc.end(), [&](const Precision& item) { - seed = hash_combine(seed, item.getPrecVal()); + std::for_each(inpPrc.begin(), inpPrc.end(), [&](const ov::element::Type& item) { + seed = hash_combine(seed, item.hash()); }); - seed = hash_combine(seed, outPrc.getPrecVal()); + seed = hash_combine(seed, outPrc.hash()); seed = get_post_op_hash(seed, *postOps.get()); seed = hash_combine(seed, implType); return seed; @@ -1287,8 +1288,8 @@ class EltwiseJitExecutor : public Eltwise::IEltwiseExecutor { const VectorDims& outBlkDims, const VectorDims& outOrder, std::vector inpDims, - const std::vector& inpPrc, - const InferenceEngine::Precision& outPrc, + const std::vector& inpPrc, + const ov::element::Type& outPrc, const dnnl::post_ops& post_ops, bool useRuntimePtrs) { auto collapseLastDims = [](std::vector& dims, int dimsToCollapse) { @@ -1868,36 +1869,36 @@ bool Eltwise::EltwiseData::operator==(const EltwiseData &rhs) const noexcept { static Eltwise::executorPtr buildRefExecutor(const EltwiseKey& key) { switch (key.outPrc) { - case Precision::FP16: + case ov::element::f16: return std::make_shared>(key.eltwise_data.front(), key.outBlkDims, key.inpDims); - case Precision::I8: - return std::make_shared::value_type>>( + case ov::element::i8: + return std::make_shared::value_type>>( key.eltwise_data.front(), key.outBlkDims, key.inpDims); - case Precision::U8: - return std::make_shared::value_type>>( + case ov::element::u8: + return std::make_shared::value_type>>( key.eltwise_data.front(), key.outBlkDims, key.inpDims); - case Precision::I16: - return std::make_shared::value_type>>( + case ov::element::i16: + return std::make_shared::value_type>>( key.eltwise_data.front(), key.outBlkDims, key.inpDims); - case Precision::U16: - return std::make_shared::value_type>>( + case ov::element::u16: + return std::make_shared::value_type>>( key.eltwise_data.front(), key.outBlkDims, key.inpDims); # - case Precision::I32: - return std::make_shared::value_type>>( + case ov::element::i32: + return std::make_shared::value_type>>( key.eltwise_data.front(), key.outBlkDims, key.inpDims); @@ -2052,22 +2053,22 @@ void Eltwise::initSupportedPrimitiveDescriptors() { Algorithm::EltwiseBitwiseXor); }; - std::vector supportedPrecisions = isBitwise(algorithm) ? - std::vector { - Precision::U8, - Precision::I8, - Precision::U16, - Precision::I16, - Precision::I32 - } : std::vector { - Precision::FP32, - Precision::U8, - Precision::I8, - Precision::U16, - Precision::I16, - Precision::BF16, - Precision::FP16, - Precision::I32 + std::vector supportedPrecisions = isBitwise(algorithm) ? + std::vector { + ov::element::u8, + ov::element::i8, + ov::element::u16, + ov::element::i16, + ov::element::i32 + } : std::vector { + ov::element::f32, + ov::element::u8, + ov::element::i8, + ov::element::u16, + ov::element::i16, + ov::element::bf16, + ov::element::f16, + ov::element::i32 }; if (!supportedPrimitiveDescriptors.empty()) @@ -2111,7 +2112,7 @@ void Eltwise::initSupportedPrimitiveDescriptors() { getParentEdges().size(), ")"); - std::vector inputPrecisions; + std::vector inputPrecisions; for (const auto &prec : getOriginalInputPrecisions()) { inputPrecisions.push_back(prec); } @@ -2133,7 +2134,7 @@ void Eltwise::initSupportedPrimitiveDescriptors() { if (inputPrecisions.size() != getParentEdges().size()) OPENVINO_THROW("Eltwise node with name `", getName(), "` has invalid input precisions configuration."); - InferenceEngine::Precision outputPrecision = getOriginalOutputPrecisionAtPort(0); + ov::element::Type outputPrecision = getOriginalOutputPrecisionAtPort(0); if (!fusedWith.empty()) { outputPrecision = fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0); } @@ -2141,15 +2142,15 @@ void Eltwise::initSupportedPrimitiveDescriptors() { if (!mayiuse(avx512_core)) { bool hasBF16 = false; for (auto &inPrc : inputPrecisions) - if (inPrc == Precision::BF16) + if (inPrc == ov::element::bf16) hasBF16 = true; - if (outputPrecision == Precision::BF16 || hasBF16) + if (outputPrecision == ov::element::bf16 || hasBF16) OPENVINO_THROW("Eltwise node with name `", getName(), "` doesn't support BF16 precision on this target."); } #if defined(OV_CPU_WITH_ACL) - auto filterPrecision = [&](const Precision& prc, const Precision& forcedPrec) { + auto filterPrecision = [&](const ov::element::Type& prc, const ov::element::Type& forcedPrec) { if (isBitwise(algorithm)) { if (std::find(supportedPrecisions.begin(), supportedPrecisions.end(), prc) == supportedPrecisions.end()) { IE_THROW() << "Eltwise node with name `" << getName() << "` doesn't support " << prc << " precision."; @@ -2160,18 +2161,18 @@ void Eltwise::initSupportedPrimitiveDescriptors() { }; // Use original output precision as a reference point since some eltwise algorithms have non-float inputs (i.e. EltwiseSelect) - Precision forcedPrec = getOriginalOutputPrecisionAtPort(0) == Precision::FP16 ? Precision::FP16 : Precision::FP32; + ov::element::Type forcedPrec = getOriginalOutputPrecisionAtPort(0) == ov::element::f16 ? ov::element::f16 : ov::element::f32; // ACL implementation supports only identical precisions on inputs/outputs so they are aligned it to highest one if (AclEltwiseExecutor::isEltwiseAlgorithmSupported(getAlgorithm())) { for (size_t i = 0; i < getParentEdges().size(); i++) { if (!getParentEdgeAt(i)->getParent()->isConstant()) { - if (!forcedPrec || getOriginalInputPrecisionAtPort(i).size() > forcedPrec.size()) { + if (getOriginalInputPrecisionAtPort(i).size() > forcedPrec.size()) { forcedPrec = getOriginalInputPrecisionAtPort(i); } } } - if (!forcedPrec.is_float()) { - forcedPrec = Precision::FP32; + if (!forcedPrec.is_real()) { + forcedPrec = ov::element::f32; } } @@ -2180,7 +2181,7 @@ void Eltwise::initSupportedPrimitiveDescriptors() { } outputPrecision = filterPrecision(outputPrecision, forcedPrec); #else - auto filterPrecision = [&](const Precision& prc) { + auto filterPrecision = [&](const ov::element::Type& prc) { if (implType == EltwiseImplType::reference) { if (isBitwise(algorithm)) { if (std::find(supportedPrecisions.begin(), supportedPrecisions.end(), prc) == supportedPrecisions.end()) { @@ -2188,12 +2189,12 @@ void Eltwise::initSupportedPrimitiveDescriptors() { } return prc; } - return Precision(Precision::FP32); + return ov::element::f32; } else if (std::find(supportedPrecisions.begin(), supportedPrecisions.end(), prc) == supportedPrecisions.end()) { - if (prc == Precision::U32 || prc == Precision::I64 || prc == Precision::U64) { - return Precision(Precision::I32); - } else if (prc == Precision::FP64) { - return Precision(Precision::FP32); + if (prc == ov::element::u32 || prc == ov::element::i64 || prc == ov::element::u64) { + return ov::element::i32; + } else if (prc == ov::element::f64) { + return ov::element::f32; } else { OPENVINO_THROW("Eltwise node with name `", getName(), "` doesn't support ", prc, " precision."); } @@ -2211,10 +2212,10 @@ void Eltwise::initSupportedPrimitiveDescriptors() { // TODO: delete after new LPT (ngraph based) is merged // WA is needed to handle bug in LPT that produces wrong precision after average pooling (I8/U8 instead of FP32) if ((getAlgorithm() == Algorithm::EltwiseMulAdd || getAlgorithm() == Algorithm::EltwisePowerStatic) && - (inputPrecisions[0] == Precision::U8 || inputPrecisions[0] == Precision::I8)) { + (inputPrecisions[0] == ov::element::u8 || inputPrecisions[0] == ov::element::i8)) { auto parentNode = getParentEdgesAtPort(0)[0]->getParent(); if (getParentEdgesAtPort(0)[0]->getParent()->getAlgorithm() == Algorithm::PoolingAvg) { - inputPrecisions[0] = Precision::FP32; + inputPrecisions[0] = ov::element::f32; } } @@ -2225,7 +2226,7 @@ void Eltwise::initSupportedPrimitiveDescriptors() { }; auto initDesc = [&] (LayoutType lt, bool useAclExecutor = false) -> NodeDesc { - auto createMemoryDesc = [lt](const Shape &shape, Precision prc, size_t offset) -> std::shared_ptr { + auto createMemoryDesc = [lt](const Shape &shape, ov::element::Type prc, size_t offset) -> std::shared_ptr { const auto &dims = shape.getDims(); if (lt == ChannelsFirst && shape.getRank() != 1) { auto ndims = shape.getRank(); @@ -2651,7 +2652,7 @@ void Eltwise::fuseInto(NodePtr& parentNode) { void Eltwise::appendMemory(const std::vector &data, MemoryPtr &memPtr, std::vector& postOpsMem) { if (!memPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::FP32, {data.size()}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, {data.size()}); memPtr = std::make_shared(getEngine(), memoryDesc, data.data()); postOpsMem.push_back(memPtr); } @@ -2852,7 +2853,7 @@ bool Eltwise::canFuse(const NodePtr& node) const { } for (const auto &originalInputPrecision : node->getOriginalInputPrecisions()) { - if (originalInputPrecision != Precision::I32) { + if (originalInputPrecision != ov::element::i32) { return false; } } @@ -2937,13 +2938,13 @@ bool Eltwise::canFuse(const NodePtr& node) const { return false; } -InferenceEngine::Precision Eltwise::getRuntimePrecision() const { - std::vector inputPrecisions; +ov::element::Type Eltwise::getRuntimePrecision() const { + std::vector inputPrecisions; // Don't take bias precision into account for (size_t i = 0; i < getParentEdges().size(); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated && !parentEdge->getParent()->isConstant()) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToElementType((parentEdge->getMemoryPtr()->getDataType()))); } } diff --git a/src/plugins/intel_cpu/src/nodes/eltwise.h b/src/plugins/intel_cpu/src/nodes/eltwise.h index 6d88e0654bde77..24c1fe9e976092 100644 --- a/src/plugins/intel_cpu/src/nodes/eltwise.h +++ b/src/plugins/intel_cpu/src/nodes/eltwise.h @@ -23,8 +23,8 @@ struct jit_eltwise_params { size_t inputs_number; size_t input_size; - InferenceEngine::Precision src_prc[MAX_ELTWISE_INPUTS]; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc[MAX_ELTWISE_INPUTS]; + ov::element::Type dst_prc; VectorDims dims; VectorDims src_offsets[MAX_ELTWISE_INPUTS]; @@ -116,7 +116,7 @@ class Eltwise : public Node { void appendPostOps(dnnl::post_ops& ops, const VectorDims &postOpDims, std::vector& postOpsMem, const int channelAxis = 1) override; bool appendAttrPostOps(DnnlPostOpsComposer& dnnlpoc, bool isLastPostOp, dnnl::memory::data_type outDataType, bool allowBinary = true); void fuseInto(NodePtr& parentNode) override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; float getAlpha() const { return alpha; } float getBeta() const { return beta; } @@ -156,8 +156,8 @@ class Eltwise : public Node { std::vector start_offset_in = {}; ptrdiff_t start_offset_out = 0; - std::vector inpPrc; - InferenceEngine::Precision outPrc; + std::vector inpPrc; + ov::element::Type outPrc; // blocked dims for which kernel compiled and params prepared std::vector currentInBlkDims = {}; @@ -205,8 +205,8 @@ class Eltwise : public Node { class eltwise_precision_helper { public: - static InferenceEngine::Precision get_precision(const size_t inputs_number, - const InferenceEngine::Precision (&src_prc)[MAX_ELTWISE_INPUTS], + static ov::element::Type get_precision(const size_t inputs_number, + const ov::element::Type (&src_prc)[MAX_ELTWISE_INPUTS], const std::vector& eltwise_data); private: diff --git a/src/plugins/intel_cpu/src/nodes/embedding_bag_offset_sum.cpp b/src/plugins/intel_cpu/src/nodes/embedding_bag_offset_sum.cpp index ad405b2e6380a6..ac42cf20871359 100644 --- a/src/plugins/intel_cpu/src/nodes/embedding_bag_offset_sum.cpp +++ b/src/plugins/intel_cpu/src/nodes/embedding_bag_offset_sum.cpp @@ -47,27 +47,27 @@ void EmbeddingBagOffsetSum::initSupportedPrimitiveDescriptors() { return; std::string logPrefix = std::string("Layer EmbeddingBagSum with name '") + _layerName + "' "; - static const std::set supportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set supportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; auto inDataPrecision = getOriginalInputPrecisionAtPort(EMB_TABLE_IDX); - if (inDataPrecision == Precision::BF16) - inDataPrecision = Precision::FP32; + if (inDataPrecision == ov::element::bf16) + inDataPrecision = ov::element::f32; if (!supportedPrecisions.empty()) { if (supportedPrecisions.find(inDataPrecision) == supportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } else { - static const std::set defaultSupportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set defaultSupportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; if (defaultSupportedPrecisions.find(inDataPrecision) == defaultSupportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } std::vector inDataConfigurators({{LayoutType::ncsp, inDataPrecision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}); + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}); if (inputShapes.size() > DEFAULT_INDEX_IDX) - inDataConfigurators.push_back({LayoutType::ncsp, Precision::I32}); + inDataConfigurators.push_back({LayoutType::ncsp, ov::element::i32}); if (inputShapes.size() > PER_SAMPLE_WEIGHTS_IDX) inDataConfigurators.push_back({LayoutType::ncsp, inDataPrecision}); diff --git a/src/plugins/intel_cpu/src/nodes/embedding_bag_packed_sum.cpp b/src/plugins/intel_cpu/src/nodes/embedding_bag_packed_sum.cpp index ff93e97323e043..88039109e3af49 100644 --- a/src/plugins/intel_cpu/src/nodes/embedding_bag_packed_sum.cpp +++ b/src/plugins/intel_cpu/src/nodes/embedding_bag_packed_sum.cpp @@ -44,24 +44,24 @@ void EmbeddingBagPackedSum::initSupportedPrimitiveDescriptors() { return; std::string logPrefix = std::string("Layer EmbeddingBagSum with name '") + _layerName + "' "; - static const std::set supportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set supportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; auto inDataPrecision = getOriginalInputPrecisionAtPort(EMB_TABLE_IDX); - if (inDataPrecision == Precision::BF16) - inDataPrecision = Precision::FP32; + if (inDataPrecision == ov::element::bf16) + inDataPrecision = ov::element::f32; if (!supportedPrecisions.empty()) { if (supportedPrecisions.find(inDataPrecision) == supportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } else { - static const std::set defaultSupportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set defaultSupportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; if (defaultSupportedPrecisions.find(inDataPrecision) == defaultSupportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } std::vector inDataConfigurators({{LayoutType::ncsp, inDataPrecision}, - {LayoutType::ncsp, Precision::I32}}); + {LayoutType::ncsp, ov::element::i32}}); if (inputShapes.size() > PER_SAMPLE_WEIGHTS_IDX) inDataConfigurators.push_back({LayoutType::ncsp, inDataPrecision}); diff --git a/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.cpp b/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.cpp index 7e65fb5f2a460a..dc5861aa20b15a 100644 --- a/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.cpp +++ b/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.cpp @@ -119,26 +119,26 @@ void EmbeddingBagSum::processData(const T* srcData, const T* weightsData, parallel_nt(0, threadBody); } -void EmbeddingBagSum::execute(const uint8_t* srcData, const uint8_t* weightsData, const InferenceEngine::Precision &srcPrc, +void EmbeddingBagSum::execute(const uint8_t* srcData, const uint8_t* weightsData, const ov::element::Type &srcPrc, const VectorDims& inDims, const MemoryPtr& outMemory) { switch (srcPrc) { - case Precision::FP32: { - return processData::value_type>(reinterpret_cast(srcData), + case ov::element::f32: { + return processData::value_type>(reinterpret_cast(srcData), reinterpret_cast(weightsData), inDims, outMemory); } - case Precision::I8: { - return processData::value_type>(reinterpret_cast(srcData), + case ov::element::i8: { + return processData::value_type>(reinterpret_cast(srcData), reinterpret_cast(weightsData), inDims, outMemory); } - case Precision::U8: { - return processData::value_type>(srcData, weightsData, inDims, outMemory); + case ov::element::u8: { + return processData::value_type>(srcData, weightsData, inDims, outMemory); } - case Precision::I32: { - return processData::value_type>(reinterpret_cast(srcData), + case ov::element::i32: { + return processData::value_type>(reinterpret_cast(srcData), reinterpret_cast(weightsData), inDims, outMemory); } default: { - OPENVINO_THROW("EmbeddingBagSum layer does not support precision '" + std::string(srcPrc.name()) + "'"); + OPENVINO_THROW("EmbeddingBagSum layer does not support precision '" + std::string(srcPrc.get_type_name()) + "'"); } } } diff --git a/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.h b/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.h index 6331f1761b2069..09496147b4f3c0 100644 --- a/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.h +++ b/src/plugins/intel_cpu/src/nodes/embedding_bag_sum.h @@ -23,7 +23,7 @@ class EmbeddingBagSum { size_t perSampleWeightsIdx, size_t defaultIndexIdx); - void execute(const uint8_t* srcData, const uint8_t* weightsData, const InferenceEngine::Precision &srcPrc, + void execute(const uint8_t* srcData, const uint8_t* weightsData, const ov::element::Type &srcPrc, const VectorDims& inDims, const MemoryPtr& outMemory); ~EmbeddingBagSum() = default; diff --git a/src/plugins/intel_cpu/src/nodes/embedding_segments_sum.cpp b/src/plugins/intel_cpu/src/nodes/embedding_segments_sum.cpp index 9f3ad2e3137c7b..bee500e9e27572 100644 --- a/src/plugins/intel_cpu/src/nodes/embedding_segments_sum.cpp +++ b/src/plugins/intel_cpu/src/nodes/embedding_segments_sum.cpp @@ -48,28 +48,28 @@ void EmbeddingSegmentsSum::initSupportedPrimitiveDescriptors() { return; std::string logPrefix = std::string("Layer EmbeddingBagSum with name '") + _layerName + "' "; - static const std::set supportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set supportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; auto inDataPrecision = getOriginalInputPrecisionAtPort(EMB_TABLE_IDX); - if (inDataPrecision == Precision::BF16) - inDataPrecision = Precision::FP32; + if (inDataPrecision == ov::element::bf16) + inDataPrecision = ov::element::f32; if (!supportedPrecisions.empty()) { if (supportedPrecisions.find(inDataPrecision) == supportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } else { - static const std::set defaultSupportedPrecisions = - {Precision::FP32, Precision::I8, Precision::U8, Precision::I32}; + static const std::set defaultSupportedPrecisions = + {ov::element::f32, ov::element::i8, ov::element::u8, ov::element::i32}; if (defaultSupportedPrecisions.find(inDataPrecision) == defaultSupportedPrecisions.end()) - OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.name()); + OPENVINO_THROW(logPrefix, "has unsupported precision: ", inDataPrecision.get_type_name()); } std::vector inDataConfigurators({{LayoutType::ncsp, inDataPrecision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}); + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}); if (inputShapes.size() > DEFAULT_INDEX_IDX) - inDataConfigurators.push_back({LayoutType::ncsp, Precision::I32}); + inDataConfigurators.push_back({LayoutType::ncsp, ov::element::i32}); if (inputShapes.size() > PER_SAMPLE_WEIGHTS_IDX) inDataConfigurators.push_back({LayoutType::ncsp, inDataPrecision}); diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_convert.cpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_convert.cpp index afed4031768f2f..7ef3db9d43c445 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_convert.cpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_convert.cpp @@ -79,48 +79,48 @@ bool ACLConvertExecutorBuilder::isSupported(const ConvertParams& convertParams, const MemoryDescPtr& dstDesc) const { if (convertParams.srcPrc != convertParams.dstPrc) { if (!one_of(convertParams.srcPrc, - Precision::I8, - Precision::U8, - Precision::U16, - Precision::I16, - Precision::FP16, - Precision::I32, - Precision::FP32)) { + ov::element::i8, + ov::element::u8, + ov::element::u16, + ov::element::i16, + ov::element::f16, + ov::element::i32, + ov::element::f32)) { DEBUG_LOG("NECopy does not support source precision: ", convertParams.srcPrc.name()); return false; } - if ((convertParams.srcPrc == Precision::I8 && !one_of(convertParams.dstPrc, - Precision::I16, - Precision::I32, - Precision::FP16, - Precision::FP32)) || - (convertParams.srcPrc == Precision::U8 && !one_of(convertParams.dstPrc, - Precision::U16, - Precision::I16, - Precision::I32, - Precision::FP16, - Precision::FP32)) || - (convertParams.srcPrc == Precision::U16 && !one_of(convertParams.dstPrc, - Precision::U8, - Precision::U32)) || - (convertParams.srcPrc == Precision::I16 && !one_of(convertParams.dstPrc, - Precision::I8, - Precision::U8, - Precision::I32)) || - (convertParams.srcPrc == Precision::FP16 && !one_of(convertParams.dstPrc, - Precision::I8, - Precision::FP32, - Precision::I32, - Precision::U8)) || - (convertParams.srcPrc == Precision::I32 && !one_of(convertParams.dstPrc, - Precision::I8, - Precision::FP16, - Precision::FP32, - Precision::U8)) || - (convertParams.srcPrc == Precision::FP32 && !one_of(convertParams.dstPrc, - Precision::BF16, - Precision::FP16, - Precision::I32))) { + if ((convertParams.srcPrc == ov::element::i8 && !one_of(convertParams.dstPrc, + ov::element::i16, + ov::element::i32, + ov::element::f16, + ov::element::f32)) || + (convertParams.srcPrc == ov::element::u8 && !one_of(convertParams.dstPrc, + ov::element::u16, + ov::element::i16, + ov::element::i32, + ov::element::f16, + ov::element::f32)) || + (convertParams.srcPrc == ov::element::u16 && !one_of(convertParams.dstPrc, + ov::element::u8, + ov::element::u32)) || + (convertParams.srcPrc == ov::element::i16 && !one_of(convertParams.dstPrc, + ov::element::i8, + ov::element::u8, + ov::element::i32)) || + (convertParams.srcPrc == ov::element::f16 && !one_of(convertParams.dstPrc, + ov::element::i8, + ov::element::f32, + ov::element::i32, + ov::element::u8)) || + (convertParams.srcPrc == ov::element::i32 && !one_of(convertParams.dstPrc, + ov::element::i8, + ov::element::f16, + ov::element::f32, + ov::element::u8)) || + (convertParams.srcPrc == ov::element::f32 && !one_of(convertParams.dstPrc, + ov::element::bf16, + ov::element::f16, + ov::element::i32))) { DEBUG_LOG("NECopy does not support passed combination of source and destination precisions. ", "source precision: ", convertParams.srcPrc.name(), " destination precsion: ", convertParams.dstPrc.name()); return false; diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_deconv.cpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_deconv.cpp index 3fdf4b1de22441..692d9d8f370d49 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_deconv.cpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_deconv.cpp @@ -146,7 +146,7 @@ bool AclDeconvExecutorBuilder::customIsSupported(const DeconvAttrs &deconvAttrs, } // TODO: Ticket CVS-114087 - enable FP16 when check FP16 scoup - if (!(one_of(srcDescs[0]->getPrecision(), /*InferenceEngine::Precision::FP16, */InferenceEngine::Precision::FP32) && + if (!(one_of(srcDescs[0]->getPrecision(), /*ov::element::f16, */ov::element::f32) && srcDescs[0]->getPrecision() == srcDescs[1]->getPrecision() && srcDescs[1]->getPrecision() == dstDescs[0]->getPrecision())) { DEBUG_LOG("AclDeconvExecutor does not support precisions:", diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_eltwise.cpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_eltwise.cpp index 390dbd97c97fd3..cdc038fbf9155d 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_eltwise.cpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_eltwise.cpp @@ -69,7 +69,7 @@ bool AclEltwiseExecutor::isEltwiseAlgorithmSupported(Algorithm algorithm) { bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs, const std::vector& srcDescs, const std::vector& dstDescs) const { - auto checkPrecision = [&srcDescs, &dstDescs](std::vector srcVecPrc, Precision dstPrc) -> bool { + auto checkPrecision = [&srcDescs, &dstDescs](std::vector srcVecPrc, ov::element::Type dstPrc) -> bool { for (size_t i = 0; i < srcDescs.size(); i++) { if (srcDescs[i]->getPrecision() != srcVecPrc[i]) return false; } @@ -92,48 +92,48 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs, case Algorithm::EltwiseSwish: case Algorithm::EltwisePrelu: case Algorithm::EltwiseHswish: - if (!(checkPrecision({Precision::FP16, Precision::FP16}, Precision::FP16) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::FP32))) { + if (!(checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) { return false; } break; case Algorithm::EltwiseAbs: case Algorithm::EltwiseExp: case Algorithm::EltwiseLog: - if (!(checkPrecision({Precision::I32, Precision::I32}, Precision::I32) || - checkPrecision({Precision::FP16, Precision::FP16}, Precision::FP16) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::FP32))) { + if (!(checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) || + checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) { return false; } break; case Algorithm::EltwiseMaximum: case Algorithm::EltwiseMinimum: case Algorithm::EltwiseSquaredDifference: - if (!(checkPrecision({Precision::I16, Precision::I16}, Precision::I16) || - checkPrecision({Precision::I32, Precision::I32}, Precision::I32) || - checkPrecision({Precision::FP16, Precision::FP16}, Precision::FP16) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::FP32))) { + if (!(checkPrecision({ov::element::i16, ov::element::i16}, ov::element::i16) || + checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) || + checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) { return false; } break; case Algorithm::EltwiseAdd: case Algorithm::EltwiseSubtract: - if (!(checkPrecision({Precision::U8, Precision::U8}, Precision::U8) || - checkPrecision({Precision::I16, Precision::I16}, Precision::I16) || - checkPrecision({Precision::I32, Precision::I32}, Precision::I32) || - checkPrecision({Precision::FP16, Precision::FP16}, Precision::FP16) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::FP32))) { + if (!(checkPrecision({ov::element::u8, ov::element::u8}, ov::element::u8) || + checkPrecision({ov::element::i16, ov::element::i16}, ov::element::i16) || + checkPrecision({ov::element::i32, ov::element::i32}, ov::element::i32) || + checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) { return false; } break; case Algorithm::EltwiseMultiply: - if (!(checkPrecision({Precision::U8, Precision::U8}, Precision::U8) || - checkPrecision({Precision::U8, Precision::U8}, Precision::I16) || - checkPrecision({Precision::U8, Precision::I16}, Precision::I16) || - checkPrecision({Precision::I16, Precision::U8}, Precision::I16) || - checkPrecision({Precision::I16, Precision::I16}, Precision::I16) || - checkPrecision({Precision::FP16, Precision::FP16}, Precision::FP16) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::FP32))) { + if (!(checkPrecision({ov::element::u8, ov::element::u8}, ov::element::u8) || + checkPrecision({ov::element::u8, ov::element::u8}, ov::element::i16) || + checkPrecision({ov::element::u8, ov::element::i16}, ov::element::i16) || + checkPrecision({ov::element::i16, ov::element::u8}, ov::element::i16) || + checkPrecision({ov::element::i16, ov::element::i16}, ov::element::i16) || + checkPrecision({ov::element::f16, ov::element::f16}, ov::element::f16) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::f32))) { return false; } break; @@ -144,11 +144,11 @@ bool AclEltwiseExecutorBuilder::isSupported(const EltwiseAttrs& eltwiseAttrs, case Algorithm::EltwiseGreaterEqual: case Algorithm::EltwiseLess: case Algorithm::EltwiseLessEqual: - if (!(checkPrecision({Precision::U8, Precision::U8}, Precision::U8) || - checkPrecision({Precision::I16, Precision::I16}, Precision::U8) || - checkPrecision({Precision::I32, Precision::I32}, Precision::U8) || - checkPrecision({Precision::FP16, Precision::FP16}, Precision::U8) || - checkPrecision({Precision::FP32, Precision::FP32}, Precision::U8))) { + if (!(checkPrecision({ov::element::u8, ov::element::u8}, ov::element::u8) || + checkPrecision({ov::element::i16, ov::element::i16}, ov::element::u8) || + checkPrecision({ov::element::i32, ov::element::i32}, ov::element::u8) || + checkPrecision({ov::element::f16, ov::element::f16}, ov::element::u8) || + checkPrecision({ov::element::f32, ov::element::f32}, ov::element::u8))) { return false; } break; diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_mvn.hpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_mvn.hpp index c0cf0d13e5e3dd..bf9927408b617b 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_mvn.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_mvn.hpp @@ -41,8 +41,8 @@ class AclMVNExecutorBuilder : public MVNExecutorBuilder { bool isSupported(const MVNAttrs& mvnAttrs, const std::vector& srcDescs, const std::vector& dstDescs) const override { - if ((srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP16) || + if ((srcDescs[0]->getPrecision() != ov::element::f32 && + srcDescs[0]->getPrecision() != ov::element::f16) || srcDescs[0]->getPrecision() != dstDescs[0]->getPrecision()) { DEBUG_LOG("NEMeanStdDevNormalizationLayer does not support precisions:", " src[0]=", srcDescs[0]->getPrecision(), diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_pooling.hpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_pooling.hpp index 2525ccb490468a..9f6b1bb0fcc668 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_pooling.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_pooling.hpp @@ -54,10 +54,10 @@ class AclPoolingExecutorBuilder : public PoolingExecutorBuilder { bool isSupported(const PoolingAttrs& poolingAttrs, const std::vector& srcDescs, const std::vector& dstDescs) const override { - if ((srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - dstDescs[0]->getPrecision() != InferenceEngine::Precision::FP32) && - (srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP16 && - dstDescs[0]->getPrecision() != InferenceEngine::Precision::FP16)) { + if ((srcDescs[0]->getPrecision() != ov::element::f32 && + dstDescs[0]->getPrecision() != ov::element::f32) && + (srcDescs[0]->getPrecision() != ov::element::f16 && + dstDescs[0]->getPrecision() != ov::element::f16)) { DEBUG_LOG("AclPoolingExecutor does not support precisions:", " src[0]=", srcDescs[0]->getPrecision(), " dst[0]=", dstDescs[0]->getPrecision()); @@ -65,12 +65,12 @@ class AclPoolingExecutorBuilder : public PoolingExecutorBuilder { } if (srcDescs.size() == 2u && - (srcDescs[1]->getPrecision() != InferenceEngine::Precision::FP32 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - dstDescs[0]->getPrecision() != InferenceEngine::Precision::FP32) && - (srcDescs[1]->getPrecision() != InferenceEngine::Precision::FP16 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP16 && - dstDescs[0]->getPrecision() != InferenceEngine::Precision::FP16)) { + (srcDescs[1]->getPrecision() != ov::element::f32 && + srcDescs[0]->getPrecision() != ov::element::f32 && + dstDescs[0]->getPrecision() != ov::element::f32) && + (srcDescs[1]->getPrecision() != ov::element::f16 && + srcDescs[0]->getPrecision() != ov::element::f16 && + dstDescs[0]->getPrecision() != ov::element::f16)) { DEBUG_LOG("AclPoolingExecutor does not support precisions:", " src[0]=", srcDescs[0]->getPrecision(), " src[1]=", srcDescs[1]->getPrecision(), @@ -79,7 +79,7 @@ class AclPoolingExecutorBuilder : public PoolingExecutorBuilder { } if (dstDescs.size() == 2u && - dstDescs[1]->getPrecision() != InferenceEngine::Precision::U32) { + dstDescs[1]->getPrecision() != ov::element::u32) { DEBUG_LOG("AclPoolingExecutor supports U32 as indices precisions only. ", "Passed indices precision: ", dstDescs[1]->getPrecision()); return false; diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_reduce.hpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_reduce.hpp index bdc06362c0d685..3fa6adccb8214c 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_reduce.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_reduce.hpp @@ -46,8 +46,8 @@ class AclReduceExecutorBuilder : public ReduceExecutorBuilder { const std::vector& dstDescs) const override { if (reduceAttrs.operation == Algorithm::ReduceMean) { if (srcDescs[0]->getPrecision() != dstDescs[0]->getPrecision() || - (srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP16)) { + (srcDescs[0]->getPrecision() != ov::element::f32 && + srcDescs[0]->getPrecision() != ov::element::f16)) { DEBUG_LOG("NEReduceMean does not support precisions:", " src[0]=", srcDescs[0]->getPrecision(), " dst[0]=", dstDescs[0]->getPrecision()); @@ -55,9 +55,9 @@ class AclReduceExecutorBuilder : public ReduceExecutorBuilder { } } else { if (srcDescs[0]->getPrecision() != dstDescs[0]->getPrecision() || - (srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP16 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::I32)) { + (srcDescs[0]->getPrecision() != ov::element::f32 && + srcDescs[0]->getPrecision() != ov::element::f16 && + srcDescs[0]->getPrecision() != ov::element::i32)) { DEBUG_LOG("NEReductionOperation does not support precisions:", " src[0]=", srcDescs[0]->getPrecision(), " dst[0]=", dstDescs[0]->getPrecision()); diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_transpose.hpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_transpose.hpp index d6a500388dbe76..b94cc2f3a4a279 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_transpose.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_transpose.hpp @@ -49,8 +49,8 @@ class ACLTransposeExecutorBuilder : public TransposeExecutorBuilder { DEBUG_LOG("NEPermute requires the same input and output precisions"); return false; } - if (srcDescs[0]->getPrecision() != InferenceEngine::Precision::FP32 && - srcDescs[0]->getPrecision() != InferenceEngine::Precision::I8) { + if (srcDescs[0]->getPrecision() != ov::element::f32 && + srcDescs[0]->getPrecision() != ov::element::i8) { DEBUG_LOG("NEPermute supports 1, 2, 4 bytes data types. FP16 implementation is disabled due to performance issues"); return false; } diff --git a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_utils.hpp b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_utils.hpp index 8133a23ee29769..4f064032a8aa14 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/acl/acl_utils.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/acl/acl_utils.hpp @@ -3,10 +3,9 @@ // #pragma once -#include "ie_precision.hpp" #include "memory_desc/cpu_memory_desc.h" #include "arm_compute/core/Types.h" - +// #include "openvino/core/type/element_type.hpp" namespace ov { namespace intel_cpu { @@ -76,19 +75,19 @@ inline Dim vectorProduct(const VectorDims& vec, size_t size) { * @param precision precision to be converted * @return ComputeLibrary DataType or UNKNOWN if precision is not mapped to DataType */ -inline arm_compute::DataType precisionToAclDataType(InferenceEngine::Precision precision) { +inline arm_compute::DataType precisionToAclDataType(ov::element::Type precision) { switch (precision) { - case InferenceEngine::Precision::I8: return arm_compute::DataType::S8; - case InferenceEngine::Precision::U8: return arm_compute::DataType::U8; - case InferenceEngine::Precision::I16: return arm_compute::DataType::S16; - case InferenceEngine::Precision::U16: return arm_compute::DataType::U16; - case InferenceEngine::Precision::I32: return arm_compute::DataType::S32; - case InferenceEngine::Precision::U32: return arm_compute::DataType::U32; - case InferenceEngine::Precision::FP16: return arm_compute::DataType::F16; - case InferenceEngine::Precision::FP32: return arm_compute::DataType::F32; - case InferenceEngine::Precision::FP64: return arm_compute::DataType::F64; - case InferenceEngine::Precision::I64: return arm_compute::DataType::S64; - case InferenceEngine::Precision::BF16: return arm_compute::DataType::BFLOAT16; + case ov::element::i8: return arm_compute::DataType::S8; + case ov::element::u8: return arm_compute::DataType::U8; + case ov::element::i16: return arm_compute::DataType::S16; + case ov::element::u16: return arm_compute::DataType::U16; + case ov::element::i32: return arm_compute::DataType::S32; + case ov::element::u32: return arm_compute::DataType::U32; + case ov::element::f16: return arm_compute::DataType::F16; + case ov::element::f32: return arm_compute::DataType::F32; + case ov::element::f64: return arm_compute::DataType::F64; + case ov::element::i64: return arm_compute::DataType::S64; + case ov::element::bf16: return arm_compute::DataType::BFLOAT16; default: return arm_compute::DataType::UNKNOWN; } } diff --git a/src/plugins/intel_cpu/src/nodes/executors/common/ref_opt_transpose.cpp b/src/plugins/intel_cpu/src/nodes/executors/common/ref_opt_transpose.cpp index 5d9c1f533a4a29..4cc32133c466cf 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/common/ref_opt_transpose.cpp +++ b/src/plugins/intel_cpu/src/nodes/executors/common/ref_opt_transpose.cpp @@ -122,9 +122,9 @@ void RefOptimizedTransposeExecutor::exec(const std::vector& src, con const size_t dataSize = src[0]->getDesc().getPrecision().size(); TransposeContext ctx = {src[0], dst[0], MB}; OV_SWITCH(intel_cpu, TransposeOptimizedEmitter, ctx, dataSize, - OV_CASE(1u, InferenceEngine::PrecisionTrait::value_type), - OV_CASE(2u, InferenceEngine::PrecisionTrait::value_type), - OV_CASE(4u, InferenceEngine::PrecisionTrait::value_type)); + OV_CASE(1u, element_type_traits::value_type), + OV_CASE(2u, element_type_traits::value_type), + OV_CASE(4u, element_type_traits::value_type)); } bool RefOptimizedTransposeExecutor::init(const TransposeParams &transposeParams, diff --git a/src/plugins/intel_cpu/src/nodes/executors/convert.hpp b/src/plugins/intel_cpu/src/nodes/executors/convert.hpp index 7e15508863e36e..323768a0b20836 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/convert.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/convert.hpp @@ -12,9 +12,9 @@ namespace ov { namespace intel_cpu { struct ConvertParams { - InferenceEngine::Precision srcPrc; - InferenceEngine::Precision origPrc; - InferenceEngine::Precision dstPrc; + ov::element::Type srcPrc; + ov::element::Type origPrc; + ov::element::Type dstPrc; size_t size; }; diff --git a/src/plugins/intel_cpu/src/nodes/executors/interpolate.hpp b/src/plugins/intel_cpu/src/nodes/executors/interpolate.hpp index 494b3760c57f91..29d46ee4bec621 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/interpolate.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/interpolate.hpp @@ -61,8 +61,8 @@ struct InterpolateAttrs { float cubeCoeff = -0.75; std::vector padBegin; std::vector padEnd; - InferenceEngine::Precision inPrc; - InferenceEngine::Precision outPrc; + ov::element::Type inPrc; + ov::element::Type outPrc; InterpolateLayoutType layout; std::vector dataScales; bool hasPad = false; diff --git a/src/plugins/intel_cpu/src/nodes/executors/mvn.hpp b/src/plugins/intel_cpu/src/nodes/executors/mvn.hpp index c3c01914e3a509..759115a4b4b794 100644 --- a/src/plugins/intel_cpu/src/nodes/executors/mvn.hpp +++ b/src/plugins/intel_cpu/src/nodes/executors/mvn.hpp @@ -30,8 +30,8 @@ struct MVNAttrs { bool normalizeVariance_ = false; float epsValue_ = 0.0f; MVNEpsMode epsMode_ = INSIDE_SQRT; - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; }; class MVNExecutor { diff --git a/src/plugins/intel_cpu/src/nodes/experimental_detectron_detection_output.cpp b/src/plugins/intel_cpu/src/nodes/experimental_detectron_detection_output.cpp index c0404cbb961244..cab454d47f5edb 100644 --- a/src/plugins/intel_cpu/src/nodes/experimental_detectron_detection_output.cpp +++ b/src/plugins/intel_cpu/src/nodes/experimental_detectron_detection_output.cpp @@ -263,12 +263,12 @@ void ExperimentalDetectronDetectionOutput::initSupportedPrimitiveDescriptors() { std::vector inDataConf; inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/experimental_detectron_generate_proposals_single_image.cpp b/src/plugins/intel_cpu/src/nodes/experimental_detectron_generate_proposals_single_image.cpp index ed3f8c276333aa..6e30b8972bf943 100644 --- a/src/plugins/intel_cpu/src/nodes/experimental_detectron_generate_proposals_single_image.cpp +++ b/src/plugins/intel_cpu/src/nodes/experimental_detectron_generate_proposals_single_image.cpp @@ -311,12 +311,12 @@ void ExperimentalDetectronGenerateProposalsSingleImage::initSupportedPrimitiveDe if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/experimental_detectron_priorgridgenerator.cpp b/src/plugins/intel_cpu/src/nodes/experimental_detectron_priorgridgenerator.cpp index 940bbc6714a754..47df43320ab44c 100644 --- a/src/plugins/intel_cpu/src/nodes/experimental_detectron_priorgridgenerator.cpp +++ b/src/plugins/intel_cpu/src/nodes/experimental_detectron_priorgridgenerator.cpp @@ -53,10 +53,10 @@ void ExperimentalDetectronPriorGridGenerator::initSupportedPrimitiveDescriptors( if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/experimental_detectron_roifeatureextractor.cpp b/src/plugins/intel_cpu/src/nodes/experimental_detectron_roifeatureextractor.cpp index 6f759953760c29..12ca1aa924b6f0 100644 --- a/src/plugins/intel_cpu/src/nodes/experimental_detectron_roifeatureextractor.cpp +++ b/src/plugins/intel_cpu/src/nodes/experimental_detectron_roifeatureextractor.cpp @@ -321,11 +321,11 @@ void ExperimentalDetectronROIFeatureExtractor::initSupportedPrimitiveDescriptors std::vector inDataConf; inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/experimental_detectron_topkrois.cpp b/src/plugins/intel_cpu/src/nodes/experimental_detectron_topkrois.cpp index f1db79f5c985f4..36be10177d57cb 100644 --- a/src/plugins/intel_cpu/src/nodes/experimental_detectron_topkrois.cpp +++ b/src/plugins/intel_cpu/src/nodes/experimental_detectron_topkrois.cpp @@ -58,9 +58,9 @@ void ExperimentalDetectronTopKROIs::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/extract_image_patches.cpp b/src/plugins/intel_cpu/src/nodes/extract_image_patches.cpp index a3d3602c4b3b90..75cfd5bc617b3d 100644 --- a/src/plugins/intel_cpu/src/nodes/extract_image_patches.cpp +++ b/src/plugins/intel_cpu/src/nodes/extract_image_patches.cpp @@ -419,7 +419,7 @@ void ExtractImagePatches::initSupportedPrimitiveDescriptors() { const auto precision = getOriginalInputPrecisionAtPort(0); if (_supported_precisions_sizes.find(precision.size()) == _supported_precisions_sizes.end()) - OPENVINO_THROW(errorPrefix, "has unsupported precision: ", precision.name()); + OPENVINO_THROW(errorPrefix, "has unsupported precision: ", precision.get_type_name()); addSupportedPrimDesc({{LayoutType::ncsp, precision}}, {{LayoutType::ncsp, precision}}, diff --git a/src/plugins/intel_cpu/src/nodes/eye.cpp b/src/plugins/intel_cpu/src/nodes/eye.cpp index 585779eb149038..8b5fa33c9c1acf 100644 --- a/src/plugins/intel_cpu/src/nodes/eye.cpp +++ b/src/plugins/intel_cpu/src/nodes/eye.cpp @@ -78,11 +78,11 @@ struct Eye::EyeExecute { void Eye::execute(dnnl::stream strm) { auto outputPrec = getChildEdgesAtPort(0)[0]->getMemory().getDesc().getPrecision(); OV_SWITCH(intel_cpu, EyeExecute, this, outputPrec, - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::BF16, bfloat16_t), - OV_CASE(Precision::I32, int), - OV_CASE(Precision::I8, int8_t), - OV_CASE(Precision::U8, uint8_t)) + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::bf16, bfloat16_t), + OV_CASE(ov::element::i32, int), + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t)) } void Eye::initSupportedPrimitiveDescriptors() { @@ -93,9 +93,9 @@ void Eye::initSupportedPrimitiveDescriptors() { inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::I32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::i32); outDataConf.reserve(1); - outDataConf.emplace_back(LayoutType::ncsp, convertPrecision(outType)); + outDataConf.emplace_back(LayoutType::ncsp, outType); addSupportedPrimDesc(inDataConf, outDataConf, impl_desc_type::ref); } diff --git a/src/plugins/intel_cpu/src/nodes/fake_quantize.cpp b/src/plugins/intel_cpu/src/nodes/fake_quantize.cpp index fe2a900e6f55b9..07c58adf5deb1c 100644 --- a/src/plugins/intel_cpu/src/nodes/fake_quantize.cpp +++ b/src/plugins/intel_cpu/src/nodes/fake_quantize.cpp @@ -230,7 +230,7 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ void generate() override { do_dequantization = jqp_.op_type == Algorithm::FQCommon; - do_rounding = do_dequantization || jqp_.dst_prc == Precision::FP32; + do_rounding = do_dequantization || jqp_.dst_prc == ov::element::f32; this->preamble(); @@ -669,80 +669,80 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ L(exit_label); } - inline void load_vector(Zmm zmm_src, const Xbyak::Address &op, Precision src_prc) { + inline void load_vector(Zmm zmm_src, const Xbyak::Address &op, ov::element::Type src_prc) { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(zmm_src, op); break; - case Precision::I8: + case ov::element::i8: uni_vpmovsxbd(zmm_src, op); break; - case Precision::U8: + case ov::element::u8: uni_vpmovzxbd(zmm_src, op); break; default: assert(!"unknown src_prc"); } - if (src_prc != Precision::FP32) { + if (src_prc != ov::element::f32) { uni_vcvtdq2ps(zmm_src, zmm_src); } } - inline void load_vector(Ymm ymm_src, const Xbyak::Address &op, Precision src_prc) { + inline void load_vector(Ymm ymm_src, const Xbyak::Address &op, ov::element::Type src_prc) { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(ymm_src, op); break; - case Precision::I8: + case ov::element::i8: uni_vpmovsxbd(ymm_src, op); break; - case Precision::U8: + case ov::element::u8: uni_vpmovzxbd(ymm_src, op); break; default: assert(!"unknown src_prc"); } - if (src_prc != Precision::FP32) { + if (src_prc != ov::element::f32) { uni_vcvtdq2ps(ymm_src, ymm_src); } } - inline void load_vector(Xmm xmm_src, const Xbyak::Address &op, Precision src_prc) { + inline void load_vector(Xmm xmm_src, const Xbyak::Address &op, ov::element::Type src_prc) { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(xmm_src, op); break; - case Precision::I8: + case ov::element::i8: uni_vpmovsxbd(xmm_src, op); break; - case Precision::U8: + case ov::element::u8: uni_vpmovzxbd(xmm_src, op); break; default: assert(!"unknown src_prc"); } - if (src_prc != Precision::FP32) { + if (src_prc != ov::element::f32) { uni_vcvtdq2ps(xmm_src, xmm_src); } } - inline void load_scalar(Xmm xmm_src, const Xbyak::Address &op, Precision src_prc) { + inline void load_scalar(Xmm xmm_src, const Xbyak::Address &op, ov::element::Type src_prc) { switch (src_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovss(xmm_src, op); break; - case Precision::I8: + case ov::element::i8: movsx(reg_tmp_32, op); uni_vmovq(xmm_src, reg_tmp_64); break; - case Precision::U8: + case ov::element::u8: movzx(reg_tmp_32, op); uni_vmovq(xmm_src, reg_tmp_64); break; @@ -750,25 +750,25 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ assert(!"unknown src_prc"); } - if (src_prc != Precision::FP32) { + if (src_prc != ov::element::f32) { uni_vcvtdq2ps(xmm_src, xmm_src); } } - inline void store_vector(const Xbyak::Address &op, Zmm zmm_dst, Precision dst_prc) { - if (dst_prc != Precision::FP32) { + inline void store_vector(const Xbyak::Address &op, Zmm zmm_dst, ov::element::Type dst_prc) { + if (dst_prc != ov::element::f32) { uni_vcvtps2dq(zmm_dst, zmm_dst); } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(op, zmm_dst); break; - case Precision::I8: + case ov::element::i8: vpmovsdb(op, zmm_dst); break; - case Precision::U8: + case ov::element::u8: vpmaxsd(zmm_dst, zmm_dst, vmm_zero); vpmovusdb(op, zmm_dst); break; @@ -777,19 +777,19 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ } } - inline void store_vector(const Xbyak::Address &op, Ymm ymm_dst, Precision dst_prc) { + inline void store_vector(const Xbyak::Address &op, Ymm ymm_dst, ov::element::Type dst_prc) { Xmm xmm_dst = Xmm(ymm_dst.getIdx()); - if (dst_prc != Precision::FP32) { + if (dst_prc != ov::element::f32) { uni_vcvtps2dq(ymm_dst, ymm_dst); } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(op, ymm_dst); break; - case Precision::I8: + case ov::element::i8: uni_vpackssdw(ymm_dst, ymm_dst, ymm_dst); vpermq(ymm_dst, ymm_dst, 0x08); @@ -798,7 +798,7 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ vmovq(op, xmm_dst); break; - case Precision::U8: + case ov::element::u8: uni_vpackusdw(ymm_dst, ymm_dst, ymm_dst); vpermq(ymm_dst, ymm_dst, 0x08); @@ -812,22 +812,22 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ } } - inline void store_vector(const Xbyak::Address &op, Xmm xmm_dst, Precision dst_prc) { - if (dst_prc != Precision::FP32) { + inline void store_vector(const Xbyak::Address &op, Xmm xmm_dst, ov::element::Type dst_prc) { + if (dst_prc != ov::element::f32) { uni_vcvtps2dq(xmm_dst, xmm_dst); } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovups(op, xmm_dst); break; - case Precision::I8: + case ov::element::i8: uni_vpackssdw(xmm_dst, xmm_dst, xmm_dst); uni_vpacksswb(xmm_dst, xmm_dst, xmm_dst); uni_vmovd(op, xmm_dst); break; - case Precision::U8: + case ov::element::u8: uni_vpackusdw(xmm_dst, xmm_dst, xmm_dst); uni_vpackuswb(xmm_dst, xmm_dst, xmm_dst); uni_vmovd(op, xmm_dst); @@ -837,23 +837,23 @@ struct jit_uni_quantization_kernel : public jit_uni_quantize_kernel, public jit_ } } - inline void store_scalar(const Xbyak::Address &op, Xmm xmm_dst, Precision dst_prc) { - if (dst_prc != Precision::FP32) { + inline void store_scalar(const Xbyak::Address &op, Xmm xmm_dst, ov::element::Type dst_prc) { + if (dst_prc != ov::element::f32) { uni_vcvtps2dq(xmm_dst, xmm_dst); } switch (dst_prc) { - case Precision::FP32: - case Precision::I32: + case ov::element::f32: + case ov::element::i32: uni_vmovss(op, xmm_dst); break; - case Precision::I8: + case ov::element::i8: uni_vpackssdw(xmm_dst, xmm_dst, xmm_dst); uni_vpacksswb(xmm_dst, xmm_dst, xmm_dst); uni_vmovq(reg_tmp_64, xmm_dst); mov(op, reg_tmp_8); break; - case Precision::U8: + case ov::element::u8: uni_vpackusdw(xmm_dst, xmm_dst, xmm_dst); uni_vpackuswb(xmm_dst, xmm_dst, xmm_dst); uni_vmovq(reg_tmp_64, xmm_dst); @@ -933,9 +933,9 @@ struct FakeQuantKey { using namespace dnnl::impl::primitive_hashing; size_t seed = 0; seed = hash_combine(seed, jqp.is_planar); - seed = hash_combine(seed, jqp.src_prc.getPrecVal()); - seed = hash_combine(seed, jqp.wei_prc.getPrecVal()); - seed = hash_combine(seed, jqp.dst_prc.getPrecVal()); + seed = hash_combine(seed, jqp.src_prc.hash()); + seed = hash_combine(seed, jqp.wei_prc.hash()); + seed = hash_combine(seed, jqp.dst_prc.hash()); seed = hash_combine(seed, jqp.op_type); if (jqp.op_type == Algorithm::FQBinarization) { seed = hash_combine(seed, jqp.c); @@ -1280,17 +1280,17 @@ std::vector FakeQuantize::getDataFormats() const { void FakeQuantize::init() { if (binarization) { - inputPrecision = Precision::FP32; - outputPrecision = Precision::BIN; + inputPrecision = ov::element::f32; + outputPrecision = ov::element::u1; } else { inputPrecision = getOriginalInputPrecisionAtPort(0); outputPrecision = getOriginalOutputPrecisionAtPort(0); - if (inputPrecision != Precision::FP32 && inputPrecision != Precision::U8 && inputPrecision != Precision::I8) - inputPrecision = Precision::FP32; + if (inputPrecision != ov::element::f32 && inputPrecision != ov::element::u8 && inputPrecision != ov::element::i8) + inputPrecision = ov::element::f32; - if (outputPrecision != Precision::FP32 && outputPrecision != Precision::U8 && outputPrecision != Precision::I8) - outputPrecision = Precision::FP32; + if (outputPrecision != ov::element::f32 && outputPrecision != ov::element::u8 && outputPrecision != ov::element::i8) + outputPrecision = ov::element::f32; } } @@ -1341,8 +1341,8 @@ void FakeQuantize::initSupportedPrimitiveDescriptors() { impl_type = impl_desc_type::ref; if (!isBinarization()) { - inputPrecision = Precision::FP32; - outputPrecision = Precision::FP32; + inputPrecision = ov::element::f32; + outputPrecision = ov::element::f32; } } @@ -1366,7 +1366,7 @@ void FakeQuantize::initSupportedPrimitiveDescriptors() { dataConfig.setMemDesc(descCreator->createSharedDesc(getInputPrecision(), getInputShapeAtPort(i))); } else { auto descCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::ncsp); - dataConfig.setMemDesc(descCreator->createSharedDesc(Precision::FP32, getInputShapeAtPort(i))); + dataConfig.setMemDesc(descCreator->createSharedDesc(ov::element::f32, getInputShapeAtPort(i))); } config.inConfs.push_back(dataConfig); } @@ -1459,7 +1459,7 @@ void FakeQuantize::createPrimitive() { //Form FakeQuanKey FakeQuantKey key = {}; key.jqp.src_prc = config.inConfs[0].getMemDesc()->getPrecision(); - key.jqp.wei_prc = Precision::FP32; + key.jqp.wei_prc = ov::element::f32; key.jqp.dst_prc = config.outConfs[0].getMemDesc()->getPrecision(); const auto &srcMemory = getParentEdgeAt(0)->getMemory(); @@ -1848,7 +1848,7 @@ void FakeQuantize::initializePostOpDataLegacy(const VectorDims &dims, const size void FakeQuantize::appendMemory(const size_t dataSize, const void *data, MemoryPtr &memPtr, std::vector& postOpsMem) { if (!memPtr) { - DnnlBlockedMemoryDesc memoryDesc(Precision::FP32, {dataSize}); + DnnlBlockedMemoryDesc memoryDesc(ov::element::f32, {dataSize}); memPtr = std::make_shared(getEngine(), memoryDesc, data); postOpsMem.push_back(memPtr); diff --git a/src/plugins/intel_cpu/src/nodes/fake_quantize.h b/src/plugins/intel_cpu/src/nodes/fake_quantize.h index 23e8c03008a1d8..165ae0e82144d5 100644 --- a/src/plugins/intel_cpu/src/nodes/fake_quantize.h +++ b/src/plugins/intel_cpu/src/nodes/fake_quantize.h @@ -30,9 +30,9 @@ enum class FQ_add_input_type { struct jit_quantize_params { bool is_planar; - InferenceEngine::Precision src_prc; - InferenceEngine::Precision wei_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type wei_prc; + ov::element::Type dst_prc; Algorithm op_type; @@ -131,8 +131,8 @@ class FakeQuantize : public Node { bool isOutputLowBroadcast() const { return isOutputLowBroadcasted; } bool isOutputHighBroadcast() const { return isOutputHighBroadcasted; } - InferenceEngine::Precision getInputPrecision() const { return inputPrecision; } - InferenceEngine::Precision getOutputPrecision() const { return outputPrecision; } + ov::element::Type getInputPrecision() const { return inputPrecision; } + ov::element::Type getOutputPrecision() const { return outputPrecision; } void appendPostOps(dnnl::post_ops& ops, const VectorDims &postOpDims, std::unordered_map& postOpsMem, const int channelAxis = 1) override; void appendPostOps(dnnl::post_ops& ops, const VectorDims &postOpDims, std::vector& postOpsMem, const int channelAxis = 1) override; @@ -267,8 +267,8 @@ class FakeQuantize : public Node { size_t currentAxisSize = 0; size_t axis = 0; - InferenceEngine::Precision inputPrecision = InferenceEngine::Precision::FP32; - InferenceEngine::Precision outputPrecision = InferenceEngine::Precision::FP32; + ov::element::Type inputPrecision = ov::element::f32; + ov::element::Type outputPrecision = ov::element::f32; std::string errorPrefix; diff --git a/src/plugins/intel_cpu/src/nodes/fullyconnected.cpp b/src/plugins/intel_cpu/src/nodes/fullyconnected.cpp index 5ccc5098357f94..d11ed228d9922c 100644 --- a/src/plugins/intel_cpu/src/nodes/fullyconnected.cpp +++ b/src/plugins/intel_cpu/src/nodes/fullyconnected.cpp @@ -186,7 +186,7 @@ bool FullyConnected::canBeExecutedInInt8() const { auto firstInputPrecision = getOriginalInputPrecisionAtPort(0); auto secondInputPrecision = getOriginalInputPrecisionAtPort(1); - return one_of(firstInputPrecision, Precision::U8, Precision::I8) && secondInputPrecision == Precision::I8; + return one_of(firstInputPrecision, ov::element::u8, ov::element::i8) && secondInputPrecision == ov::element::i8; } void FullyConnected::getSupportedDescriptors() { @@ -195,13 +195,13 @@ void FullyConnected::getSupportedDescriptors() { if (getChildEdges().empty()) OPENVINO_THROW(errorPrefix, " has incorrect number of output edges"); - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(DATA_ID)); - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalOutputPrecisionAtPort(DATA_ID)); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(DATA_ID)); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalOutputPrecisionAtPort(DATA_ID)); if (!fusedWith.empty()) { - outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); + outputDataType = DnnlExtensionUtils::ElementTypeToDataType(fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0)); } - auto weightsDataType = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(WEIGHTS_ID)); + auto weightsDataType = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(WEIGHTS_ID)); withBiases = getOriginalInputsNumber() == 3; @@ -304,7 +304,7 @@ void FullyConnected::prepackMLASWeight() { size_t ldb = weightsNonTransposed ? N : K; MemoryPtr _ptr = std::make_shared(getEngine(), - intel_cpu::CpuBlockedMemoryDesc(Precision::I8, intel_cpu::Shape{packedBsize})); + intel_cpu::CpuBlockedMemoryDesc(ov::element::i8, intel_cpu::Shape{packedBsize})); float* prepackedDst = reinterpret_cast(_ptr->getData()); mlas_sgemm_pack(weightsNonTransposed ? "F" : "T", N, K, ldb, weightPtr, prepackedDst); return _ptr; @@ -823,7 +823,7 @@ void FullyConnected::createDescriptorInternal(const dnnl::memory::desc &inputDes if (useWeightsDecompressionImpl) { // Weights decompression case - wdt = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(WEIGHTS_ID)); + wdt = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(WEIGHTS_ID)); } else if (one_of(indt, dnnl::memory::data_type::bf16, dnnl::memory::data_type::f16)) { #if defined(OPENVINO_ARCH_X86_64) bdt = dnnl::memory::data_type::f32; @@ -834,7 +834,7 @@ void FullyConnected::createDescriptorInternal(const dnnl::memory::desc &inputDes } else if (indt == dnnl::memory::data_type::u8 || indt == dnnl::memory::data_type::s8) { wdt = memory::data_type::s8; if (withBiases) - bdt = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(BIAS_ID)); + bdt = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(BIAS_ID)); } // We need to explicitly specify the memory descriptor to use sparse weights decompression dnnl::memory::desc wgh_candidate; @@ -972,7 +972,7 @@ std::shared_ptr FullyConnected::getSrcMemDesc(const dnnl::primitive_ // report original plain layout for weight since it needs to be reordered dynamically at runtime || (idx == 1 && !useSparseWeights)) { return std::make_shared( - DnnlExtensionUtils::DataTypeToIEPrecision(desc.get_data_type()), getInputShapeAtPort(idx)); + DnnlExtensionUtils::DataTypeToElementType(desc.get_data_type()), getInputShapeAtPort(idx)); } if (getInputShapeAtPort(idx).isDynamic()) { @@ -987,7 +987,7 @@ std::shared_ptr FullyConnected::getDstMemDesc(const dnnl::primitive_ if (getOutputShapeAtPort(idx).getRank() == 3) { return std::make_shared( - DnnlExtensionUtils::DataTypeToIEPrecision(desc.get_data_type()), getOutputShapeAtPort(idx)); + DnnlExtensionUtils::DataTypeToElementType(desc.get_data_type()), getOutputShapeAtPort(idx)); } if (getOutputShapeAtPort(idx).isDynamic()) { @@ -997,14 +997,14 @@ std::shared_ptr FullyConnected::getDstMemDesc(const dnnl::primitive_ return DnnlExtensionUtils::makeDescriptor(desc); } -InferenceEngine::Precision FullyConnected::getRuntimePrecision() const { - std::vector inputPrecisions; +ov::element::Type FullyConnected::getRuntimePrecision() const { + std::vector inputPrecisions; // Don't take bias precision into account size_t inputsNumLimit = 2; for (size_t i = 0; i < std::min(getParentEdges().size(), inputsNumLimit); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToElementType((parentEdge->getMemoryPtr()->getDataType()))); } } @@ -1038,7 +1038,7 @@ bool FullyConnected::canBeExecutedInConv1x1() const { // if layout is nchw/nChw16c: brg1x1 not support. Although jit supports, it should have similar // problems with the above. if (dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core) && - getOriginalInputPrecisionAtPort(DATA_ID) == InferenceEngine::Precision::FP32 && + getOriginalInputPrecisionAtPort(DATA_ID) == ov::element::f32 && one_of(inRank, 2u, 3u) && weightRank == 2) { auto dstMemPtr = getChildEdgesAtPort(0)[0]->getMemoryPtr(); DnnlMemoryDescCPtr outDesc = dstMemPtr->getDescWithType(); @@ -1096,7 +1096,7 @@ bool FullyConnected::useSparseWeightsDecompression() { auto inputPrecision = getOriginalInputPrecisionAtPort(DATA_ID); auto weightsPrecision = getOriginalInputPrecisionAtPort(WEIGHTS_ID); - if (!one_of(inputPrecision , Precision::U8, Precision::I8) || weightsPrecision != Precision::I8) { + if (!one_of(inputPrecision , ov::element::u8, ov::element::i8) || weightsPrecision != ov::element::i8) { return false; } @@ -1142,7 +1142,7 @@ void FullyConnected::fuseDecompressionSubtract(const MemoryCPtr& memory) { } void FullyConnected::fuseDecompressionConstant(const MemoryCPtr& memory, MemoryCPtr& decompressionValuesPtr) { - const auto decompression_prc = InferenceEngine::Precision::FP32; + const auto decompression_prc = ov::element::f32; if (memory->getDesc().getPrecision() == decompression_prc) { decompressionValuesPtr = memory; } else { @@ -1151,8 +1151,8 @@ void FullyConnected::fuseDecompressionConstant(const MemoryCPtr& memory, MemoryC const auto elementsCount = memory->getDescWithType()->getPaddedElementsCount(); cpu_convert(memory->getData(), decompressionValuesPtr->getData(), - DnnlExtensionUtils::DataTypeToIEPrecision(memory->getDataType()), - Precision::FP32, + DnnlExtensionUtils::DataTypeToElementType(memory->getDataType()), + ov::element::f32, elementsCount); } } diff --git a/src/plugins/intel_cpu/src/nodes/fullyconnected.h b/src/plugins/intel_cpu/src/nodes/fullyconnected.h index 9d91aa7d7a970d..6cdf91f54575f2 100644 --- a/src/plugins/intel_cpu/src/nodes/fullyconnected.h +++ b/src/plugins/intel_cpu/src/nodes/fullyconnected.h @@ -47,7 +47,7 @@ class FullyConnected : public Node { std::shared_ptr getSrcMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const override; std::shared_ptr getDstMemDesc(const dnnl::primitive_desc &prim_desc, size_t idx) const override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; bool canFuse(const NodePtr& node) const override; diff --git a/src/plugins/intel_cpu/src/nodes/gather.cpp b/src/plugins/intel_cpu/src/nodes/gather.cpp index 07fe5686c29182..b857cd15b11bf2 100644 --- a/src/plugins/intel_cpu/src/nodes/gather.cpp +++ b/src/plugins/intel_cpu/src/nodes/gather.cpp @@ -130,10 +130,10 @@ void Gather::initSupportedPrimitiveDescriptors() { } // Implementation desc type will be redefined in the fn prepareParams if a kernel will be created. - Precision dataPrecision = getOriginalInputPrecisionAtPort(GATHER_DATA); + ov::element::Type dataPrecision = getOriginalInputPrecisionAtPort(GATHER_DATA); addSupportedPrimDesc({{LayoutType::ncsp, dataPrecision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32, isAxisInputConst}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32, isAxisInputConst}}, {{LayoutType::ncsp, dataPrecision}}, ref_any); @@ -170,8 +170,8 @@ void Gather::initSupportedPrimitiveDescriptors() { } addSupportedPrimDesc({{LayoutType::ncsp, dataPrecision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32, isAxisInputConst}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32, isAxisInputConst}}, {{LayoutType::ncsp, dataPrecision, false, GATHER_DATA}}, unknown); } diff --git a/src/plugins/intel_cpu/src/nodes/gather_elements.cpp b/src/plugins/intel_cpu/src/nodes/gather_elements.cpp index b881ca9913d083..8cd786dd64ca64 100644 --- a/src/plugins/intel_cpu/src/nodes/gather_elements.cpp +++ b/src/plugins/intel_cpu/src/nodes/gather_elements.cpp @@ -76,23 +76,23 @@ void GatherElements::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inDataPrecision = getOriginalInputPrecisionAtPort(dataIndex_); + ov::element::Type inDataPrecision = getOriginalInputPrecisionAtPort(dataIndex_); if (!one_of(inDataPrecision.size(), - sizeof(PrecisionTrait::value_type), - sizeof(PrecisionTrait::value_type), - sizeof(PrecisionTrait::value_type))) { + sizeof(element_type_traits::value_type), + sizeof(element_type_traits::value_type), + sizeof(element_type_traits::value_type))) { OPENVINO_THROW(errorPrefix_, " has unsupported 'inputData' input precision: ", inDataPrecision); } - Precision indicesPrecision = getOriginalInputPrecisionAtPort(indicesIndex_); - if (!one_of(indicesPrecision, Precision::I32, Precision::I64)) { + ov::element::Type indicesPrecision = getOriginalInputPrecisionAtPort(indicesIndex_); + if (!one_of(indicesPrecision, ov::element::i32, ov::element::i64)) { OPENVINO_THROW(errorPrefix_, " has unsupported 'indices' input precision: ", indicesPrecision); } dataTypeSize_ = inDataPrecision.size(); addSupportedPrimDesc({{LayoutType::ncsp, inDataPrecision}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::ncsp, inDataPrecision}}, impl_desc_type::ref_any); } @@ -136,12 +136,12 @@ void GatherElements::directExecution() { void GatherElements::execute(dnnl::stream strm) { switch (dataTypeSize_) { - case sizeof(PrecisionTrait::value_type): - return directExecution::value_type>(); - case sizeof(PrecisionTrait::value_type): - return directExecution::value_type>(); - case sizeof(PrecisionTrait::value_type): - return directExecution::value_type>(); + case sizeof(element_type_traits::value_type): + return directExecution::value_type>(); + case sizeof(element_type_traits::value_type): + return directExecution::value_type>(); + case sizeof(element_type_traits::value_type): + return directExecution::value_type>(); default: OPENVINO_THROW("Unsupported data type size"); } diff --git a/src/plugins/intel_cpu/src/nodes/gather_nd.cpp b/src/plugins/intel_cpu/src/nodes/gather_nd.cpp index 59453b3a621769..118f7c164555a0 100644 --- a/src/plugins/intel_cpu/src/nodes/gather_nd.cpp +++ b/src/plugins/intel_cpu/src/nodes/gather_nd.cpp @@ -62,23 +62,23 @@ void GatherND::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inDataPrecision = getOriginalInputPrecisionAtPort(GATHERND_DATA); + ov::element::Type inDataPrecision = getOriginalInputPrecisionAtPort(GATHERND_DATA); if (!one_of(inDataPrecision.size(), - sizeof(PrecisionTrait::value_type), - sizeof(PrecisionTrait::value_type), - sizeof(PrecisionTrait::value_type))) { + sizeof(element_type_traits::value_type), + sizeof(element_type_traits::value_type), + sizeof(element_type_traits::value_type))) { THROW_ERROR("has unsupported 'data' input precision: ", inDataPrecision); } attrs.dataSize = inDataPrecision.size(); - Precision indicesPrecision = getOriginalInputPrecisionAtPort(GATHERND_INDEXES); + ov::element::Type indicesPrecision = getOriginalInputPrecisionAtPort(GATHERND_INDEXES); if (!one_of(indicesPrecision, - Precision::I32, Precision::I64, Precision::I16, Precision::U16, Precision::I8, Precision::U8)) { + ov::element::i32, ov::element::i64, ov::element::i16, ov::element::u16, ov::element::i8, ov::element::u8)) { THROW_ERROR("has unsupported 'indices' input precision: ", indicesPrecision); } addSupportedPrimDesc({{LayoutType::ncsp, inDataPrecision}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::ncsp, inDataPrecision}}, impl_desc_type::ref_any); } @@ -144,9 +144,9 @@ void GatherND::GatherNDExecutor::exec(const MemoryPtr& srcMemPtr, const MemoryPt GatherNDContext ctx { this, srcMemPtr, idxMemPtr, dstMemPtr }; OV_SWITCH(intel_cpu, GatherNDEmitter, ctx, dataSize, - OV_CASE(sizeof(PrecisionTrait::value_type), PrecisionTrait::value_type), - OV_CASE(sizeof(PrecisionTrait::value_type), PrecisionTrait::value_type), - OV_CASE(sizeof(PrecisionTrait::value_type), PrecisionTrait::value_type)); + OV_CASE(sizeof(element_type_traits::value_type), element_type_traits::value_type), + OV_CASE(sizeof(element_type_traits::value_type), element_type_traits::value_type), + OV_CASE(sizeof(element_type_traits::value_type), element_type_traits::value_type)); } void GatherND::GatherNDExecutor::gatherBlocks(const MemoryPtr& srcMemPtr, const MemoryPtr& idxMemPtr, const MemoryPtr& dstMemPtr) { diff --git a/src/plugins/intel_cpu/src/nodes/gather_tree.cpp b/src/plugins/intel_cpu/src/nodes/gather_tree.cpp index b13551f767aaad..8cc61736e0a594 100644 --- a/src/plugins/intel_cpu/src/nodes/gather_tree.cpp +++ b/src/plugins/intel_cpu/src/nodes/gather_tree.cpp @@ -58,8 +58,8 @@ void GatherTree::initSupportedPrimitiveDescriptors() { return; precision = getOriginalInputPrecisionAtPort(GATHER_TREE_STEP_IDX); - if (!one_of(precision, Precision::FP32, Precision::I32)) - precision = Precision::FP32; + if (!one_of(precision, ov::element::f32, ov::element::i32)) + precision = ov::element::f32; if (getOriginalInputPrecisionAtPort(GATHER_TREE_PARENT_IDX) != precision || getOriginalInputPrecisionAtPort(GATHER_TREE_MAX_SEQ_LEN) != precision || @@ -80,7 +80,7 @@ void GatherTree::execute(dnnl::stream strm) { if (!execPtr) OPENVINO_THROW(errorPrefix, " has not compiled executor."); - if (precision == Precision::FP32) + if (precision == ov::element::f32) execPtr->exec(getParentEdgeAt(GATHER_TREE_STEP_IDX)->getMemoryPtr(), getParentEdgeAt(GATHER_TREE_PARENT_IDX)->getMemoryPtr(), getParentEdgeAt(GATHER_TREE_MAX_SEQ_LEN)->getMemoryPtr(), diff --git a/src/plugins/intel_cpu/src/nodes/gather_tree.h b/src/plugins/intel_cpu/src/nodes/gather_tree.h index 8ad82a22b777e5..24edf2602307c3 100644 --- a/src/plugins/intel_cpu/src/nodes/gather_tree.h +++ b/src/plugins/intel_cpu/src/nodes/gather_tree.h @@ -56,7 +56,7 @@ class GatherTree : public Node { static const size_t GATHER_TREE_MAX_SEQ_LEN = 2; static const size_t GATHER_TREE_END_TOKEN = 3; - InferenceEngine::Precision precision; + ov::element::Type precision; std::string errorPrefix; }; diff --git a/src/plugins/intel_cpu/src/nodes/generate_proposals.cpp b/src/plugins/intel_cpu/src/nodes/generate_proposals.cpp index cd9226708c5efe..d31ccef0db955e 100644 --- a/src/plugins/intel_cpu/src/nodes/generate_proposals.cpp +++ b/src/plugins/intel_cpu/src/nodes/generate_proposals.cpp @@ -247,7 +247,7 @@ void nms_cpu(const int num_boxes, int is_dead[], void fill_output_blobs(const float* proposals, const int* roi_indices, float* rois, float* scores, uint8_t* roi_num, const int num_proposals, const size_t num_rois, const int post_nms_topn, - Precision roi_num_type) { + ov::element::Type roi_num_type) { const float *src_x0 = proposals + 0 * num_proposals; const float *src_y0 = proposals + 1 * num_proposals; const float *src_x1 = proposals + 2 * num_proposals; @@ -263,10 +263,10 @@ void fill_output_blobs(const float* proposals, const int* roi_indices, scores[i] = src_score[index]; }); - if (roi_num_type == Precision::I32) { + if (roi_num_type == ov::element::i32) { int32_t num = static_cast(num_rois); memcpy(roi_num, &num, sizeof(int32_t)); - } else if (roi_num_type == Precision::I64) { + } else if (roi_num_type == ov::element::i64) { int64_t num = static_cast(num_rois); memcpy(roi_num, &num, sizeof(int64_t)); } else { @@ -313,12 +313,12 @@ void GenerateProposals::initSupportedPrimitiveDescriptors() { return; auto roiNumPrecision = getOriginalOutputPrecisionAtPort(OUTPUT_ROI_NUM); - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, {LayoutType::ncsp, roiNumPrecision}}, impl_desc_type::ref_any); } @@ -405,7 +405,7 @@ void GenerateProposals::execute(dnnl::stream strm) { std::vector roi_num(batch_size); uint8_t* p_roi_num = reinterpret_cast(&roi_num[0]); auto roi_num_type = getOriginalOutputPrecisionAtPort(OUTPUT_ROI_NUM); - const auto roi_num_item_size = roi_num_type == Precision::I32 ? sizeof(int32_t) : sizeof(int64_t); + const auto roi_num_item_size = roi_num_type == ov::element::i32 ? sizeof(int32_t) : sizeof(int64_t); for (size_t n = 0; n < batch_size; ++n) { // input image height & width const float img_H = p_img_info_cpu[0]; diff --git a/src/plugins/intel_cpu/src/nodes/grid_sample.cpp b/src/plugins/intel_cpu/src/nodes/grid_sample.cpp index 8dc5742ce89724..9ee378f56f4841 100644 --- a/src/plugins/intel_cpu/src/nodes/grid_sample.cpp +++ b/src/plugins/intel_cpu/src/nodes/grid_sample.cpp @@ -94,8 +94,8 @@ void GridSample::initSupportedPrimitiveDescriptors() { return; dataPrecision = getOriginalInputPrecisionAtPort(IN_DATA); - if (dataPrecision != Precision::I32) { - dataPrecision = Precision::FP32; + if (dataPrecision != ov::element::i32) { + dataPrecision = ov::element::f32; } dataTypeSize = dataPrecision.size(); gridTypeSize = gridPrecision.size(); diff --git a/src/plugins/intel_cpu/src/nodes/grid_sample.hpp b/src/plugins/intel_cpu/src/nodes/grid_sample.hpp index 0bbd337273a81f..197dd5a2eb0a6e 100644 --- a/src/plugins/intel_cpu/src/nodes/grid_sample.hpp +++ b/src/plugins/intel_cpu/src/nodes/grid_sample.hpp @@ -59,8 +59,8 @@ class GridSample : public Node { uint64_t dataTypeSize = 1lu; uint64_t gridTypeSize = 1lu; - InferenceEngine::Precision dataPrecision; - InferenceEngine::Precision gridPrecision = InferenceEngine::Precision::FP32; + ov::element::Type dataPrecision; + ov::element::Type gridPrecision = ov::element::f32; int nthr = 1; std::vector execParamsPerThread; diff --git a/src/plugins/intel_cpu/src/nodes/grn.cpp b/src/plugins/intel_cpu/src/nodes/grn.cpp index 6de6ab180cced9..072e88737e8ed1 100644 --- a/src/plugins/intel_cpu/src/nodes/grn.cpp +++ b/src/plugins/intel_cpu/src/nodes/grn.cpp @@ -54,8 +54,8 @@ void GRN::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32, false, 0}}, - {{LayoutType::ncsp, Precision::FP32, false, 0}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32, false, 0}}, + {{LayoutType::ncsp, ov::element::f32, false, 0}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/input.cpp b/src/plugins/intel_cpu/src/nodes/input.cpp index 76342894ecf25e..cece2b698d1e01 100644 --- a/src/plugins/intel_cpu/src/nodes/input.cpp +++ b/src/plugins/intel_cpu/src/nodes/input.cpp @@ -255,7 +255,7 @@ Input::Input(const std::shared_ptr& op, const GraphContext::CPtr conte void Input::cloneBlobIfRequired() { Shape shape(constOp->get_shape().empty() ? ov::Shape(1, 1) : constOp->get_shape()); - const auto prec = convertPrecision(constOp->get_element_type()); + const auto prec = constOp->get_element_type(); const size_t size = shape.getElementsCount(); CpuBlockedMemoryDesc memDesc(prec, shape); @@ -302,7 +302,7 @@ void Input::cloneBlobIfRequired() { // The presence of subnormals is better to determined at IR read time. auto hasSubnormals = [&, this] () { - if (prec == InferenceEngine::Precision::FP32) { + if (prec == ov::element::f32) { uint32_t const *u32data = constOp->get_data_ptr(); if (!size) @@ -389,7 +389,7 @@ void Input::cloneBlobIfRequired() { } Input::Input(const Shape& shape, - const InferenceEngine::Precision& prc, + const ov::element::Type& prc, const std::string& name, const std::string& type, const GraphContext::CPtr context) diff --git a/src/plugins/intel_cpu/src/nodes/input.h b/src/plugins/intel_cpu/src/nodes/input.h index 413ab5db1f07cd..3231671e905f81 100644 --- a/src/plugins/intel_cpu/src/nodes/input.h +++ b/src/plugins/intel_cpu/src/nodes/input.h @@ -17,7 +17,7 @@ class Input : public Node { public: Input(const std::shared_ptr& op, const GraphContext::CPtr context); Input(const Shape& shape, - const InferenceEngine::Precision& prc, + const ov::element::Type& prc, const std::string& name, const std::string& type, const GraphContext::CPtr context); diff --git a/src/plugins/intel_cpu/src/nodes/interaction.cpp b/src/plugins/intel_cpu/src/nodes/interaction.cpp index 077722ef051fd8..6f8cdc544f1692 100644 --- a/src/plugins/intel_cpu/src/nodes/interaction.cpp +++ b/src/plugins/intel_cpu/src/nodes/interaction.cpp @@ -38,9 +38,9 @@ struct jit_move_scale_kernel : public jit_uni_move_scale_kernel, public jit_gene DECLARE_CPU_JIT_AUX_FUNCTIONS(jit_move_scale_kernel) explicit jit_move_scale_kernel(const jit_move_scale_compile_params& jcp) : jit_uni_move_scale_kernel(jcp), jit_generator(jit_name()) { - runtime_prc = jcp_.src_prc == Precision::BF16 ? Precision::BF16 : Precision::FP32; - if (jcp_.dst_prc == Precision::I8 || jcp_.dst_prc == Precision::U8) - runtime_prc = Precision::FP32; + runtime_prc = jcp_.src_prc == ov::element::bf16 ? ov::element::bf16 : ov::element::f32; + if (jcp_.dst_prc == ov::element::i8 || jcp_.dst_prc == ov::element::u8) + runtime_prc = ov::element::f32; vec_size = dnnl::impl::cpu::x64::cpu_isa_traits::vlen / runtime_prc.size(); } virtual ~jit_move_scale_kernel() {} @@ -107,7 +107,7 @@ struct jit_move_scale_kernel : public jit_uni_move_scale_kernel, public jit_gene if (jcp_.with_scales) { if (!jcp_.broadcast_scales) { - load(vmm_scales, reg_scales, Precision::FP32, Precision::FP32, step, false); + load(vmm_scales, reg_scales, ov::element::f32, ov::element::f32, step, false); add(reg_scales, sizeof(float) * step); } uni_vmulps(vmm_in, vmm_in, vmm_scales); @@ -122,7 +122,7 @@ struct jit_move_scale_kernel : public jit_uni_move_scale_kernel, public jit_gene } #undef GET_OFF - inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, Precision src_prc, Precision dst_prc, const int& elt_num, bool fill) { + inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int& elt_num, bool fill) { const auto seed = load_emitter_params(src_prc, dst_prc, elt_num, fill, "float_min").hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num, src_prc, fill, "float_min")); @@ -131,7 +131,7 @@ struct jit_move_scale_kernel : public jit_uni_move_scale_kernel, public jit_gene emitters[seed]->emit_code({static_cast(reg_src.getIdx()), 0}, {static_cast(vmm_dst.getIdx())}, pool_aux_vmm_idxs, pool_aux_gpr_idxs); } - inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, Precision src_prc, Precision dst_prc, const int& elt_num) { + inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int& elt_num) { const auto seed = store_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_store_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -142,7 +142,7 @@ struct jit_move_scale_kernel : public jit_uni_move_scale_kernel, public jit_gene } size_t vec_size; - Precision runtime_prc; + ov::element::Type runtime_prc; Xmm xmm_tmp = Xmm(2); Vmm vmm_scales = Vmm(0); @@ -175,7 +175,7 @@ Interaction::Interaction(const std::shared_ptr& op, const GraphContext const std::vector& scales = interaction->get_output_scales(); if (!scales.empty()) { fqScales = scales; - outputDataType = InferenceEngine::details::convertPrecision(interaction->get_output_element_type(0)); + outputDataType = interaction->get_output_element_type(0); } } @@ -183,10 +183,10 @@ void Interaction::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; dataPrecision = getOriginalInputPrecisionAtPort(0); - if (dataPrecision != InferenceEngine::Precision::FP32 && dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core_bf16)) { - dataPrecision = InferenceEngine::Precision::BF16; + if (dataPrecision != ov::element::f32 && dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core_bf16)) { + dataPrecision = ov::element::bf16; } else { - dataPrecision = InferenceEngine::Precision::FP32; + dataPrecision = ov::element::f32; } if (fqScales.empty()) { @@ -296,7 +296,7 @@ void Interaction::prepareParams() { std::vector rhsStride({1, static_cast(featureSize)}); std::vector resShape({static_cast(inputSizes), static_cast(inputSizes)}); std::vector resStride({static_cast(inputSizes), 1}); - auto dataType = DnnlExtensionUtils::IEPrecisionToDataType(dataPrecision); + auto dataType = DnnlExtensionUtils::ElementTypeToDataType(dataPrecision); auto src_md = memory::desc(lhsShape, dataType, lhsStride); auto weights_md = memory::desc(rhsShape, dataType, rhsStride); auto dst_md = memory::desc(resShape, dataType, resStride); @@ -304,7 +304,7 @@ void Interaction::prepareParams() { auto matmul_pd = matmul::primitive_desc(getEngine(), src_md, weights_md, dst_md, matmul_attr); prim = matmul(matmul_pd); featureSizes.assign(inputSizes, featureSize); - auto initMemoryPtr = [&](const InferenceEngine::Precision &prc, const intel_cpu::Shape& shape, + auto initMemoryPtr = [&](const ov::element::Type& prc, const intel_cpu::Shape& shape, MemoryPtr& ptr) { ptr = std::make_shared(getEngine(), intel_cpu::DnnlBlockedMemoryDesc(prc, shape)); }; diff --git a/src/plugins/intel_cpu/src/nodes/interaction.h b/src/plugins/intel_cpu/src/nodes/interaction.h index 2531b67c50f859..3edab2464af7e3 100644 --- a/src/plugins/intel_cpu/src/nodes/interaction.h +++ b/src/plugins/intel_cpu/src/nodes/interaction.h @@ -15,8 +15,8 @@ namespace intel_cpu { namespace node { struct jit_move_scale_compile_params { - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; bool with_scales; size_t input_size; bool broadcast_scales; @@ -71,8 +71,8 @@ class Interaction : public Node { MemoryPtr flatMemPtr; MemoryPtr outputMemPtr; std::vector featureSizes; - InferenceEngine::Precision dataPrecision; - InferenceEngine::Precision outputDataType; + ov::element::Type dataPrecision; + ov::element::Type outputDataType; std::vector fqScales; std::unique_ptr moveFeatureKernel; std::unique_ptr moveInteractKernel; diff --git a/src/plugins/intel_cpu/src/nodes/interpolate.cpp b/src/plugins/intel_cpu/src/nodes/interpolate.cpp index 2daabc6d04ebdb..5371c1c187186d 100644 --- a/src/plugins/intel_cpu/src/nodes/interpolate.cpp +++ b/src/plugins/intel_cpu/src/nodes/interpolate.cpp @@ -47,8 +47,8 @@ namespace ov { namespace intel_cpu { namespace node { -static inline bool isFloatCompatible(Precision prc) { - return one_of(prc, Precision::FP32, Precision::BF16, Precision::FP16, Precision::FP64); +static inline bool isFloatCompatible(ov::element::Type prc) { + return one_of(prc, ov::element::f32, ov::element::bf16, ov::element::f16, ov::element::f64); } #if defined(OPENVINO_ARCH_X86_64) @@ -287,14 +287,14 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi } inline void load(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, jcp_.src_prc, Precision::FP32, elt_num, offset); + emit_load(reg_src, vmm_src, jcp_.src_prc, ov::element::f32, elt_num, offset); } inline void load_weights(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, Precision::FP32, Precision::FP32, elt_num, offset); + emit_load(reg_src, vmm_src, ov::element::f32, ov::element::f32, elt_num, offset); } - inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, Precision src_prc, Precision dst_prc, const int elt_num, const int offset = 0) { + inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int elt_num, const int offset = 0) { const auto seed = load_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -305,9 +305,9 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi } inline void store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, const int elt_num, const int offset = 0) { - const auto seed = store_emitter_params(Precision::FP32, jcp_.dst_prc, elt_num).hash(); + const auto seed = store_emitter_params(ov::element::f32, jcp_.dst_prc, elt_num).hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, elt_num)); + emitters[seed].reset(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, elt_num)); } // for cases when Store emitter need 2 aux vmm we can use vmm_dst as second aux vmm @@ -401,7 +401,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi if (!isFloatCompatible(jcp_.src_prc)) { uni_vroundps(vmm_dst, vmm_dst, 0x0); // Round near } - // src_prc, dst_prc and buf precision is the same, otherwise need another store with buf(src) precision + // src_prc, dst_prc and buf ov::element::Type is the same, otherwise need another store with buf(src) precision store(vmm_dst, reg_dst_aux, vector_step); add(reg_dst_aux, vector_step * jcp_.src_data_size); // advance 8/16 faciliate next block @@ -1321,15 +1321,15 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi // get idx for input uni_vmovss(Xmm(vmm_tbl_y.getIdx()), ptr[reg_tbl_y]); - gather_i32_indices(vmm_index_in_y, reg_index_y, 0, vmm_tbl_y, 1, Precision::I32, true); + gather_i32_indices(vmm_index_in_y, reg_index_y, 0, vmm_tbl_y, 1, ov::element::i32, true); uni_vmovss(Xmm(vmm_val.getIdx()), ptr[reg_tbl_x]); - gather_i32_indices(vmm_index_in_x, reg_index, 0, vmm_val, 1, Precision::I32, true); + gather_i32_indices(vmm_index_in_x, reg_index, 0, vmm_val, 1, ov::element::i32, true); // gather weightX by input idx, used in y0-y3 - gather_i32_indices(vmm_weightX0, reg_weight_x, 0, vmm_val, grid_len, Precision::FP32, true); - gather_i32_indices(vmm_weightX1, reg_weight_x, sizeof(float), vmm_val, grid_len, Precision::FP32, true); - gather_i32_indices(vmm_weightX2, reg_weight_x, 2 * sizeof(float), vmm_val, grid_len, Precision::FP32, true); - gather_i32_indices(vmm_weightX3, reg_weight_x, 3 * sizeof(float), vmm_val, grid_len, Precision::FP32, true); + gather_i32_indices(vmm_weightX0, reg_weight_x, 0, vmm_val, grid_len, ov::element::f32, true); + gather_i32_indices(vmm_weightX1, reg_weight_x, sizeof(float), vmm_val, grid_len, ov::element::f32, true); + gather_i32_indices(vmm_weightX2, reg_weight_x, 2 * sizeof(float), vmm_val, grid_len, ov::element::f32, true); + gather_i32_indices(vmm_weightX3, reg_weight_x, 3 * sizeof(float), vmm_val, grid_len, ov::element::f32, true); // vmm_val is now relieved and used for dst_value uni_vpxor(vmm_val, vmm_val, vmm_val); @@ -1339,7 +1339,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi vpminsd(vmm_index_y_itr, vmm_index_y_itr, cubic_planar_table_val(1)); vpmaxsd(vmm_index_y_itr, vmm_index_y_itr, vmm_zero); - gather_i32_indices(vmm_weightY, reg_weight_y, 0, vmm_tbl_y, grid_len, Precision::FP32, true); + gather_i32_indices(vmm_weightY, reg_weight_y, 0, vmm_tbl_y, grid_len, ov::element::f32, true); cubic_planar_line(true); // y1 @@ -1347,7 +1347,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi vpminsd(vmm_index_y_itr, vmm_index_in_y, cubic_planar_table_val(1)); vpmaxsd(vmm_index_y_itr, vmm_index_y_itr, vmm_zero); // weight y1: shift weight_size - gather_i32_indices(vmm_weightY, reg_weight_y, sizeof(float), vmm_tbl_y, grid_len, Precision::FP32, true); + gather_i32_indices(vmm_weightY, reg_weight_y, sizeof(float), vmm_tbl_y, grid_len, ov::element::f32, true); cubic_planar_line(true); // y2 @@ -1356,7 +1356,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi vpminsd(vmm_index_y_itr, vmm_index_y_itr, cubic_planar_table_val(1)); vpmaxsd(vmm_index_y_itr, vmm_index_y_itr, vmm_zero); // weight y2 - gather_i32_indices(vmm_weightY, reg_weight_y, 2 * sizeof(float), vmm_tbl_y, grid_len, Precision::FP32, true); + gather_i32_indices(vmm_weightY, reg_weight_y, 2 * sizeof(float), vmm_tbl_y, grid_len, ov::element::f32, true); cubic_planar_line(true); // y3 @@ -1366,7 +1366,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi vpminsd(vmm_index_y_itr, vmm_index_y_itr, cubic_planar_table_val(1)); vpmaxsd(vmm_index_y_itr, vmm_index_y_itr, vmm_zero); // weight y3 - gather_i32_indices(vmm_weightY, reg_weight_y, 3 * sizeof(float), vmm_tbl_y, grid_len, Precision::FP32, true); + gather_i32_indices(vmm_weightY, reg_weight_y, 3 * sizeof(float), vmm_tbl_y, grid_len, ov::element::f32, true); cubic_planar_line(true); if (attr_.post_ops_.len() != 0) { @@ -1417,7 +1417,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi vpaddd(vmm_mask, vmm_mask, vmm_one); // (IW - 1) + 1 = IW uni_vpmulld(vmm_mask, vmm_mask, vmm_index_y_itr); uni_vpaddd(vmm_index_x_itr, vmm_index_x_itr, vmm_mask); - gather_i32_indices(vmm_src, reg_src, 0, vmm_index_x_itr, jcp_.src_data_size, Precision::FP32, is_scalar); + gather_i32_indices(vmm_src, reg_src, 0, vmm_index_x_itr, jcp_.src_data_size, ov::element::f32, is_scalar); if (itr == 0) { uni_vfmadd231ps(vmm_dstX, vmm_src, vmm_weightX0); @@ -1456,21 +1456,21 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi // always gather to Vmm, compute with Vmm, store with Xmm if scalar_step inline void gather_i32_indices(Vmm vmm_src, const Xbyak::Reg64 &base, int offset, Vmm vmm_indices, int scale, - Precision src_prc, bool is_scalar) { + ov::element::Type src_prc, bool is_scalar) { Xbyak::Address table_idx = ptr[base + offset + vmm_indices * scale]; if ((isa == cpu::x64::avx512_core) && !is_scalar) { // [0-15] bit of int to mask kmovw(k_mask, cubic_planar_table_val(3)); - if (src_prc == Precision::FP32) { + if (src_prc == ov::element::f32) { vgatherdps(vmm_src | k_mask, table_idx); // dword index, packed single data - } else if (src_prc == Precision::I32) { + } else if (src_prc == ov::element::i32) { vpgatherdd(vmm_src | k_mask, table_idx); // dword index, dword data } } else if ((isa == cpu::x64::avx2) && !is_scalar) { uni_vpcmpeqd(vmm_mask, vmm_mask, vmm_mask); - if (src_prc == Precision::FP32) { + if (src_prc == ov::element::f32) { vgatherdps(vmm_src, table_idx, vmm_mask); - } else if (src_prc == Precision::I32) { + } else if (src_prc == ov::element::i32) { vpgatherdd(vmm_src, table_idx, vmm_mask); } } else { @@ -1500,7 +1500,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi } // is_broadcast for broadcasting param for depth_wise and quantize(channel-sensitive post-ops), for fusion with plain layout. - void apply_post_ops(Precision dst_prc, bool is_broadcast) { + void apply_post_ops(ov::element::Type dst_prc, bool is_broadcast) { const auto &p = attr_.post_ops_; int eltwise_inj_idx = 0; int depthwise_inj_idx = 0; @@ -1523,7 +1523,7 @@ struct jit_uni_interpolate_kernel_f32 : public jit_uni_interpolate_kernel, publi depthwise_inj_idx++; } else if (post_op.is_quantization()) { bool do_dequantization = post_op.quantization.alg == alg_kind::quantization_quantize_dequantize; - bool do_rounding = do_dequantization || dst_prc == Precision::FP32 || i != p.len() - 1; + bool do_rounding = do_dequantization || dst_prc == ov::element::f32 || i != p.len() - 1; int s_idx = vmm_val.getIdx(); @@ -1576,8 +1576,8 @@ size_t InterpolateKey::hash() const { seed = get_vector_hash(seed, nodeAttrs.padBegin); seed = get_vector_hash(seed, nodeAttrs.padEnd); - seed = hash_combine(seed, nodeAttrs.inPrc.getPrecVal()); - seed = hash_combine(seed, nodeAttrs.outPrc.getPrecVal()); + seed = hash_combine(seed, nodeAttrs.inPrc.hash()); + seed = hash_combine(seed, nodeAttrs.outPrc.hash()); seed = get_vector_hash(seed, srcDims); seed = get_vector_hash(seed, dstDims); @@ -2026,26 +2026,26 @@ void Interpolate::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inputPrecision = getOriginalInputPrecisionAtPort(DATA_ID); - if ((inputPrecision != Precision::I8) && (inputPrecision != Precision::U8) && (inputPrecision != Precision::BF16)) { - inputPrecision = Precision::FP32; + ov::element::Type inputPrecision = getOriginalInputPrecisionAtPort(DATA_ID); + if ((inputPrecision != ov::element::i8) && (inputPrecision != ov::element::u8) && (inputPrecision != ov::element::bf16)) { + inputPrecision = ov::element::f32; } - if ((inputPrecision == Precision::BF16) && !mayiuse(avx512_core)) { - inputPrecision = Precision::FP32; + if ((inputPrecision == ov::element::bf16) && !mayiuse(avx512_core)) { + inputPrecision = ov::element::f32; } - Precision outputPrecision = inputPrecision; + ov::element::Type outputPrecision = inputPrecision; if (!fusedWith.empty()) { outputPrecision = fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(DATA_ID); } if (!mayiuse(cpu::x64::sse41)) { - inputPrecision = outputPrecision = Precision::FP32; + inputPrecision = outputPrecision = ov::element::f32; } - auto targetShapeType = Precision::I32; - auto scalesType = Precision::FP32; - auto axesType = Precision::I32; + auto targetShapeType = ov::element::i32; + auto scalesType = ov::element::f32; + auto axesType = ov::element::i32; NodeConfig config; config.outConfs.resize(1); @@ -2170,7 +2170,7 @@ void Interpolate::initSupportedPrimitiveDescriptors() { } // planar for 1.ref on machine without sse41(if no sse41, canFuse() is false). 2.JIT kernel for f32 && avx2(gather).(with fuse) - if (mayiuse(cpu::x64::avx2) && inputPrecision == Precision::FP32) { + if (mayiuse(cpu::x64::avx2) && inputPrecision == ov::element::f32) { pushDesc(LayoutType::ncsp, jit_avx2, false); } } @@ -2328,7 +2328,7 @@ void Interpolate::prepareParams() { if ((key.nodeAttrs.mode == InterpolateMode::nearest || key.nodeAttrs.mode == InterpolateMode::linear_onnx || key.nodeAttrs.mode == InterpolateMode::cubic) && ((key.nodeAttrs.layout != InterpolateLayoutType::planar && mayiuse(cpu::x64::sse41)) || - (mayiuse(cpu::x64::avx2) && key.nodeAttrs.inPrc == Precision::FP32))) { + (mayiuse(cpu::x64::avx2) && key.nodeAttrs.inPrc == ov::element::f32))) { executor = std::make_shared(key.nodeAttrs, key.srcDims, key.dstDims, @@ -3486,24 +3486,24 @@ void Interpolate::InterpolateRefExecutor::cubicRef(const uint8_t *in_ptr_, uint8 }); } -float Interpolate::InterpolateRefExecutor::getValue(const uint8_t *base, size_t offset, InferenceEngine::Precision prec) { +float Interpolate::InterpolateRefExecutor::getValue(const uint8_t *base, size_t offset, ov::element::Type prec) { const uint8_t *baseOffset = base + offset; switch (prec) { - case Precision::U8: { + case ov::element::u8: { return static_cast(*baseOffset); break; } - case Precision::I8: { + case ov::element::i8: { const int8_t *valuePtr = reinterpret_cast(baseOffset); return static_cast(*valuePtr); break; } - case Precision::BF16: { + case ov::element::bf16: { const uint16_t *valuePtr = reinterpret_cast(baseOffset); return bfloat16_t::from_bits(*valuePtr); break; } - case Precision::FP32: { + case ov::element::f32: { const float *valuePtr = reinterpret_cast(baseOffset); return *valuePtr; break; @@ -3515,25 +3515,25 @@ float Interpolate::InterpolateRefExecutor::getValue(const uint8_t *base, size_t } } -void Interpolate::InterpolateRefExecutor::setValue(uint8_t *base, size_t offset, float value, InferenceEngine::Precision prec) { +void Interpolate::InterpolateRefExecutor::setValue(uint8_t *base, size_t offset, float value, ov::element::Type prec) { uint8_t *baseOffset = base + offset; switch (prec) { - case Precision::U8: { + case ov::element::u8: { uint8_t data = static_cast(value < 0 ? 0 : value); cpu_memcpy(baseOffset, &data, 1); break; } - case Precision::I8: { + case ov::element::i8: { int8_t data = static_cast(value); cpu_memcpy(baseOffset, &data, 1); break; } - case Precision::BF16: { + case ov::element::bf16: { uint16_t data = bfloat16_t(value).to_bits(); cpu_memcpy(baseOffset, &data, 2); break; } - case Precision::FP32: { + case ov::element::f32: { cpu_memcpy(baseOffset, &value, sizeof(float)); break; } @@ -3855,7 +3855,7 @@ Interpolate::InterpolateJitExecutor::InterpolateJitExecutor(const InterpolateAtt } else if (mayiuse(cpu::x64::sse41)) { interpolateKernel.reset(new jit_uni_interpolate_kernel_f32(jcp, *attr.get())); } - } else if (mayiuse(cpu::x64::avx2) && interpAttrs.inPrc == InferenceEngine::Precision::FP32) { + } else if (mayiuse(cpu::x64::avx2) && interpAttrs.inPrc == ov::element::f32) { // gather ISA(for planar JIT kernel) for avx2 and fp32 interpolateKernel.reset(new jit_uni_interpolate_kernel_f32(jcp, *attr.get())); } else { diff --git a/src/plugins/intel_cpu/src/nodes/interpolate.h b/src/plugins/intel_cpu/src/nodes/interpolate.h index 35dcb27d463a0d..492ae9d6be9e95 100644 --- a/src/plugins/intel_cpu/src/nodes/interpolate.h +++ b/src/plugins/intel_cpu/src/nodes/interpolate.h @@ -23,8 +23,8 @@ namespace node { struct jit_interpolate_config_params { InterpolateLayoutType layout; InterpolateMode mode; - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; int src_data_size; int dst_data_size; int indices_size; @@ -147,7 +147,7 @@ class Interpolate : public Node { InterpolateCoordTransMode coordTransMode; InterpolateLayoutType configured_for_layout; VectorDims srcDimPad5d, dstDim5d; - InferenceEngine::Precision inputPrec, outputPrec; + ov::element::Type inputPrec, outputPrec; size_t srcDataSize, dstDataSize; int spatialDimSize; size_t dataRank; @@ -213,8 +213,8 @@ class Interpolate : public Node { float fx, float fy, float fz, int OD, int OH, int OW, int kernel_width, bool antialias); void pillowRef(const uint8_t *in_ptr_, uint8_t *out_ptr_, int B, int C, int IH, int IW, int OH, int OW); - static float getValue(const uint8_t *base, size_t offset, InferenceEngine::Precision prec); - static void setValue(uint8_t *base, size_t offset, float value, InferenceEngine::Precision prec); + static float getValue(const uint8_t *base, size_t offset, ov::element::Type prec); + static void setValue(uint8_t *base, size_t offset, float value, ov::element::Type prec); private: bool antialias; diff --git a/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.cpp b/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.cpp index d70736dbe17234..28d697b3a96f20 100644 --- a/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.cpp +++ b/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.cpp @@ -1350,7 +1350,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoor kmovw(kAuxMask, kMask00); } gatherdd(vQ0, rSrcTmp, shift00, kAuxMask, useMask, zeroFill); // v00 -> vQ0 - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vQ0, vQ0); } uni_vfmsub213ps(vQ0, vDX, vQ0); // q0 = -(v00 - dx * v00) @@ -1360,7 +1360,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoor kmovw(kAuxMask, kMask01); } gatherdd(vAux, rSrcTmp, shift01, kAuxMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } uni_vfmsub231ps(vQ0, vAux, vDX); // q0 = -q0 + dx * v01 @@ -1370,7 +1370,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoor kmovw(kAuxMask, kMask11); } gatherdd(vAux, rSrcTmp, shift11, kAuxMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } @@ -1379,7 +1379,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoor kmovw(kAuxMask, kMask10); } gatherdd(vQ1, rSrcTmp, shift10, kAuxMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vQ1, vQ1); } @@ -1389,7 +1389,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoor uni_vsubps(vQ1, vQ1, vQ0); uni_vfmadd132ps(vQ1, vQ0, vDY); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vroundps(vQ1, vQ1, 0x3); // Truncation uni_vcvtps2dq(vQ1, vQ1); } @@ -1518,7 +1518,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoord, const Vmm& uni_vmovups(vGatherMask, vMask00); } gatherdd(vQ0, rSrcTmp, shift00, (isa == x64::avx2 || !vMask00.isInitialized()) ? vGatherMask : vMask00, useMask, zeroFill); // v00 -> vQ0 - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vQ0, vQ0); } if (isa == x64::avx2) { @@ -1536,7 +1536,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoord, const Vmm& } gatherdd(vAux, rSrcTmp, jcp.paddingMode != GridSamplePaddingMode::ZEROS ? shift01 : shift10, (isa == x64::avx2 || !vMask01.isInitialized()) ? vGatherMask : vMask01, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } if (isa == x64::avx2) { @@ -1558,7 +1558,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoord, const Vmm& } gatherdd(vAux, rSrcTmp, jcp.paddingMode != GridSamplePaddingMode::ZEROS ? shift11 : shift10, (isa == x64::avx2 || !vMask11.isInitialized()) ? vGatherMask : vMask11, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } @@ -1569,7 +1569,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoord, const Vmm& uni_vmovups(vGatherMask, vMask10); } gatherdd(vQ1, rSrcTmp, shift10, (isa == x64::avx2 || !vMask10.isInitialized()) ? vGatherMask : vMask10, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vQ1, vQ1); } @@ -1590,7 +1590,7 @@ void GridSampleKernel::bilinearInterpolation(const Vmm& vWCoord, const Vmm& uni_vsubps(vQ1, vQ1, vQ0); uni_vfmadd132ps(vQ1, vQ0, vDY); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vroundps(vQ1, vQ1, 0x3); // Truncation uni_vcvtps2dq(vQ1, vQ1); } @@ -1703,7 +1703,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord if (dataTypeSize > 1) uni_vpslld(vSrcShift, vSrcShift, dataTypeShift); gatherdd(vAux, rSrcTmp, vSrcShift, kAuxMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } uni_vmulps(vXDotProd, vAux, vCX[0]); @@ -1727,7 +1727,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord if (dataTypeSize > 1) uni_vpslld(vSrcShift, vSrcShift, dataTypeShift); gatherdd(vAux, rSrcTmp, vSrcShift, kAuxMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } uni_vfmadd231ps(vXDotProd, vAux, vCX[w]); @@ -1741,7 +1741,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord uni_vfmadd231ps(vYDotProd, vXDotProd, vAux); } - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vroundps(vYDotProd, vYDotProd, 0x3); // Truncation uni_vcvtps2dq(vYDotProd, vYDotProd); } @@ -1978,7 +1978,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord, const Vmm& bufShift += vlen; gatherdd(vAux, rSrcTmp, vSrcShift, kGatherMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } uni_vmulps(vXDotProd, vAux, vCX[0]); @@ -1994,7 +1994,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord, const Vmm& bufShift += vlen; gatherdd(vAux, rSrcTmp, vSrcShift, kGatherMask, useMask, zeroFill); - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vcvtdq2ps(vAux, vAux); } uni_vfmadd231ps(vXDotProd, vAux, vCX[w]); @@ -2002,7 +2002,7 @@ void GridSampleKernel::bicubicInterpolation(const Vmm& vWCoord, const Vmm& uni_vfmadd231ps(vYDotProd, vXDotProd, vCY[h]); } - if (jcp.inDataPrc == InferenceEngine::Precision::I32) { + if (jcp.inDataPrc == ov::element::i32) { uni_vroundps(vYDotProd, vYDotProd, 0x3); // Truncation uni_vcvtps2dq(vYDotProd, vYDotProd); } diff --git a/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.hpp b/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.hpp index 295c715fb8146b..463fc94eeff992 100644 --- a/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.hpp +++ b/src/plugins/intel_cpu/src/nodes/kernels/x64/grid_sample.hpp @@ -5,7 +5,6 @@ #pragma once #include "jit_kernel_base.hpp" -#include "ie_precision.hpp" #include namespace ov { @@ -27,8 +26,8 @@ struct GridSampleKernelConfParams { bool alignCorners = false; GridSampleInterpolationMode interpolationMode = GridSampleInterpolationMode::BILINEAR; GridSamplePaddingMode paddingMode = GridSamplePaddingMode::ZEROS; - InferenceEngine::Precision inDataPrc; - InferenceEngine::Precision gridPrc; + ov::element::Type inDataPrc; + ov::element::Type gridPrc; uint64_t batchNum = 1lu; uint64_t cannelNum = 1lu; uint64_t srcBatchStepB = 0lu; diff --git a/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.cpp b/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.cpp index cd19b2b8038a23..0464e16f4108a4 100644 --- a/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.cpp +++ b/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.cpp @@ -125,28 +125,28 @@ const registers & zmmregs() { namespace internal { template<> -InferenceEngine::Precision type2precision() { - return InferenceEngine::Precision::FP32; +ov::element::Type type2precision() { + return ov::element::f32; } template<> -InferenceEngine::Precision type2precision() { - return InferenceEngine::Precision::I32; +ov::element::Type type2precision() { + return ov::element::i32; } template<> -InferenceEngine::Precision type2precision() { - return InferenceEngine::Precision::BF16; +ov::element::Type type2precision() { + return ov::element::bf16; } template<> -InferenceEngine::Precision type2precision() { - return InferenceEngine::Precision::U8; +ov::element::Type type2precision() { + return ov::element::u8; } template<> -InferenceEngine::Precision type2precision() { - return InferenceEngine::Precision::I8; +ov::element::Type type2precision() { + return ov::element::i8; } cpu_isa_t get_current_isa() { diff --git a/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.hpp b/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.hpp index 8c6aa2695c1d9d..f567dd157587f7 100644 --- a/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.hpp +++ b/src/plugins/intel_cpu/src/nodes/kernels/x64/jit_kernel.hpp @@ -5,7 +5,6 @@ #pragma once #include #include "emitters/x64/jit_load_store_emitters.hpp" -#include #include #include #include @@ -564,7 +563,7 @@ class stack_frame { }; template -InferenceEngine::Precision type2precision(); +ov::element::Type type2precision(); dnnl::impl::cpu::x64::cpu_isa_t get_current_isa(); diff --git a/src/plugins/intel_cpu/src/nodes/kernels/x64/non_max_suppression.cpp b/src/plugins/intel_cpu/src/nodes/kernels/x64/non_max_suppression.cpp index f9c665ec9c5eea..a81df7bdba29f7 100644 --- a/src/plugins/intel_cpu/src/nodes/kernels/x64/non_max_suppression.cpp +++ b/src/plugins/intel_cpu/src/nodes/kernels/x64/non_max_suppression.cpp @@ -16,8 +16,8 @@ namespace kernel { template void NonMaxSuppression::generate() { - load_vector_emitter.reset(new jit_load_emitter(this, isa, Precision::FP32, Precision::FP32, vector_step)); - load_scalar_emitter.reset(new jit_load_emitter(this, isa, Precision::FP32, Precision::FP32, scalar_step)); + load_vector_emitter.reset(new jit_load_emitter(this, isa, ov::element::f32, ov::element::f32, vector_step)); + load_scalar_emitter.reset(new jit_load_emitter(this, isa, ov::element::f32, ov::element::f32, scalar_step)); exp_injector.reset(new x64::jit_uni_eltwise_injector_f32(this, dnnl::impl::alg_kind::eltwise_exp, 0.f, 0.f, 1.f)); diff --git a/src/plugins/intel_cpu/src/nodes/log_softmax.cpp b/src/plugins/intel_cpu/src/nodes/log_softmax.cpp index 1e386ad46366e3..57a8c54142d6a2 100644 --- a/src/plugins/intel_cpu/src/nodes/log_softmax.cpp +++ b/src/plugins/intel_cpu/src/nodes/log_softmax.cpp @@ -59,8 +59,8 @@ void LogSoftmax::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/lrn.cpp b/src/plugins/intel_cpu/src/nodes/lrn.cpp index 8172ff1d02dc72..9a949e4d6c43ea 100644 --- a/src/plugins/intel_cpu/src/nodes/lrn.cpp +++ b/src/plugins/intel_cpu/src/nodes/lrn.cpp @@ -138,10 +138,10 @@ void Lrn::getSupportedDescriptors() { if (getChildEdges().empty()) OPENVINO_THROW(errorPrefix, " has incorrect number of output edges"); - InferenceEngine::Precision precision = getOriginalOutputPrecisionAtPort(0); - if (precision != InferenceEngine::Precision::FP32 && precision != InferenceEngine::Precision::BF16) - precision = InferenceEngine::Precision::FP32; - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(precision); + ov::element::Type precision = getOriginalOutputPrecisionAtPort(0); + if (precision != ov::element::f32 && precision != ov::element::bf16) + precision = ov::element::f32; + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(precision); const auto &parentShape = getInputShapeAtPort(0); diff --git a/src/plugins/intel_cpu/src/nodes/mathematics.cpp b/src/plugins/intel_cpu/src/nodes/mathematics.cpp index b18c74823a35ec..1327ecd86c5cb9 100644 --- a/src/plugins/intel_cpu/src/nodes/mathematics.cpp +++ b/src/plugins/intel_cpu/src/nodes/mathematics.cpp @@ -58,10 +58,10 @@ void Math::initSupportedPrimitiveDescriptors() { std::vector inDataConf; inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); addSupportedPrimDesc(inDataConf, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/matmul.cpp b/src/plugins/intel_cpu/src/nodes/matmul.cpp index 650bb4a9f9d5a8..595b19aa3b7b51 100644 --- a/src/plugins/intel_cpu/src/nodes/matmul.cpp +++ b/src/plugins/intel_cpu/src/nodes/matmul.cpp @@ -4,7 +4,6 @@ #include "matmul.h" -#include "ie_precision.hpp" #include "memory_desc/cpu_blocked_memory_desc.h" #include "cpu_types.h" #include "eltwise.h" @@ -84,7 +83,7 @@ bool MatMul::canBeExecutedInInt8() const { auto firstInputPrecision = getOriginalInputPrecisionAtPort(0); auto secondInputPrecision = getOriginalInputPrecisionAtPort(1); - return one_of(firstInputPrecision, Precision::U8, Precision::I8) && secondInputPrecision == Precision::I8; + return one_of(firstInputPrecision, ov::element::u8, ov::element::i8) && secondInputPrecision == ov::element::i8; } bool MatMul::isSupportedOperation(const std::shared_ptr& op, std::string& errorMessage) noexcept { @@ -154,9 +153,9 @@ bool MatMul::canFuse(const NodePtr& node) const { // Then the Matmul will change its output precision to fp32. If fusing FQ into matmul, there would be reorder inserted // after matmul. In some bert model, this reorder causes great perf degradation. // Todo: Remove this if onednn primitive support U8 output with floating input. - if (node->getType() == Type::FakeQuantize && one_of(node->getOriginalOutputPrecisionAtPort(0), Precision::I8, Precision::U8) && + if (node->getType() == Type::FakeQuantize && one_of(node->getOriginalOutputPrecisionAtPort(0), ov::element::i8, ov::element::u8) && !canBeExecutedInInt8() && - getOriginalInputPrecisionAtPort(0) == InferenceEngine::Precision::FP32 ) + getOriginalInputPrecisionAtPort(0) == ov::element::f32 ) return false; return canFuseSimpleOperation(node); } @@ -247,7 +246,7 @@ dnnl::memory::desc MatMul::getBiasDescFrom(const DnnlMemoryDescCPtr outMemDesc) const auto outDims = outMemDesc->getShape().getStaticDims(); const auto chIdx = getFusingAxis(); biasDims[chIdx] = outDims[chIdx]; - const auto bdt = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(2)); + const auto bdt = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(2)); return dnnl::memory::desc(DnnlExtensionUtils::convertToDnnlDims(biasDims), bdt, memory::format_tag::any); } @@ -268,12 +267,12 @@ void MatMul::getSupportedDescriptors() { firstInPortPrec = secondInPortPrec = getMaxPrecision(getOriginalInputPrecisions()); // fallback to fp32 for any precision that cannot be handled natively - if ((!one_of(firstInPortPrec , Precision::U8, Precision::I8, Precision::BF16, Precision::FP16, Precision::FP32) || - !one_of(secondInPortPrec , Precision::I8, Precision::BF16, Precision::FP16, Precision::FP32))) { - outPortPrec = firstInPortPrec = secondInPortPrec = Precision::FP32; + if ((!one_of(firstInPortPrec , ov::element::u8, ov::element::i8, ov::element::bf16, ov::element::f16, ov::element::f32) || + !one_of(secondInPortPrec , ov::element::i8, ov::element::bf16, ov::element::f16, ov::element::f32))) { + outPortPrec = firstInPortPrec = secondInPortPrec = ov::element::f32; } - Precision postOpsPrec = outPortPrec; + ov::element::Type postOpsPrec = outPortPrec; if (!fusedWith.empty()) { postOpsPrec = fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0); } @@ -282,10 +281,10 @@ void MatMul::getSupportedDescriptors() { // INT8 mode support wide range of output precisions outPortPrec = postOpsPrec; // INT8 matmul do not support fp16 output - if (outPortPrec == Precision::FP16) { - outPortPrec = Precision::FP32; + if (outPortPrec == ov::element::f16) { + outPortPrec = ov::element::f32; } - } else if (postOpsPrec == Precision::FP32) { + } else if (postOpsPrec == ov::element::f32) { // all non-INT8 modes support fp32 output precision outPortPrec = postOpsPrec; } else { @@ -491,7 +490,7 @@ MemoryDescPtr MatMul::getSrcMemDesc(const dnnl::primitive_desc &prim_desc, size_ if (idx < 2) // inputs return std::make_shared( - DnnlExtensionUtils::DataTypeToIEPrecision(desc.get_data_type()), + DnnlExtensionUtils::DataTypeToElementType(desc.get_data_type()), getInputShapeAtPort(idx)); /* provide initial shapes, so hide transpose effect */ else // bias return DnnlExtensionUtils::makeDescriptor(desc); @@ -501,7 +500,7 @@ bool MatMul::created() const { return getType() == Type::MatMul; } -InferenceEngine::Precision MatMul::getRuntimePrecision() const { +ov::element::Type MatMul::getRuntimePrecision() const { return getMaxPrecision(getInputPrecisions()); } diff --git a/src/plugins/intel_cpu/src/nodes/matmul.h b/src/plugins/intel_cpu/src/nodes/matmul.h index d0c3ac855a0ce3..0fa39e24bc29ab 100644 --- a/src/plugins/intel_cpu/src/nodes/matmul.h +++ b/src/plugins/intel_cpu/src/nodes/matmul.h @@ -28,7 +28,7 @@ class MatMul : public Node { bool canFuse(const NodePtr& node) const override; bool created() const override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; size_t descInputNumbers() override { return getOriginalInputsNumber(); } diff --git a/src/plugins/intel_cpu/src/nodes/matrix_nms.cpp b/src/plugins/intel_cpu/src/nodes/matrix_nms.cpp index ad52114c5655cf..d569f9edf920e6 100644 --- a/src/plugins/intel_cpu/src/nodes/matrix_nms.cpp +++ b/src/plugins/intel_cpu/src/nodes/matrix_nms.cpp @@ -115,8 +115,8 @@ void MatrixNms::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - const std::vector supportedFloatPrecision = {Precision::FP32, Precision::FP16}; - const std::vector supportedIntOutputPrecision = {Precision::I32, Precision::I64}; + const std::vector supportedFloatPrecision = {ov::element::f32, ov::element::f16}; + const std::vector supportedIntOutputPrecision = {ov::element::i32, ov::element::i64}; checkPrecision(getOriginalInputPrecisionAtPort(NMS_BOXES), supportedFloatPrecision, "boxes", m_inType); checkPrecision(getOriginalInputPrecisionAtPort(NMS_SCORES), supportedFloatPrecision, "scores", m_inType); @@ -125,11 +125,11 @@ void MatrixNms::initSupportedPrimitiveDescriptors() { checkPrecision(getOriginalOutputPrecisionAtPort(NMS_SELECTED_OUTPUTS), supportedFloatPrecision, "selected_outputs", m_outType); checkPrecision(getOriginalOutputPrecisionAtPort(NMS_VALID_OUTPUTS), supportedIntOutputPrecision, "valid_outputs", m_outType); - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref_any); } @@ -414,7 +414,7 @@ void MatrixNms::execute(dnnl::stream strm) { } } -void MatrixNms::checkPrecision(const Precision prec, const std::vector precList, const std::string name, const std::string type) { +void MatrixNms::checkPrecision(const ov::element::Type prec, const std::vector precList, const std::string name, const std::string type) { if (std::find(precList.begin(), precList.end(), prec) == precList.end()) OPENVINO_THROW(m_errorPrefix, "has unsupported '", name, "' ", type, " precision: ", prec); } diff --git a/src/plugins/intel_cpu/src/nodes/matrix_nms.h b/src/plugins/intel_cpu/src/nodes/matrix_nms.h index 61b1d0188c6fab..34b9911759f343 100644 --- a/src/plugins/intel_cpu/src/nodes/matrix_nms.h +++ b/src/plugins/intel_cpu/src/nodes/matrix_nms.h @@ -100,7 +100,7 @@ class MatrixNms : public Node { size_t m_realNumClasses = 0; size_t m_realNumBoxes = 0; float (*m_decay_fn)(float, float, float) = nullptr; - void checkPrecision(const InferenceEngine::Precision prec, const std::vector precList, const std::string name, + void checkPrecision(const ov::element::Type prec, const std::vector precList, const std::string name, const std::string type); size_t nmsMatrix(const float* boxesData, const float* scoresData, BoxInfo* filterBoxes, const int64_t batchIdx, const int64_t classIdx); diff --git a/src/plugins/intel_cpu/src/nodes/memory.cpp b/src/plugins/intel_cpu/src/nodes/memory.cpp index b5af773e6e3446..d5a482b34adab3 100644 --- a/src/plugins/intel_cpu/src/nodes/memory.cpp +++ b/src/plugins/intel_cpu/src/nodes/memory.cpp @@ -69,7 +69,7 @@ void MemoryOutput::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); NodeConfig config; config.inConfs.resize(1); config.inConfs[0].inPlace(-1); diff --git a/src/plugins/intel_cpu/src/nodes/mha.cpp b/src/plugins/intel_cpu/src/nodes/mha.cpp index c5d5565a98c828..be9832cf68e437 100644 --- a/src/plugins/intel_cpu/src/nodes/mha.cpp +++ b/src/plugins/intel_cpu/src/nodes/mha.cpp @@ -205,11 +205,11 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi bool is_tail = step < vec_size; load(get_vmm_in(0), reg_in0, jcp_.src_prc, step, is_tail); - load(get_vmm_in(2), reg_add_in1, Precision::FP32, step, is_tail); + load(get_vmm_in(2), reg_add_in1, ov::element::f32, step, is_tail); if (jcp_.with_scales0) { if (!jcp_.broadcast_scales0) { - load(vmm_scales, reg_scales, Precision::FP32, step, is_tail); + load(vmm_scales, reg_scales, ov::element::f32, step, is_tail); add(reg_scales, sizeof(float) * step); } uni_vmulps(get_vmm_in(0), get_vmm_in(0), vmm_scales); @@ -231,7 +231,7 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi uni_vmaxps(get_vmm_max(0), get_vmm_max(0), get_vmm_in(0)); - store(reg_buffer_aux, get_vmm_in(0), Precision::FP32, step); + store(reg_buffer_aux, get_vmm_in(0), ov::element::f32, step); if (!is_tail) { add(reg_in0, jcp_.src_prc.size() * step); @@ -243,7 +243,7 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi void sub_exp_reduce(size_t step) { bool is_tail = step < vec_size; - load(get_vmm_in(0), reg_buffer_aux, Precision::FP32, step, is_tail); + load(get_vmm_in(0), reg_buffer_aux, ov::element::f32, step, is_tail); uni_vsubps(get_vmm_in(0), get_vmm_in(0), get_vmm_max(0)); @@ -252,7 +252,7 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi uni_vaddps(get_vmm_denom(0), get_vmm_denom(0), get_vmm_in(0)); - store(reg_buffer_aux, get_vmm_in(0), Precision::FP32, step); + store(reg_buffer_aux, get_vmm_in(0), ov::element::f32, step); if (!is_tail) { add(reg_buffer_aux, sizeof(float) * step); @@ -262,14 +262,14 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi void mul_loop(size_t step) { bool is_tail = step < vec_size; - load(get_vmm_in(0), reg_buffer, Precision::FP32, step, is_tail); + load(get_vmm_in(0), reg_buffer, ov::element::f32, step, is_tail); uni_vmulps(get_vmm_in(0), get_vmm_in(0), get_vmm_denom(0)); - if (jcp_.src_prc == Precision::I32) { + if (jcp_.src_prc == ov::element::i32) { if (jcp_.with_scales1) { if (!jcp_.broadcast_scales1) { - load(vmm_scales, reg_scales, Precision::FP32, step, is_tail); + load(vmm_scales, reg_scales, ov::element::f32, step, is_tail); add(reg_scales, sizeof(float) * step); } uni_vmulps(get_vmm_in(0), get_vmm_in(0), vmm_scales); @@ -285,19 +285,19 @@ struct jit_mul_add_softmax_kernel : public jit_uni_mul_add_softmax_kernel, publi #undef GET_OFF } - inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, Precision src_prc, const int& elt_num, bool fill) { - const auto seed = load_emitter_params(src_prc, Precision::FP32, elt_num, fill, "float_min").hash(); + inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, ov::element::Type src_prc, const int& elt_num, bool fill) { + const auto seed = load_emitter_params(src_prc, ov::element::f32, elt_num, fill, "float_min").hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, Precision::FP32, elt_num, Precision::FP32, fill, "float_min")); + emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, ov::element::f32, elt_num, ov::element::f32, fill, "float_min")); } emitters[seed]->emit_code({static_cast(reg_src.getIdx()), 0}, {static_cast(vmm_dst.getIdx())}, pool_aux_vmm_idxs, pool_aux_gpr_idxs); } - inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, Precision dst_prc, const int& elt_num) { - const auto seed = store_emitter_params(Precision::FP32, dst_prc, elt_num).hash(); + inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, ov::element::Type dst_prc, const int& elt_num) { + const auto seed = store_emitter_params(ov::element::f32, dst_prc, elt_num).hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_store_emitter(this, isa, Precision::FP32, dst_prc, elt_num)); + emitters[seed].reset(new jit_store_emitter(this, isa, ov::element::f32, dst_prc, elt_num)); } emitters[seed]->emit_code({static_cast(vmm_src.getIdx()), 0}, {static_cast(reg_dst.getIdx())}, @@ -452,7 +452,7 @@ struct jit_convert_reorder_kernel : public jit_uni_convert_reorder_kernel, publi if (jcp_.with_scales) { if (!jcp_.broadcast_scales) { - load(vmm_scales, reg_scales, Precision::FP32, step, is_tail); + load(vmm_scales, reg_scales, ov::element::f32, step, is_tail); add(reg_scales, sizeof(float) * step); } uni_vmulps(vmm_in, vmm_in, vmm_scales); @@ -467,19 +467,19 @@ struct jit_convert_reorder_kernel : public jit_uni_convert_reorder_kernel, publi } #undef GET_OFF - inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, Precision src_prc, const int& elt_num, bool fill) { - const auto seed = load_emitter_params(src_prc, Precision::FP32, elt_num, fill, "float_min").hash(); + inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, ov::element::Type src_prc, const int& elt_num, bool fill) { + const auto seed = load_emitter_params(src_prc, ov::element::f32, elt_num, fill, "float_min").hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, Precision::FP32, elt_num, Precision::FP32, fill, "float_min")); + emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, ov::element::f32, elt_num, ov::element::f32, fill, "float_min")); } emitters[seed]->emit_code({static_cast(reg_src.getIdx()), 0}, {static_cast(vmm_dst.getIdx())}, pool_aux_vmm_idxs, pool_aux_gpr_idxs); } - inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, Precision dst_prc, const int& elt_num) { - const auto seed = store_emitter_params(Precision::FP32, dst_prc, elt_num).hash(); + inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, ov::element::Type dst_prc, const int& elt_num) { + const auto seed = store_emitter_params(ov::element::f32, dst_prc, elt_num).hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_store_emitter(this, isa, Precision::FP32, dst_prc, elt_num)); + emitters[seed].reset(new jit_store_emitter(this, isa, ov::element::f32, dst_prc, elt_num)); } emitters[seed]->emit_code({static_cast(vmm_src.getIdx()), 0}, {static_cast(reg_dst.getIdx())}, @@ -512,7 +512,7 @@ struct jit_convert_transpose_kernel : public jit_uni_convert_transpose_kernel, p DECLARE_CPU_JIT_AUX_FUNCTIONS(jit_convert_transpose_kernel) explicit jit_convert_transpose_kernel(const jit_convert_transpose_compile_params& jcp) : jit_uni_convert_transpose_kernel(jcp), jit_generator(jit_name()) { - interm_prc = jcp_.with_scales ? Precision(Precision::FP32) : jcp_.src_prc; + interm_prc = jcp_.with_scales ? ov::element::f32 : jcp_.src_prc; vec_size = dnnl::impl::cpu::x64::cpu_isa_traits::vlen / interm_prc.size(); } virtual ~jit_convert_transpose_kernel() {} @@ -612,7 +612,7 @@ struct jit_convert_transpose_kernel : public jit_uni_convert_transpose_kernel, p if (jcp_.with_scales) { if (!jcp_.broadcast_scales) { - load(vmm_scales, reg_scales, Precision::FP32, Precision::FP32, step, false); + load(vmm_scales, reg_scales, ov::element::f32, ov::element::f32, step, false); add(reg_scales, sizeof(float) * step); } uni_vmulps(vmm_in, vmm_in, vmm_scales); @@ -626,16 +626,16 @@ struct jit_convert_transpose_kernel : public jit_uni_convert_transpose_kernel, p } } #undef GET_OFF - inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, Precision src_prc, Precision dst_prc, const int& elt_num, bool fill) { + inline void load(const Vmm& vmm_dst, const Xbyak::Reg64& reg_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int& elt_num, bool fill) { const auto seed = load_emitter_params(src_prc, dst_prc, elt_num, fill, "float_min").hash(); if (!emitters[seed]) { - emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num, Precision::FP32, fill, "float_min")); + emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num, ov::element::f32, fill, "float_min")); } emitters[seed]->emit_code({static_cast(reg_src.getIdx()), 0}, {static_cast(vmm_dst.getIdx())}, pool_aux_vmm_idxs, pool_aux_gpr_idxs); } - inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, Precision src_prc, Precision dst_prc, const int& elt_num) { + inline void store(const Xbyak::Reg64& reg_dst, const Vmm& vmm_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int& elt_num) { const auto seed = store_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_store_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -646,7 +646,7 @@ struct jit_convert_transpose_kernel : public jit_uni_convert_transpose_kernel, p } size_t vec_size; - Precision interm_prc; + ov::element::Type interm_prc; Xmm xmm_tmp = Xmm(2); Vmm vmm_scales = Vmm(0); @@ -762,7 +762,7 @@ MHA::MHA(const std::shared_ptr& op, const GraphContext::CPtr context) fqScales1 = mha->get_fq_scales1(); fqScales2 = mha->get_fq_scales2(); fqScales3 = mha->get_fq_scales3(); - fqPrc2 = details::convertPrecision(mha->get_fq2_output_type()); + fqPrc2 = mha->get_fq2_output_type(); } void MHA::initSupportedPrimitiveDescriptors() { @@ -771,31 +771,31 @@ void MHA::initSupportedPrimitiveDescriptors() { for (auto idx : {0, 1, 2, 3}) { inputPrecisions.push_back(getOriginalInputPrecisionAtPort(idx)); - if (!one_of(inputPrecisions[idx], Precision::FP32, Precision::BF16, Precision::I8)) { + if (!one_of(inputPrecisions[idx], ov::element::f32, ov::element::bf16, ov::element::i8)) { // unsupported precision, fallback to FP32 - inputPrecisions[idx] = Precision::FP32; + inputPrecisions[idx] = ov::element::f32; } } if ((inputPrecisions[0] != inputPrecisions[1]) && - !(inputPrecisions[0] == Precision::I8 && inputPrecisions[1] == Precision::FP32 && !fqScales0.empty())) { - inputPrecisions[0] = inputPrecisions[1] = Precision::FP32; + !(inputPrecisions[0] == ov::element::i8 && inputPrecisions[1] == ov::element::f32 && !fqScales0.empty())) { + inputPrecisions[0] = inputPrecisions[1] = ov::element::f32; } - inputPrecisions[2] = Precision::FP32; + inputPrecisions[2] = ov::element::f32; - if (inputPrecisions[3] == Precision::I8 && fqScales2.empty()) - inputPrecisions[3] = Precision::FP32; + if (inputPrecisions[3] == ov::element::i8 && fqScales2.empty()) + inputPrecisions[3] = ov::element::f32; outputPrecision = getOriginalOutputPrecisionAtPort(0); - if (!one_of(outputPrecision, Precision::FP32, Precision::BF16, Precision::I8, Precision::U8)) { + if (!one_of(outputPrecision, ov::element::f32, ov::element::bf16, ov::element::i8, ov::element::u8)) { // unsupported precision, fallback to FP32 - outputPrecision = Precision::FP32; + outputPrecision = ov::element::f32; } addSupportedPrimDesc({{LayoutType::ncsp, inputPrecisions[0]}, {LayoutType::ncsp, inputPrecisions[1]}, - {LayoutType::ncsp, Precision::FP32}, + {LayoutType::ncsp, ov::element::f32}, {LayoutType::ncsp, inputPrecisions[3]}}, {{LayoutType::ncsp, outputPrecision}}, ref_any); @@ -950,16 +950,16 @@ void MHA::prepareParams() { auto brg0Prc = inputPrecisions[0]; brg0VnniFactor = 4 / brg0Prc.size(); - bool brg0WithAMX = isAMXSupported && brg0Prc != Precision::FP32 && (K0 % brg0VnniFactor == 0) && (N0 % brg0VnniFactor == 0); + bool brg0WithAMX = isAMXSupported && brg0Prc != ov::element::f32 && (K0 % brg0VnniFactor == 0) && (N0 % brg0VnniFactor == 0); - N0_blk = brg0Prc == Precision::FP32 ? N0 : - brg0Prc == Precision::BF16 ? 32 : 64; + N0_blk = brg0Prc == ov::element::f32 ? N0 : + brg0Prc == ov::element::bf16 ? 32 : 64; N0_tail = N0 % N0_blk; - K0_blk = brg0WithAMX ? brg0Prc == Precision::BF16 ? 32 : 64 + K0_blk = brg0WithAMX ? brg0Prc == ov::element::bf16 ? 32 : 64 : K0; K0_tail = K0 % K0_blk; - accPrecision0 = brg0Prc == Precision::I8 ? Precision::I32 : Precision::FP32; + accPrecision0 = brg0Prc == ov::element::i8 ? ov::element::i32 : ov::element::f32; size_t brg0BaseIdx = std::numeric_limits::max(); for (size_t m = 0; m < 2; m++) { @@ -979,8 +979,8 @@ void MHA::prepareParams() { brgemmCtx.LDA = batch1 * K0; brgemmCtx.LDB = rnd_up(N0, N0_blk); brgemmCtx.LDC = N0; - brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg0Prc)); - brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg0Prc)); + brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg0Prc)); + brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg0Prc)); brgemmCtx.beta = beta; // don't create brgemm kernels for empty tiles @@ -1000,7 +1000,7 @@ void MHA::prepareParams() { // init_brgemm_copy_a(brgCopyAKernel0, K0, K0_blk, K0_tail, brgemmCtx0.LDA, brgemmCtx0.dt_in0); // } - if (brgemmCtx0.is_with_amx || brg0Prc == Precision::I8 || brg0Prc == Precision::BF16) { + if (brgemmCtx0.is_with_amx || brg0Prc == ov::element::i8 || brg0Prc == ov::element::bf16) { init_brgemm_copy_b(brgCopyBKernel0, N0, N0_blk, N0_tail, brgemmCtx0.LDB, brgemmCtx0.K, brgemmCtx0.is_with_amx, brgemmCtx0.dt_in0, brgemmCtx0.dt_in1); } @@ -1013,16 +1013,16 @@ void MHA::prepareParams() { auto brg1PrcIn0 = !fqScales2.empty() ? fqPrc2 : inputPrecisions[3]; auto brg1PrcIn1 = inputPrecisions[3]; brg1VnniFactor = 4 / brg1PrcIn0.size(); - bool brg1WithAMX = isAMXSupported && brg1PrcIn0 != Precision::FP32 && (K1 % brg1VnniFactor == 0) && (N1 % brg1VnniFactor == 0); + bool brg1WithAMX = isAMXSupported && brg1PrcIn0 != ov::element::f32 && (K1 % brg1VnniFactor == 0) && (N1 % brg1VnniFactor == 0); - N1_blk = brg1PrcIn1 == Precision::FP32 ? N1 : - brg1PrcIn1 == Precision::BF16 ? 32 : 64; + N1_blk = brg1PrcIn1 == ov::element::f32 ? N1 : + brg1PrcIn1 == ov::element::bf16 ? 32 : 64; N1_tail = N1 % N1_blk; - K1_blk = brg1WithAMX ? brg1PrcIn0 == Precision::BF16 ? 32 : 64 + K1_blk = brg1WithAMX ? brg1PrcIn0 == ov::element::bf16 ? 32 : 64 : K1; K1_tail = K1 % K1_blk; - accPrecision1 = one_of(brg1PrcIn0, Precision::U8, Precision::I8) ? Precision::I32 : Precision::FP32; + accPrecision1 = one_of(brg1PrcIn0, ov::element::u8, ov::element::i8) ? ov::element::i32 : ov::element::f32; size_t brg1BaseIdx = std::numeric_limits::max(); for (size_t m = 0; m < 2; m++) { @@ -1040,10 +1040,10 @@ void MHA::prepareParams() { brgemmCtx.N = N_; brgemmCtx.K = K_; brgemmCtx.LDA = K1; - brgemmCtx.LDB = brg1PrcIn1 == Precision::FP32 ? batch1 * N1 : rnd_up(N1, N1_blk); + brgemmCtx.LDB = brg1PrcIn1 == ov::element::f32 ? batch1 * N1 : rnd_up(N1, N1_blk); brgemmCtx.LDC = accPrecision1 == outputPrecision ? batch1 * N1 : N1; - brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg1PrcIn0)); - brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::IEPrecisionToDataType(brg1PrcIn1)); + brgemmCtx.dt_in0 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg1PrcIn0)); + brgemmCtx.dt_in1 = static_cast(DnnlExtensionUtils::ElementTypeToDataType(brg1PrcIn1)); brgemmCtx.beta = beta; // don't create brgemm kernels for empty tiles @@ -1058,7 +1058,7 @@ void MHA::prepareParams() { } auto& brgemmCtx1 = brgCtxs1[brg1BaseIdx]; - if (brgemmCtx1.is_with_amx || brg1PrcIn1 == Precision::I8 || brg1PrcIn1 == Precision::BF16) { + if (brgemmCtx1.is_with_amx || brg1PrcIn1 == ov::element::i8 || brg1PrcIn1 == ov::element::bf16) { init_brgemm_copy_b(brgCopyBKernel1, batch1 * N1, N1_blk, N1_tail, brgemmCtx1.LDB, brgemmCtx1.K, brgemmCtx1.is_with_amx, brgemmCtx1.dt_in0, brgemmCtx1.dt_in1); } @@ -1381,7 +1381,7 @@ void MHA::mhaImpl() { auto pMatMul1In0 = bufferMatMul0Out_local; auto pOut_aux = pout + (i0 * strOut[0] + i1 * strOut[2]) * outPrcSize; - auto pMatMul1Out = outputPrecision == Precision::FP32 + auto pMatMul1Out = outputPrecision == ov::element::f32 ? pOut_aux + (mb * M_blk * batch1 * N1) * outPrcSize : bufferMatMul1Out_local; @@ -1421,11 +1421,11 @@ void MHA::mhaImpl() { } void MHA::execute(dnnl::stream strm) { - if (inputPrecisions[1] == Precision::FP32) { + if (inputPrecisions[1] == ov::element::f32) { mhaImpl(); - } else if (inputPrecisions[1] == Precision::BF16) { + } else if (inputPrecisions[1] == ov::element::bf16) { mhaImpl(); - } else if (inputPrecisions[1] == Precision::I8) { + } else if (inputPrecisions[1] == ov::element::i8) { mhaImpl(); } else { THROW_ERROR("doesn't support provided input precisions"); diff --git a/src/plugins/intel_cpu/src/nodes/mha.h b/src/plugins/intel_cpu/src/nodes/mha.h index 7a3a3ec471a9fe..2657d8c88ad55d 100644 --- a/src/plugins/intel_cpu/src/nodes/mha.h +++ b/src/plugins/intel_cpu/src/nodes/mha.h @@ -19,8 +19,8 @@ namespace intel_cpu { namespace node { struct jit_mul_add_softmax_compile_params { - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; size_t work_amount; bool with_mul_scales; bool is_mul_first; @@ -57,8 +57,8 @@ struct jit_uni_mul_add_softmax_kernel { }; struct jit_convert_reorder_compile_params { - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; size_t inner_work_amount; bool with_scales; bool broadcast_scales; @@ -90,8 +90,8 @@ struct jit_uni_convert_reorder_kernel { }; struct jit_convert_transpose_compile_params { - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; size_t inner_work_amount; size_t outter_work_amount; bool with_scales; @@ -167,10 +167,10 @@ class MHA : public Node { return mIdx * 4 + kIdx * 2 + nIdx; } - std::vector inputPrecisions; - InferenceEngine::Precision outputPrecision; - InferenceEngine::Precision accPrecision0; - InferenceEngine::Precision accPrecision1; + std::vector inputPrecisions; + ov::element::Type outputPrecision; + ov::element::Type accPrecision0; + ov::element::Type accPrecision1; VectorDims dimsTranspose0In0; VectorDims dimsTranspose1In0; @@ -216,7 +216,7 @@ class MHA : public Node { std::vector wsp; bool isMulFirst; - InferenceEngine::Precision fqPrc2; + ov::element::Type fqPrc2; std::vector mulScales; std::vector fqScales0; diff --git a/src/plugins/intel_cpu/src/nodes/multiclass_nms.cpp b/src/plugins/intel_cpu/src/nodes/multiclass_nms.cpp index 75e27893fc2ac0..a71545187f7e38 100644 --- a/src/plugins/intel_cpu/src/nodes/multiclass_nms.cpp +++ b/src/plugins/intel_cpu/src/nodes/multiclass_nms.cpp @@ -118,8 +118,8 @@ void MultiClassNms::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - const std::vector supportedFloatPrecision = {Precision::FP32, Precision::FP16, Precision::BF16}; - const std::vector supportedIntOutputPrecision = {Precision::I32, Precision::I64}; + const std::vector supportedFloatPrecision = {ov::element::f32, ov::element::f16, ov::element::bf16}; + const std::vector supportedIntOutputPrecision = {ov::element::i32, ov::element::i64}; checkPrecision(getOriginalInputPrecisionAtPort(NMS_BOXES), supportedFloatPrecision, "boxes", m_inType); checkPrecision(getOriginalInputPrecisionAtPort(NMS_SCORES), supportedFloatPrecision, "scores", m_inType); @@ -130,19 +130,19 @@ void MultiClassNms::initSupportedPrimitiveDescriptors() { if (getOriginalInputsNumber() == 3) { checkPrecision(getOriginalInputPrecisionAtPort(NMS_ROISNUM), supportedIntOutputPrecision, "roisnum", m_inType); - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref_any); } else { - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref_any); } } @@ -611,7 +611,10 @@ void MultiClassNms::nmsWithoutEta(const float* boxes, }); } -void MultiClassNms::checkPrecision(const Precision prec, const std::vector precList, const std::string name, const std::string type) { +void MultiClassNms::checkPrecision(const ov::element::Type prec, + const std::vector precList, + const std::string name, + const std::string type) { if (std::find(precList.begin(), precList.end(), prec) == precList.end()) OPENVINO_THROW(m_errorPrefix, "has unsupported '", name, "' ", type, " precision: ", prec); } diff --git a/src/plugins/intel_cpu/src/nodes/multiclass_nms.hpp b/src/plugins/intel_cpu/src/nodes/multiclass_nms.hpp index 0c9380ad618d7e..ce25e0c506d2bc 100644 --- a/src/plugins/intel_cpu/src/nodes/multiclass_nms.hpp +++ b/src/plugins/intel_cpu/src/nodes/multiclass_nms.hpp @@ -91,7 +91,7 @@ class MultiClassNms : public Node { std::vector m_filtBoxes; // rois after nms for each class in each image - void checkPrecision(const InferenceEngine::Precision prec, const std::vector precList, const std::string name, + void checkPrecision(const ov::element::Type prec, const std::vector precList, const std::string name, const std::string type); float intersectionOverUnion(const float* boxesI, const float* boxesJ, const bool normalized); diff --git a/src/plugins/intel_cpu/src/nodes/mvn.cpp b/src/plugins/intel_cpu/src/nodes/mvn.cpp index 5e99cd9d6b50b3..818f386259e2cb 100644 --- a/src/plugins/intel_cpu/src/nodes/mvn.cpp +++ b/src/plugins/intel_cpu/src/nodes/mvn.cpp @@ -59,8 +59,8 @@ size_t MVNKey::hash() const { seed = hash_combine(seed, mvnAttrs.normalizeVariance_); seed = hash_combine(seed, mvnAttrs.epsValue_); seed = hash_combine(seed, mvnAttrs.epsMode_); - seed = hash_combine(seed, mvnAttrs.src_prc.getPrecVal()); - seed = hash_combine(seed, mvnAttrs.dst_prc.getPrecVal()); + seed = hash_combine(seed, mvnAttrs.src_prc.hash()); + seed = hash_combine(seed, mvnAttrs.dst_prc.hash()); seed = hash_combine(seed, mvnAttrs.layout); seed = hash_combine(seed, get_attr_hash(*attr.get())); return seed; @@ -85,8 +85,8 @@ bool MVNKey::operator==(const MVNKey& rhs) const { #if defined(OPENVINO_ARCH_X86_64) // some utility functions -static inline bool isFloatCompatible(Precision prc) { - return one_of(prc, Precision::FP32, Precision::BF16, Precision::FP16); +static inline bool isFloatCompatible(ov::element::Type prc) { + return one_of(prc, ov::element::f32, ov::element::bf16, ov::element::f16); } // 8/4/2/1 tile @@ -119,16 +119,16 @@ struct jit_uni_mvn_mean_variance_kernel_f32 : public jit_uni_mvn_mean_variance_k } void generate() override { - Precision dst_prc = isFloatCompatible(jcp_.src_prc) ? Precision::FP32 : Precision::I32; + ov::element::Type dst_prc = isFloatCompatible(jcp_.src_prc) ? ov::element::f32 : ov::element::i32; load_emitter[VECTOR] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, vector_step)); load_emitter[TAIL8] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 8)); load_emitter[TAIL4] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 4)); load_emitter[TAIL2] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 2)); load_emitter[TAIL1] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 1)); - load_emitter[TAIL8_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 8, Precision::FP32, true, "zero")); - load_emitter[TAIL4_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 4, Precision::FP32, true, "zero")); - load_emitter[TAIL2_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 2, Precision::FP32, true, "zero")); - load_emitter[TAIL1_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 1, Precision::FP32, true, "zero")); + load_emitter[TAIL8_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 8, ov::element::f32, true, "zero")); + load_emitter[TAIL4_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 4, ov::element::f32, true, "zero")); + load_emitter[TAIL2_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 2, ov::element::f32, true, "zero")); + load_emitter[TAIL1_FILL] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, dst_prc, 1, ov::element::f32, true, "zero")); this->preamble(); mov(reg_table, l_table); @@ -662,7 +662,7 @@ struct jit_uni_mvn_mean_variance_kernel_f32 : public jit_uni_mvn_mean_variance_k cmp(reg_work_amount, 4); jl(loop_8bit_end_label, T_NEAR); - if (jcp_.src_prc == Precision::I8) { + if (jcp_.src_prc == ov::element::i8) { vpdpbusd(vmm_sum, vmm_one, ptr[reg_src]); } else { uni_vmovdqu(vmm_val, ptr[reg_src]); @@ -677,7 +677,7 @@ struct jit_uni_mvn_mean_variance_kernel_f32 : public jit_uni_mvn_mean_variance_k L(loop_8bit_end_label); } // bf16 fast path - if (mayiuse(avx512_core_bf16) && jcp_.src_prc == Precision::BF16) { + if (mayiuse(avx512_core_bf16) && jcp_.src_prc == ov::element::bf16) { uni_vmovups(vmm_one, ptr[reg_table]); Xbyak::Label loop_bf16_label; Xbyak::Label loop_bf16_end_label; @@ -869,12 +869,12 @@ struct jit_uni_mvn_mean_variance_kernel_f32 : public jit_uni_mvn_mean_variance_k align(64); L(l_table); - if (mayiuse(avx512_core_vnni) && (jcp_.src_prc == Precision::U8 || jcp_.src_prc == Precision::I8)) { + if (mayiuse(avx512_core_vnni) && (jcp_.src_prc == ov::element::u8 || jcp_.src_prc == ov::element::i8)) { for (int d = 0; d < vector_step; ++d) { dd(cvals[0]); } } - if (mayiuse(avx512_core_bf16) && jcp_.src_prc == Precision::BF16) { + if (mayiuse(avx512_core_bf16) && jcp_.src_prc == ov::element::bf16) { for (int d = 0; d < vector_step; ++d) { dd(cvals[1]); } @@ -925,16 +925,16 @@ struct jit_uni_mvn_kernel_f32 : public jit_uni_mvn_kernel, public jit_generator } } - load_emitter[VECTOR] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, Precision::FP32, vector_step)); - load_emitter[TAIL8] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, Precision::FP32, 8)); - load_emitter[TAIL4] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, Precision::FP32, 4)); - load_emitter[TAIL2] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, Precision::FP32, 2)); - load_emitter[TAIL1] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, Precision::FP32, 1)); - store_emitter[VECTOR] = std::unique_ptr(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, vector_step)); - store_emitter[TAIL8] = std::unique_ptr(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, 8)); - store_emitter[TAIL4] = std::unique_ptr(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, 4)); - store_emitter[TAIL2] = std::unique_ptr(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, 2)); - store_emitter[TAIL1] = std::unique_ptr(new jit_store_emitter(this, isa, Precision::FP32, jcp_.dst_prc, 1)); + load_emitter[VECTOR] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, ov::element::f32, vector_step)); + load_emitter[TAIL8] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, ov::element::f32, 8)); + load_emitter[TAIL4] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, ov::element::f32, 4)); + load_emitter[TAIL2] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, ov::element::f32, 2)); + load_emitter[TAIL1] = std::unique_ptr(new jit_load_emitter(this, isa, jcp_.src_prc, ov::element::f32, 1)); + store_emitter[VECTOR] = std::unique_ptr(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, vector_step)); + store_emitter[TAIL8] = std::unique_ptr(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, 8)); + store_emitter[TAIL4] = std::unique_ptr(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, 4)); + store_emitter[TAIL2] = std::unique_ptr(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, 2)); + store_emitter[TAIL1] = std::unique_ptr(new jit_store_emitter(this, isa, ov::element::f32, jcp_.dst_prc, 1)); this->preamble(); @@ -1657,7 +1657,7 @@ struct jit_uni_mvn_kernel_f32 : public jit_uni_mvn_kernel, public jit_generator } } - void apply_post_ops(InferenceEngine::Precision dst_prc, size_t vmm_idx, bool is_broadcast) { + void apply_post_ops(ov::element::Type dst_prc, size_t vmm_idx, bool is_broadcast) { const auto &p = attr_.post_ops_; int eltwise_inj_idx = 0; int depthwise_inj_idx = 0; @@ -1827,11 +1827,11 @@ void MVN::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inputPrecision = getOriginalInputPrecisionAtPort(0); - Precision outputPrecision = getOriginalOutputPrecisionAtPort(0); + ov::element::Type inputPrecision = getOriginalInputPrecisionAtPort(0); + ov::element::Type outputPrecision = getOriginalOutputPrecisionAtPort(0); if (!mayiuse(avx512_core)) { - if (outputPrecision == Precision::BF16) - outputPrecision = Precision::FP32; + if (outputPrecision == ov::element::bf16) + outputPrecision = ov::element::f32; } if (!fusedWith.empty()) { @@ -1849,7 +1849,7 @@ void MVN::initSupportedPrimitiveDescriptors() { #if defined(OPENVINO_ARCH_X86) || defined(OPENVINO_ARCH_X86_64) // ref with float planar and no fusion if (!mayiuse(cpu::x64::sse41)) { - inputPrecision = outputPrecision = Precision::FP32; + inputPrecision = outputPrecision = ov::element::f32; } #endif //Output precision has to be equal to input precision in ACL MVN @@ -1870,7 +1870,7 @@ void MVN::initSupportedPrimitiveDescriptors() { config.inConfs[0].inPlace(-1); config.outConfs[0].inPlace(canBeInplace ? 0 : -1); if (inputsNum == 2) { - config.inConfs[1].setMemDesc(std::make_shared(InferenceEngine::Precision::I32, getInputShapeAtPort(1))); + config.inConfs[1].setMemDesc(std::make_shared(ov::element::i32, getInputShapeAtPort(1))); config.inConfs[1].constant(true); } @@ -1907,7 +1907,7 @@ void MVN::initSupportedPrimitiveDescriptors() { return; else // Reference MVN implementation does not support fp16, so set fp32 explicitly - inputPrecision = outputPrecision = Precision::FP32; + inputPrecision = outputPrecision = ov::element::f32; #endif // OV_CPU_WITH_ACL impl_desc_type impl_type; diff --git a/src/plugins/intel_cpu/src/nodes/mvn.h b/src/plugins/intel_cpu/src/nodes/mvn.h index f9340d0f605e98..1e0b3a2038c6a6 100644 --- a/src/plugins/intel_cpu/src/nodes/mvn.h +++ b/src/plugins/intel_cpu/src/nodes/mvn.h @@ -19,8 +19,8 @@ struct jit_mvn_config_params { MVNLayoutType layout; bool across_channels; bool normalize_variance; - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; int src_data_size; int dst_data_size; }; diff --git a/src/plugins/intel_cpu/src/nodes/ngram.cpp b/src/plugins/intel_cpu/src/nodes/ngram.cpp index 1e31ade98841d9..15c44718acad3e 100644 --- a/src/plugins/intel_cpu/src/nodes/ngram.cpp +++ b/src/plugins/intel_cpu/src/nodes/ngram.cpp @@ -55,13 +55,13 @@ void Ngram::initSupportedPrimitiveDescriptors() { return; idcesPrecision = getOriginalInputPrecisionAtPort(1); - if (idcesPrecision != InferenceEngine::Precision::I32 && idcesPrecision != InferenceEngine::Precision::I64) { - idcesPrecision = InferenceEngine::Precision::I32; + if (idcesPrecision != ov::element::i32 && idcesPrecision != ov::element::i64) { + idcesPrecision = ov::element::i32; } - addSupportedPrimDesc({{LayoutType::ncsp, InferenceEngine::Precision::FP32}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, {LayoutType::ncsp, idcesPrecision}}, - {{LayoutType::ncsp, InferenceEngine::Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}}, ref_any); } @@ -102,9 +102,9 @@ void Ngram::execute(dnnl::stream strm) { auto* dstData = reinterpret_cast(getChildEdgeAt(0)->getMemoryPtr()->getData()); std::vector batchLenghts; - if (idcesPrecision == InferenceEngine::Precision::I32) { + if (idcesPrecision == ov::element::i32) { batchLenghts = computeBatchLenghts(); - } else if (idcesPrecision == InferenceEngine::Precision::I64) { + } else if (idcesPrecision == ov::element::i64) { batchLenghts = computeBatchLenghts(); } else { OPENVINO_THROW("Unsupported idces precision: ", idcesPrecision); diff --git a/src/plugins/intel_cpu/src/nodes/ngram.h b/src/plugins/intel_cpu/src/nodes/ngram.h index 609c18de4d266a..61be05f507c521 100644 --- a/src/plugins/intel_cpu/src/nodes/ngram.h +++ b/src/plugins/intel_cpu/src/nodes/ngram.h @@ -47,7 +47,7 @@ class Ngram : public Node { size_t numIdces = 0; size_t numOutElems = 0; - InferenceEngine::Precision idcesPrecision; + ov::element::Type idcesPrecision; }; } // namespace node diff --git a/src/plugins/intel_cpu/src/nodes/non_max_suppression.cpp b/src/plugins/intel_cpu/src/nodes/non_max_suppression.cpp index ee0b9022ef3bd3..4b5dc72e956fb0 100644 --- a/src/plugins/intel_cpu/src/nodes/non_max_suppression.cpp +++ b/src/plugins/intel_cpu/src/nodes/non_max_suppression.cpp @@ -133,14 +133,14 @@ void NonMaxSuppression::initSupportedPrimitiveDescriptors() { std::vector inDataConf; inDataConf.reserve(inputs_num); for (size_t i = 0; i < inputs_num; ++i) { - Precision inPrecision = i == NMS_MAX_OUTPUT_BOXES_PER_CLASS ? Precision::I32 : Precision::FP32; + ov::element::Type inPrecision = i == NMS_MAX_OUTPUT_BOXES_PER_CLASS ? ov::element::i32 : ov::element::f32; inDataConf.emplace_back(LayoutType::ncsp, inPrecision); } std::vector outDataConf; outDataConf.reserve(outputShapes.size()); for (size_t i = 0; i < outputShapes.size(); ++i) { - Precision outPrecision = i == NMS_SELECTED_SCORES ? Precision::FP32 : Precision::I32; + ov::element::Type outPrecision = i == NMS_SELECTED_SCORES ? ov::element::f32 : ov::element::i32; outDataConf.emplace_back(LayoutType::ncsp, outPrecision); } diff --git a/src/plugins/intel_cpu/src/nodes/non_zero.cpp b/src/plugins/intel_cpu/src/nodes/non_zero.cpp index d6672bbf2874cd..93c688d2e9c527 100644 --- a/src/plugins/intel_cpu/src/nodes/non_zero.cpp +++ b/src/plugins/intel_cpu/src/nodes/non_zero.cpp @@ -57,16 +57,16 @@ void NonZero::initSupportedPrimitiveDescriptors() { return; const auto &inPrc = getOriginalInputPrecisionAtPort(0); - if (!one_of(inPrc, Precision::FP32, Precision::BF16, Precision::FP16, Precision::I32, Precision::U32, Precision::I8, Precision::U8)) { + if (!one_of(inPrc, ov::element::f32, ov::element::bf16, ov::element::f32, ov::element::i32, ov::element::u32, ov::element::i8, ov::element::u8)) { OPENVINO_THROW("Can't create primitive descriptor for NonZero layer with name: ", getName(), " doesn't support ", - inPrc.name(), + inPrc.get_type_name(), " precision on 0 port"); } addSupportedPrimDesc({{LayoutType::ncsp}}, - {{LayoutType::ncsp, Precision::I32}}, + {{LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref); } @@ -124,13 +124,13 @@ void NonZero::execute(dnnl::stream strm) { auto inputPrec = getParentEdgesAtPort(0)[0]->getMemory().getDesc().getPrecision(); NonZeroContext ctx = {*this }; OV_SWITCH(intel_cpu, NonZeroExecute, ctx, inputPrec, - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::BF16, bfloat16_t), - OV_CASE(Precision::FP16, float16), - OV_CASE(Precision::I32, int), - OV_CASE(Precision::U32, uint32_t), - OV_CASE(Precision::I8, int8_t), - OV_CASE(Precision::U8, uint8_t)) + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::bf16, bfloat16_t), + OV_CASE(ov::element::f16, float16), + OV_CASE(ov::element::i32, int), + OV_CASE(ov::element::u32, uint32_t), + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t)) } template void NonZero::executeSpecified() { diff --git a/src/plugins/intel_cpu/src/nodes/normalize.cpp b/src/plugins/intel_cpu/src/nodes/normalize.cpp index ab6e708401d5bc..f1e24977580ade 100644 --- a/src/plugins/intel_cpu/src/nodes/normalize.cpp +++ b/src/plugins/intel_cpu/src/nodes/normalize.cpp @@ -61,8 +61,8 @@ size_t NormalizeKey::hash() const { seed = hash_combine(seed, attrs.cornerCase); seed = hash_combine(seed, attrs.eps); seed = hash_combine(seed, attrs.layout); - seed = hash_combine(seed, attrs.input_prec.getPrecVal()); - seed = hash_combine(seed, attrs.output_prec.getPrecVal()); + seed = hash_combine(seed, attrs.input_prec.hash()); + seed = hash_combine(seed, attrs.output_prec.hash()); seed = hash_combine(seed, get_attr_hash(*kernel_attrs.get())); seed = get_vector_hash(seed, dims); @@ -782,28 +782,28 @@ void NormalizeL2::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inputPrecision = getOriginalInputPrecisionAtPort(DATA); - Precision outputPrecision = getOriginalOutputPrecisionAtPort(DATA); + ov::element::Type inputPrecision = getOriginalInputPrecisionAtPort(DATA); + ov::element::Type outputPrecision = getOriginalOutputPrecisionAtPort(DATA); if (!fusedWith.empty()) { outputPrecision = fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0); } - if (inputPrecision == Precision::BF16 || outputPrecision == Precision::BF16) { + if (inputPrecision == ov::element::bf16 || outputPrecision == ov::element::bf16) { if (!mayiuse(avx512_core)) - inputPrecision = outputPrecision = Precision::FP32; + inputPrecision = outputPrecision = ov::element::f32; else - inputPrecision = outputPrecision = Precision::BF16; + inputPrecision = outputPrecision = ov::element::bf16; } - if (one_of(Precision::FP16, inputPrecision, outputPrecision) && mayiuse(cpu::x64::sse41)) { - inputPrecision = outputPrecision = Precision::FP32; + if (one_of(ov::element::f16, inputPrecision, outputPrecision) && mayiuse(cpu::x64::sse41)) { + inputPrecision = outputPrecision = ov::element::f32; } - if (!one_of(inputPrecision, Precision::FP32, Precision::BF16, Precision::FP16, Precision::I8, Precision::U8)) { + if (!one_of(inputPrecision, ov::element::f32, ov::element::bf16, ov::element::f16, ov::element::i8, ov::element::u8)) { THROW_ERROR("has unsupported input precision: ", inputPrecision); } - if (!one_of(outputPrecision, Precision::FP32, Precision::BF16, Precision::FP16, Precision::I8, Precision::U8)) { + if (!one_of(outputPrecision, ov::element::f32, ov::element::bf16, ov::element::f16, ov::element::i8, ov::element::u8)) { THROW_ERROR("has unsupported output precision: ", outputPrecision); } @@ -825,7 +825,7 @@ void NormalizeL2::initSupportedPrimitiveDescriptors() { auto pushDesc = [&](LayoutType format, impl_desc_type impl_type) { auto a = creatorsMap.at(format)->createSharedDesc(inputPrecision, getInputShapeAtPort(DATA)); config.inConfs[0].setMemDesc(std::move(a)); - a = creatorsMap.at(LayoutType::ncsp)->createSharedDesc(InferenceEngine::Precision::I32, getInputShapeAtPort(AXES)); + a = creatorsMap.at(LayoutType::ncsp)->createSharedDesc(ov::element::i32, getInputShapeAtPort(AXES)); config.inConfs[1].setMemDesc(std::move(a)); a = creatorsMap.at(format)->createSharedDesc(outputPrecision, getOutputShapeAtPort(DATA)); config.outConfs[0].setMemDesc(std::move(a)); @@ -988,8 +988,8 @@ class NormalizeL2::NormalizeL2JitExecutor : public NormalizeL2::NormalizeL2Execu OPENVINO_THROW("Normalaize2L executor has selected layout which is not supported"); } - jcp.src_dt = DnnlExtensionUtils::IEPrecisionToDataType(attrs.input_prec); - jcp.dst_dt = DnnlExtensionUtils::IEPrecisionToDataType(attrs.output_prec); + jcp.src_dt = DnnlExtensionUtils::ElementTypeToDataType(attrs.input_prec); + jcp.dst_dt = DnnlExtensionUtils::ElementTypeToDataType(attrs.output_prec); jcp.src_data_size = attrs.input_prec.size(); jcp.dst_data_size = attrs.output_prec.size(); jcp.across_spatial = attrs.across_spatial; @@ -1368,7 +1368,7 @@ class NormalizeL2::NormalizeL2ReferenceExecutor : public NormalizeL2::NormalizeL for (size_t m = 0; m < spatial_dims; m++) { float dst_value = src_data_bc[m] * modulo_inv; apply_post_ops_scalar(dst_value, ic, post_ops_data); - if (attrs.output_prec == Precision::U8) { + if (attrs.output_prec == ov::element::u8) { dst_data_bc[m] = (dst_value >= 0) ? dst_value : 0; } else { dst_data_bc[m] = dst_value; @@ -1400,7 +1400,7 @@ class NormalizeL2::NormalizeL2ReferenceExecutor : public NormalizeL2::NormalizeL for (size_t m = 0; m < spatial_dims; m++) { float dst_value = src_data_bc[m] * moduloM[m]; apply_post_ops_scalar(dst_value, ic, post_ops_data); - if (attrs.output_prec == Precision::U8) { + if (attrs.output_prec == ov::element::u8) { dst_data_bc[m] = (dst_value >= 0) ? dst_value : 0; } else { dst_data_bc[m] = dst_value; @@ -1433,7 +1433,7 @@ class NormalizeL2::NormalizeL2ReferenceExecutor : public NormalizeL2::NormalizeL post_ops_data++; } else if (post_op.is_quantization()) { bool do_dequantization = post_op.quantization.alg == alg_kind::quantization_quantize_dequantize; - bool do_rounding = do_dequantization || attrs.output_prec == Precision::FP32 || i != p.len() - 1; + bool do_rounding = do_dequantization || attrs.output_prec == ov::element::f32 || i != p.len() - 1; auto quant = post_op.quantization; @@ -1482,17 +1482,17 @@ std::shared_ptr NormalizeL2::NormalizeL2Execut NormalizeContext ctx = { nullptr, attrs, kernel_attrs, dims }; OV_SWITCH(intel_cpu, NormalizeExecutorCreation, ctx, std::tie(attrs.input_prec, attrs.output_prec), - OV_CASE2(Precision::U8, Precision::U8, uint8_t, uint8_t), - OV_CASE2(Precision::I8, Precision::U8, int8_t, uint8_t), - OV_CASE2(Precision::FP32, Precision::U8, float, uint8_t), - OV_CASE2(Precision::U8, Precision::I8, uint8_t, int8_t), - OV_CASE2(Precision::I8, Precision::I8, int8_t, int8_t), - OV_CASE2(Precision::FP32, Precision::I8, float, int8_t), - OV_CASE2(Precision::U8, Precision::FP32, uint8_t, float), - OV_CASE2(Precision::I8, Precision::FP32, int8_t, float), - OV_CASE2(Precision::FP32, Precision::FP32, float, float), - OV_CASE2(Precision::BF16, Precision::BF16, bfloat16_t, bfloat16_t), - OV_CASE2(Precision::FP16, Precision::FP16, float16_t, float16_t)); + OV_CASE2(ov::element::u8, ov::element::u8, uint8_t, uint8_t), + OV_CASE2(ov::element::i8, ov::element::u8, int8_t, uint8_t), + OV_CASE2(ov::element::f32, ov::element::u8, float, uint8_t), + OV_CASE2(ov::element::u8, ov::element::i8, uint8_t, int8_t), + OV_CASE2(ov::element::i8, ov::element::i8, int8_t, int8_t), + OV_CASE2(ov::element::f32, ov::element::i8, float, int8_t), + OV_CASE2(ov::element::u8, ov::element::f32, uint8_t, float), + OV_CASE2(ov::element::i8, ov::element::f32, int8_t, float), + OV_CASE2(ov::element::f32, ov::element::f32, float, float), + OV_CASE2(ov::element::bf16, ov::element::bf16, bfloat16_t, bfloat16_t), + OV_CASE2(ov::element::f16, ov::element::f16, float16_t, float16_t)); return ctx.executor; } diff --git a/src/plugins/intel_cpu/src/nodes/normalize.h b/src/plugins/intel_cpu/src/nodes/normalize.h index 7a28e176ee08fb..e128fd510abc09 100644 --- a/src/plugins/intel_cpu/src/nodes/normalize.h +++ b/src/plugins/intel_cpu/src/nodes/normalize.h @@ -108,8 +108,8 @@ class NormalizeL2 : public Node { bool cornerCase = false; float eps = 1e-10f; - InferenceEngine::Precision input_prec = InferenceEngine::Precision::UNSPECIFIED; - InferenceEngine::Precision output_prec = InferenceEngine::Precision::UNSPECIFIED; + ov::element::Type input_prec = ov::element::undefined; + ov::element::Type output_prec = ov::element::undefined; size_t src_data_size = 0lu; size_t dst_data_size = 0lu; }; diff --git a/src/plugins/intel_cpu/src/nodes/one_hot.cpp b/src/plugins/intel_cpu/src/nodes/one_hot.cpp index 140e2d23543c9f..15d3d2248c8484 100644 --- a/src/plugins/intel_cpu/src/nodes/one_hot.cpp +++ b/src/plugins/intel_cpu/src/nodes/one_hot.cpp @@ -94,7 +94,7 @@ void OneHot::initSupportedPrimitiveDescriptors() { // check a precision of the input tensor auto input_precision = getOriginalInputPrecisionAtPort(INDICES_ID); - if (input_precision != Precision::I32) { + if (input_precision != ov::element::i32) { OPENVINO_THROW(errorPrefix, " has incorrect input precision for the input. Only I32 is supported!"); } output_precision = getOriginalOutputPrecisionAtPort(0); diff --git a/src/plugins/intel_cpu/src/nodes/one_hot.h b/src/plugins/intel_cpu/src/nodes/one_hot.h index 6e10e2b9d18046..9be09ab34b4ce4 100644 --- a/src/plugins/intel_cpu/src/nodes/one_hot.h +++ b/src/plugins/intel_cpu/src/nodes/one_hot.h @@ -32,7 +32,7 @@ class OneHot : public Node { static bool isSupportedOperation(const std::shared_ptr& op, std::string& errorMessage) noexcept; private: - typedef InferenceEngine::PrecisionTrait::value_type in_type; + typedef element_type_traits::value_type in_type; struct OneHotContext { OneHot* nodePtr; @@ -50,7 +50,7 @@ class OneHot : public Node { mutable Dim depth = Shape::UNDEFINED_DIM; int32_t axis = -1; - InferenceEngine::Precision output_precision; + ov::element::Type output_precision; std::string errorPrefix; diff --git a/src/plugins/intel_cpu/src/nodes/pad.cpp b/src/plugins/intel_cpu/src/nodes/pad.cpp index 196e1662857ea5..cc9663d711d782 100644 --- a/src/plugins/intel_cpu/src/nodes/pad.cpp +++ b/src/plugins/intel_cpu/src/nodes/pad.cpp @@ -116,12 +116,11 @@ void Pad::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - std::vector supportedPrecisions = {InferenceEngine::Precision::FP32, InferenceEngine::Precision::I32, - InferenceEngine::Precision::BF16, InferenceEngine::Precision::FP16, - InferenceEngine::Precision::I8, InferenceEngine::Precision::U8}; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(DATA_ID); + std::vector supportedPrecisions = + {ov::element::f32, ov::element::i32, ov::element::bf16, ov::element::f16, ov::element::i8, ov::element::u8}; + ov::element::Type precision = getOriginalInputPrecisionAtPort(DATA_ID); if (std::find(supportedPrecisions.begin(), supportedPrecisions.end(), precision) == supportedPrecisions.end()) - precision = precision.is_float() ? InferenceEngine::Precision::FP32 : InferenceEngine::Precision::I32; + precision = precision.is_real() ? ov::element::f32 : ov::element::i32; const auto& inputDataShape = getInputShapeAtPort(DATA_ID); const size_t numOfDims = inputDataShape.getRank(); @@ -133,10 +132,10 @@ void Pad::initSupportedPrimitiveDescriptors() { auto& creatorsMap = BlockedDescCreator::getCommonCreators(); auto pushSupportedPrimitiveDescriptor = [&](LayoutType memoryFormat) { config.inConfs[0].setMemDesc(creatorsMap.at(memoryFormat)->createSharedDesc(precision, getInputShapeAtPort(DATA_ID))); - config.inConfs[1].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(Precision::I32, getInputShapeAtPort(PADS_BEGIN_ID))); - config.inConfs[2].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(Precision::I32, getInputShapeAtPort(PADS_END_ID))); + config.inConfs[1].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(ov::element::i32, getInputShapeAtPort(PADS_BEGIN_ID))); + config.inConfs[2].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(ov::element::i32, getInputShapeAtPort(PADS_END_ID))); if (isPadValueSpecified) - config.inConfs[3].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(Precision::FP32, getInputShapeAtPort(PAD_VALUE_ID))); + config.inConfs[3].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(ov::element::f32, getInputShapeAtPort(PAD_VALUE_ID))); config.outConfs[0].setMemDesc(creatorsMap.at(memoryFormat)->createSharedDesc(precision, getOutputShapeAtPort(DATA_ID))); supportedPrimitiveDescriptors.push_back({config, impl_desc_type::ref}); @@ -427,12 +426,12 @@ void Pad::PadExecutor::padConstant(const MemoryPtr& srcMemPtr, const MemoryPtr& PadConstantEmitter, ctx, params.attrs.prc, - OV_CASE(InferenceEngine::Precision::FP32, float), - OV_CASE(InferenceEngine::Precision::I32, int32_t), - OV_CASE(InferenceEngine::Precision::BF16, bfloat16_t), - OV_CASE(InferenceEngine::Precision::FP16, ov::float16), - OV_CASE(InferenceEngine::Precision::I8, int8_t), - OV_CASE(InferenceEngine::Precision::U8, uint8_t)); + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::i32, int32_t), + OV_CASE(ov::element::bf16, bfloat16_t), + OV_CASE(ov::element::f16, ov::float16), + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t)); } template diff --git a/src/plugins/intel_cpu/src/nodes/pad.h b/src/plugins/intel_cpu/src/nodes/pad.h index 42b0648b02905a..c59d17c4d8595b 100644 --- a/src/plugins/intel_cpu/src/nodes/pad.h +++ b/src/plugins/intel_cpu/src/nodes/pad.h @@ -46,7 +46,7 @@ class Pad : public Node { VectorIdxs padsEnd; int beginPadIdx = 0; int endPadIdx = 0; - InferenceEngine::Precision prc; + ov::element::Type prc; bool constPadValue = false; } attrs; diff --git a/src/plugins/intel_cpu/src/nodes/pooling.cpp b/src/plugins/intel_cpu/src/nodes/pooling.cpp index 9883f7a442d29b..ea684f3dccb9ea 100644 --- a/src/plugins/intel_cpu/src/nodes/pooling.cpp +++ b/src/plugins/intel_cpu/src/nodes/pooling.cpp @@ -264,8 +264,8 @@ void Pooling::getSupportedDescriptors() { if (getChildEdges().empty()) OPENVINO_THROW("Incorrect number of output edges for layer ", getName()); - InferenceEngine::Precision inputPrecision = getOriginalInputPrecisionAtPort(0); - InferenceEngine::Precision outputPrecision = getOriginalOutputPrecisionAtPort(0); + ov::element::Type inputPrecision = getOriginalInputPrecisionAtPort(0); + ov::element::Type outputPrecision = getOriginalOutputPrecisionAtPort(0); const auto &parentShape = getInputShapeAtPort(0); const auto &childShape = getOutputShapeAtPort(0); @@ -322,15 +322,15 @@ void Pooling::getSupportedDescriptors() { // WA: LPT transformation has WA which allows average pooling has I8/U8 output precision instead of FP32, // so we explicitly set output precision as FP32 - if (!one_of(outputPrecision, Precision::I8, Precision::BF16, Precision::FP16)) { + if (!one_of(outputPrecision, ov::element::i8, ov::element::bf16, ov::element::f16)) { if (getAlgorithm() == Algorithm::PoolingMax) { // oneDNN supports only equal precisions for input and output outputPrecision = inputPrecision; } else if (getAlgorithm() == Algorithm::PoolingAvg) { - outputPrecision = Precision::FP32; + outputPrecision = ov::element::f32; } } - if (one_of(inputPrecision, Precision::BF16, Precision::FP16)) { + if (one_of(inputPrecision, ov::element::bf16, ov::element::f16)) { outputPrecision = inputPrecision; } @@ -338,8 +338,8 @@ void Pooling::getSupportedDescriptors() { outputPrecision = fusedWith.back()->getOriginalOutputPrecisionAtPort(0); } - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(inputPrecision); - auto outputDataType = DnnlExtensionUtils::IEPrecisionToDataType(outputPrecision); + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(inputPrecision); + auto outputDataType = DnnlExtensionUtils::ElementTypeToDataType(outputPrecision); if ((inputRank < 3) || (inputRank > 5)) OPENVINO_THROW("Pooling layer. Unsupported mode. Only 3D, 4D and 5D blobs are supported as input."); @@ -349,7 +349,7 @@ void Pooling::getSupportedDescriptors() { initEffectiveAttributes(inShape, MemoryDescUtils::makeDummyShape(childShape)); - if (inputPrecision == Precision::I8 || inputPrecision == Precision::U8) { + if (inputPrecision == ov::element::i8 || inputPrecision == ov::element::u8) { // We have to extend i8i8_pooling_fwd_t from oneDNN to support BF16 output data type if (one_of(outputDataType, memory::data_type::bf16, memory::data_type::f16)) outputDataType = memory::data_type::f32; diff --git a/src/plugins/intel_cpu/src/nodes/priorbox.cpp b/src/plugins/intel_cpu/src/nodes/priorbox.cpp index 798980f679f3c2..b008eacbfbd3c9 100644 --- a/src/plugins/intel_cpu/src/nodes/priorbox.cpp +++ b/src/plugins/intel_cpu/src/nodes/priorbox.cpp @@ -132,8 +132,8 @@ void PriorBox::initSupportedPrimitiveDescriptors() { return; addSupportedPrimDesc( - {{LayoutType::ncsp, Precision::I32}, {LayoutType::ncsp, Precision::I32}}, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::i32}, {LayoutType::ncsp, ov::element::i32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/priorbox_clustered.cpp b/src/plugins/intel_cpu/src/nodes/priorbox_clustered.cpp index b7b0ec6a111c72..980c4682198849 100644 --- a/src/plugins/intel_cpu/src/nodes/priorbox_clustered.cpp +++ b/src/plugins/intel_cpu/src/nodes/priorbox_clustered.cpp @@ -82,8 +82,8 @@ void PriorBoxClustered::initSupportedPrimitiveDescriptors() { return; addSupportedPrimDesc( - {{LayoutType::ncsp, Precision::I32}, {LayoutType::ncsp, Precision::I32}}, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::i32}, {LayoutType::ncsp, ov::element::i32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/proposal.cpp b/src/plugins/intel_cpu/src/nodes/proposal.cpp index ad9dda3eebb4d3..d5bfc78e880d95 100644 --- a/src/plugins/intel_cpu/src/nodes/proposal.cpp +++ b/src/plugins/intel_cpu/src/nodes/proposal.cpp @@ -143,17 +143,17 @@ void Proposal::initSupportedPrimitiveDescriptors() { return; if (store_prob) { - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } else { - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } } diff --git a/src/plugins/intel_cpu/src/nodes/psroi_pooling.cpp b/src/plugins/intel_cpu/src/nodes/psroi_pooling.cpp index 14e72c5c973f00..34afa7b017a16a 100644 --- a/src/plugins/intel_cpu/src/nodes/psroi_pooling.cpp +++ b/src/plugins/intel_cpu/src/nodes/psroi_pooling.cpp @@ -146,7 +146,7 @@ void PSROIPooling::initSupportedPrimitiveDescriptors() { impl_type = impl_desc_type::ref; } - auto dataPrecision = getOriginalInputPrecisionAtPort(0) == Precision::BF16 ? Precision::BF16 : Precision::FP32; + auto dataPrecision = getOriginalInputPrecisionAtPort(0) == ov::element::bf16 ? ov::element::bf16 : ov::element::f32; if (getAlgorithm() == Algorithm::PSROIPoolingAverage || getAlgorithm() == Algorithm::PSROIPoolingBilinear) { std::vector> dataFomats{ @@ -157,18 +157,18 @@ void PSROIPooling::initSupportedPrimitiveDescriptors() { }; for (const auto &df : dataFomats) { - addSupportedPrimDesc({{df.first, dataPrecision}, {LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{df.first, dataPrecision}, {LayoutType::ncsp, ov::element::f32}}, {{df.second, dataPrecision}}, impl_type); } } else if (getAlgorithm() == Algorithm::PSROIPoolingBilinearDeformable && noTrans) { - addSupportedPrimDesc({{LayoutType::ncsp, dataPrecision}, {LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, dataPrecision}, {LayoutType::ncsp, ov::element::f32}}, {{LayoutType::ncsp, dataPrecision}}, impl_type); } else if (getAlgorithm() == Algorithm::PSROIPoolingBilinearDeformable) { addSupportedPrimDesc({{LayoutType::ncsp, dataPrecision}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::FP32}}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::f32}}, {{LayoutType::ncsp, dataPrecision}}, impl_type); } @@ -555,10 +555,10 @@ void PSROIPooling::execute(dnnl::stream strm) { auto inputPrec = getParentEdgesAtPort(0)[0]->getMemory().getDesc().getPrecision(); auto outputPrec = getChildEdgesAtPort(0)[0]->getMemory().getDesc().getPrecision(); - if (!((inputPrec == Precision::BF16 && outputPrec == Precision::BF16) || - (inputPrec == Precision::FP32 && outputPrec == Precision::FP32))) { - OPENVINO_THROW(errorPrefix + " has different precisions on input: " + inputPrec.name() + - " and output: " + outputPrec.name()); + if (!((inputPrec == ov::element::bf16 && outputPrec == ov::element::bf16) || + (inputPrec == ov::element::f32 && outputPrec == ov::element::f32))) { + OPENVINO_THROW(errorPrefix + " has different precisions on input: " + inputPrec.get_type_name() + + " and output: " + outputPrec.get_type_name()); } PSROIPoolingContext ctx = { @@ -566,8 +566,8 @@ void PSROIPooling::execute(dnnl::stream strm) { }; OV_SWITCH(intel_cpu, PSROIPoolingExecute, ctx, std::tie(inputPrec, outputPrec), - OV_CASE2(Precision::FP32, Precision::FP32, float, float), - OV_CASE2(Precision::BF16, Precision::BF16, bfloat16_t, bfloat16_t)) + OV_CASE2(ov::element::f32, ov::element::f32, float, float), + OV_CASE2(ov::element::bf16, ov::element::bf16, bfloat16_t, bfloat16_t)) } bool PSROIPooling::created() const { diff --git a/src/plugins/intel_cpu/src/nodes/random_uniform.cpp b/src/plugins/intel_cpu/src/nodes/random_uniform.cpp index 49584ae62dd653..a521ce5a48e902 100644 --- a/src/plugins/intel_cpu/src/nodes/random_uniform.cpp +++ b/src/plugins/intel_cpu/src/nodes/random_uniform.cpp @@ -65,20 +65,20 @@ void RandomUniform::getSupportedDescriptors() { void RandomUniform::initSupportedPrimitiveDescriptors() { auto shape_prc = getOriginalInputPrecisionAtPort(SHAPE); - if (!one_of(shape_prc, InferenceEngine::Precision::I32, InferenceEngine::Precision::I64)) { - shape_prc = InferenceEngine::Precision::I32; + if (!one_of(shape_prc, ov::element::i32, ov::element::i64)) { + shape_prc = ov::element::i32; } auto out_prc = getOriginalOutputPrecisionAtPort(0); - if (out_prc.is_float() && ((m_algo == PHILOX && - !one_of(out_prc, InferenceEngine::Precision::FP32, InferenceEngine::Precision::FP16, InferenceEngine::Precision::BF16)) || - (m_algo == STL && !one_of(out_prc, InferenceEngine::Precision::FP32)))) { - out_prc = InferenceEngine::Precision::FP32; + if (out_prc.is_real() && ((m_algo == PHILOX && + !one_of(out_prc, ov::element::f32, ov::element::f16, ov::element::bf16)) || + (m_algo == STL && !one_of(out_prc, ov::element::f32)))) { + out_prc = ov::element::f32; } - if (!out_prc.is_float() && !one_of(out_prc, InferenceEngine::Precision::I32, InferenceEngine::Precision::I64)) { - out_prc = InferenceEngine::Precision::I32; + if (!out_prc.is_real() && !one_of(out_prc, ov::element::i32, ov::element::i64)) { + out_prc = ov::element::i32; } - m_output_prc = InferenceEngine::details::convertPrecision(out_prc); + m_output_prc = out_prc; addSupportedPrimDesc({{LayoutType::ncsp, shape_prc, m_const_inputs[SHAPE]}, {LayoutType::ncsp, out_prc, m_const_inputs[MIN_VAL]}, @@ -504,8 +504,8 @@ std::string RandomUniform::getPrimitiveDescriptorType() const { str_type = "undef"; if (selectedPrimitiveDesc) { - if (selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision() != InferenceEngine::Precision::U8) { - str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision().name()); + if (selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision() != ov::element::u8) { + str_type += "_" + std::string(selectedPrimitiveDesc->getConfig().outConfs[0].getMemDesc()->getPrecision().get_type_name()); } else { str_type += "_I8"; } diff --git a/src/plugins/intel_cpu/src/nodes/range.cpp b/src/plugins/intel_cpu/src/nodes/range.cpp index 383a696fb51117..bd329484d06d18 100644 --- a/src/plugins/intel_cpu/src/nodes/range.cpp +++ b/src/plugins/intel_cpu/src/nodes/range.cpp @@ -63,19 +63,19 @@ void Range::initSupportedPrimitiveDescriptors() { std::vector inDataConf; std::vector outDataConf; - if (!(getOriginalInputPrecisionAtPort(RANGE_START) == Precision::I32 && - getOriginalInputPrecisionAtPort(RANGE_LIMIT) == Precision::I32 && - getOriginalInputPrecisionAtPort(RANGE_DELTA) == Precision::I32 && - getOriginalOutputPrecisionAtPort(0) == Precision::I32) && - !(getOriginalInputPrecisionAtPort(RANGE_START) == Precision::FP32 && - getOriginalInputPrecisionAtPort(RANGE_LIMIT) == Precision::FP32 && - getOriginalInputPrecisionAtPort(RANGE_DELTA) == Precision::FP32 && - getOriginalOutputPrecisionAtPort(0) == Precision::FP32)) { + if (!(getOriginalInputPrecisionAtPort(RANGE_START) == ov::element::i32 && + getOriginalInputPrecisionAtPort(RANGE_LIMIT) == ov::element::i32 && + getOriginalInputPrecisionAtPort(RANGE_DELTA) == ov::element::i32 && + getOriginalOutputPrecisionAtPort(0) == ov::element::i32) && + !(getOriginalInputPrecisionAtPort(RANGE_START) == ov::element::f32 && + getOriginalInputPrecisionAtPort(RANGE_LIMIT) == ov::element::f32 && + getOriginalInputPrecisionAtPort(RANGE_DELTA) == ov::element::f32 && + getOriginalOutputPrecisionAtPort(0) == ov::element::f32)) { inDataConf.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); ++i) - inDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + inDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); outDataConf.reserve(1); - outDataConf.emplace_back(LayoutType::ncsp, Precision::FP32); + outDataConf.emplace_back(LayoutType::ncsp, ov::element::f32); addSupportedPrimDesc(inDataConf, outDataConf, impl_desc_type::ref_any); } else { inDataConf.reserve(inputShapes.size()); @@ -94,10 +94,10 @@ void Range::executeDynamicImpl(dnnl::stream strm) { void Range::execute(dnnl::stream strm) { StatusCode retcode = OK; switch (getParentEdgeAt(0)->getMemory().getDesc().getPrecision()) { - case Precision::FP32: + case ov::element::f32: retcode = rangeKernel(); break; - case Precision::I32: + case ov::element::i32: retcode = rangeKernel(); break; default: diff --git a/src/plugins/intel_cpu/src/nodes/rdft.cpp b/src/plugins/intel_cpu/src/nodes/rdft.cpp index 57c633ca130647..390ffa9356b7de 100644 --- a/src/plugins/intel_cpu/src/nodes/rdft.cpp +++ b/src/plugins/intel_cpu/src/nodes/rdft.cpp @@ -13,8 +13,6 @@ #include "rdft.h" #include "openvino/core/parallel.hpp" -#include "ie_precision.hpp" - #include "utils/general_utils.h" #include "common/cpu_memcpy.h" #include @@ -127,30 +125,30 @@ void RDFT::initSupportedPrimitiveDescriptors() { return; const auto& dataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); - if (!dataPrecision.is_float()) { - OPENVINO_THROW(errorMsgPrefix, " has unsupported 'data' input precision: ", dataPrecision.name()); + if (!dataPrecision.is_real()) { + OPENVINO_THROW(errorMsgPrefix, " has unsupported 'data' input precision: ", dataPrecision.get_type_name()); } const auto& axesPrecision = getOriginalInputPrecisionAtPort(AXES_INDEX); - if (axesPrecision != Precision::I32 && axesPrecision != Precision::I64) { - OPENVINO_THROW(errorMsgPrefix, " has unsupported 'axes' input precision: ", axesPrecision.name()); + if (axesPrecision != ov::element::i32 && axesPrecision != ov::element::i64) { + OPENVINO_THROW(errorMsgPrefix, " has unsupported 'axes' input precision: ", axesPrecision.get_type_name()); } if (inputShapes.size() > SIGNAL_SIZE_INDEX) { const auto& signalSizePrecision = getOriginalInputPrecisionAtPort(SIGNAL_SIZE_INDEX); - if (signalSizePrecision != Precision::I32 && signalSizePrecision != Precision::I64) { + if (signalSizePrecision != ov::element::i32 && signalSizePrecision != ov::element::i64) { OPENVINO_THROW(errorMsgPrefix, " has unsupported 'signalSize' input precision: ", - signalSizePrecision.name()); + signalSizePrecision.get_type_name()); } } - std::vector configurators({{LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}}); + std::vector configurators({{LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}}); if (inputShapes.size() > SIGNAL_SIZE_INDEX) - configurators.push_back({LayoutType::ncsp, Precision::I32}); + configurators.push_back({LayoutType::ncsp, ov::element::i32}); - addSupportedPrimDesc(configurators, {{LayoutType::ncsp, Precision::FP32}}, impl_desc_type::ref_any); + addSupportedPrimDesc(configurators, {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } void RDFT::execute(dnnl::stream strm) { diff --git a/src/plugins/intel_cpu/src/nodes/reduce.cpp b/src/plugins/intel_cpu/src/nodes/reduce.cpp index 9c6e7d91bd896b..04a200ab18fa8d 100644 --- a/src/plugins/intel_cpu/src/nodes/reduce.cpp +++ b/src/plugins/intel_cpu/src/nodes/reduce.cpp @@ -1899,7 +1899,7 @@ void Reduce::initSupportedPrimitiveDescriptors() { // If the post ops node has a lower precision for such modes, working buffer with original precision is needed, // in order to avoid accuracy loss. auto fused_prec = fusedWith[fusedWith.size() - 1]->getOriginalOutputPrecisionAtPort(0); - if (output_prec == Precision::FP32 && fused_prec != Precision::FP32) { + if (output_prec == ov::element::f32 && fused_prec != ov::element::f32) { if (algorithm != Algorithm::ReduceAnd && algorithm != Algorithm::ReduceOr && algorithm != Algorithm::ReduceMin && algorithm != Algorithm::ReduceMax) { fuse_low_precision = true; @@ -1918,16 +1918,16 @@ void Reduce::initSupportedPrimitiveDescriptors() { if (jit_mode) { // Since in jit mode we use the output memory as an intermediate accumulator for certain reduce modes, we can't use BF16/FP16 output precision due to // the possible accuracy loss. Therefore, for such mods, we will change the output precision to FP32. - if (Precision::BF16 == output_prec) { + if (ov::element::bf16 == output_prec) { if (!mayiuse(avx512_core) || is_precision_sensitive_reduce(algorithm)) - output_prec = Precision::FP32; - } else if (Precision::FP16 == output_prec) { + output_prec = ov::element::f32; + } else if (ov::element::f16 == output_prec) { if (!mayiuse(cpu::x64::avx2) || is_precision_sensitive_reduce(algorithm)) - output_prec = Precision::FP32; + output_prec = ov::element::f32; } } - intermediate_prec = fuse_low_precision ? Precision(Precision::FP32) : output_prec; + intermediate_prec = fuse_low_precision ? ov::element::f32 : output_prec; precision_change = input_prec != intermediate_prec; support_split = algorithm != Algorithm::ReduceL2 && algorithm != Algorithm::ReduceLogSumExp && algorithm != Algorithm::ReduceSumSquare; @@ -1948,10 +1948,10 @@ void Reduce::initSupportedPrimitiveDescriptors() { auto& creatorsMap = BlockedDescCreator::getCommonCreators(); - auto pushDesc = [&](LayoutType inFormat, LayoutType outFormat, InferenceEngine::Precision inPrecision, - InferenceEngine::Precision outPrecision, impl_desc_type impl_type, bool useAclExecutor = false) { + auto pushDesc = [&](LayoutType inFormat, LayoutType outFormat, ov::element::Type inPrecision, + ov::element::Type outPrecision, impl_desc_type impl_type, bool useAclExecutor = false) { config.inConfs[REDUCE_DATA].setMemDesc(creatorsMap.at(inFormat)->createSharedDesc(inPrecision, getInputShapeAtPort(REDUCE_DATA))); - config.inConfs[REDUCE_INDEXES].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(InferenceEngine::Precision::I32, + config.inConfs[REDUCE_INDEXES].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc(ov::element::i32, getInputShapeAtPort(REDUCE_INDEXES))); config.outConfs[0].setMemDesc(creatorsMap.at(outFormat)->createSharedDesc(outPrecision, getOutputShapeAtPort(0))); @@ -2021,7 +2021,7 @@ void Reduce::initSupportedPrimitiveDescriptors() { } } } else { - pushDesc(LayoutType::ncsp, LayoutType::ncsp, InferenceEngine::Precision::FP32, InferenceEngine::Precision::FP32, impl_desc_type::ref); + pushDesc(LayoutType::ncsp, LayoutType::ncsp, ov::element::f32, ov::element::f32, impl_desc_type::ref); } } @@ -2129,8 +2129,8 @@ void Reduce::createPrimitive() { auto selectedPD = getSelectedPrimitiveDescriptor(); jcp = jit_reduce_config_params(); - jcp.src_dt = DnnlExtensionUtils::IEPrecisionToDataType(selectedPD->getConfig().inConfs[REDUCE_DATA].getMemDesc()->getPrecision()); - jcp.dst_dt = DnnlExtensionUtils::IEPrecisionToDataType(selectedPD->getConfig().outConfs[0].getMemDesc()->getPrecision()); + jcp.src_dt = DnnlExtensionUtils::ElementTypeToDataType(selectedPD->getConfig().inConfs[REDUCE_DATA].getMemDesc()->getPrecision()); + jcp.dst_dt = DnnlExtensionUtils::ElementTypeToDataType(selectedPD->getConfig().outConfs[0].getMemDesc()->getPrecision()); jcp.src_data_size = DnnlExtensionUtils::sizeOfDataType(jcp.src_dt); jcp.dst_data_size = DnnlExtensionUtils::sizeOfDataType(jcp.dst_dt); jcp.layout = layout; @@ -2156,7 +2156,7 @@ void Reduce::createPrimitive() { } auto reduce_jcp = jcp; - reduce_jcp.dst_dt = fuse_low_precision ? DnnlExtensionUtils::IEPrecisionToDataType(intermediate_prec) : jcp.dst_dt; + reduce_jcp.dst_dt = fuse_low_precision ? DnnlExtensionUtils::ElementTypeToDataType(intermediate_prec) : jcp.dst_dt; reduce_jcp.dst_data_size = DnnlExtensionUtils::sizeOfDataType(reduce_jcp.dst_dt); create_reduce_kernel(reduce_kernel, reduce_jcp); @@ -2889,64 +2889,64 @@ inline void Reduce::init_dst_data(uint8_t *out_ptr, size_t dst_size) { break; case Algorithm::ReduceAnd: case Algorithm::ReduceProd: - if (output_prec == Precision::FP32) { + if (output_prec == ov::element::f32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); - } else if (output_prec == Precision::I32) { + } else if (output_prec == ov::element::i32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); - } else if (output_prec == Precision::BF16) { + } else if (output_prec == ov::element::bf16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); - } else if (output_prec == Precision::FP16) { + } else if (output_prec == ov::element::f16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); - } else if (output_prec == Precision::U8) { + } else if (output_prec == ov::element::u8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); - } else if (output_prec == Precision::I8) { + } else if (output_prec == ov::element::i8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = static_cast(1); }); } break; case Algorithm::ReduceMax: - if (output_prec == Precision::FP32) { + if (output_prec == ov::element::f32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::lowest(); }); - } else if (output_prec == Precision::I32) { + } else if (output_prec == ov::element::i32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::min(); }); - } else if (output_prec == Precision::BF16) { + } else if (output_prec == ov::element::bf16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::lowest(); }); - } else if (output_prec == Precision::FP16) { + } else if (output_prec == ov::element::f16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::lowest(); }); - } else if (output_prec == Precision::U8) { + } else if (output_prec == ov::element::u8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::min(); }); - } else if (output_prec == Precision::I8) { + } else if (output_prec == ov::element::i8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::min(); }); } break; case Algorithm::ReduceMin: - if (output_prec == Precision::FP32) { + if (output_prec == ov::element::f32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); - } else if (output_prec == Precision::I32) { + } else if (output_prec == ov::element::i32) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); - } else if (output_prec == Precision::BF16) { + } else if (output_prec == ov::element::bf16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); - } else if (output_prec == Precision::FP16) { + } else if (output_prec == ov::element::f16) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); - } else if (output_prec == Precision::U8) { + } else if (output_prec == ov::element::u8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); - } else if (output_prec == Precision::I8) { + } else if (output_prec == ov::element::i8) { auto out_p = reinterpret_cast(out_ptr); parallel_for(dst_size / dst_data_size, [&](size_t i) { out_p[i] = std::numeric_limits::max(); }); } @@ -2962,7 +2962,7 @@ inline void Reduce::create_hybrid_working_memory() { : (rank == 4 ? (mayiuse(cpu::x64::avx512_core) ? memory::format_tag::nChw16c : memory::format_tag::nChw8c) : (mayiuse(cpu::x64::avx512_core) ? memory::format_tag::nCdhw16c : memory::format_tag::nCdhw8c)); auto prc_dims = rank == 4 ? std::vector{OB, OC, OH, OW} : std::vector{OB, OC, OD, OH, OW}; - auto desc = dnnl::memory::desc(DnnlExtensionUtils::convertToDnnlDims(prc_dims), DnnlExtensionUtils::IEPrecisionToDataType(output_prec), format); + auto desc = dnnl::memory::desc(DnnlExtensionUtils::convertToDnnlDims(prc_dims), DnnlExtensionUtils::ElementTypeToDataType(output_prec), format); prc_mem = dnnl::memory(desc, getEngine()); dst_size = desc.get_size(); } @@ -3314,14 +3314,14 @@ std::vector Reduce::update_src_dims() { return reduce_axes; } -bool Reduce::canApplyJIT(const Precision &input_prec, const Precision &output_prec) const { - static const Precision supportedPrecisions[] = { - Precision::FP32, - Precision::FP16, - Precision::BF16, - Precision::I32, - Precision::I8, - Precision::U8 +bool Reduce::canApplyJIT(const ov::element::Type &input_prec, const ov::element::Type &output_prec) const { + static const ov::element::Type supportedPrecisions[] = { + ov::element::f32, + ov::element::f16, + ov::element::bf16, + ov::element::i32, + ov::element::i8, + ov::element::u8 }; return (mayiuse(cpu::x64::sse41)) && (getInputShapeAtPort(REDUCE_DATA).getRank() <= 5 || jit_beyond_5D) && @@ -3347,8 +3347,8 @@ int Reduce::getFusingAxis() const { } bool Reduce::canFuse(const NodePtr& node) const { - Precision input_prec = getOriginalInputPrecisionAtPort(REDUCE_DATA); - Precision output_prec = getOriginalOutputPrecisionAtPort(0); + ov::element::Type input_prec = getOriginalInputPrecisionAtPort(REDUCE_DATA); + ov::element::Type output_prec = getOriginalOutputPrecisionAtPort(0); if (!canApplyJIT(input_prec, output_prec) || jit_beyond_5D || algorithm == Algorithm::ReduceAnd || algorithm == Algorithm::ReduceOr) { return false; } diff --git a/src/plugins/intel_cpu/src/nodes/reduce.h b/src/plugins/intel_cpu/src/nodes/reduce.h index 9c8d680c32315e..9e69cee8ce7dbb 100644 --- a/src/plugins/intel_cpu/src/nodes/reduce.h +++ b/src/plugins/intel_cpu/src/nodes/reduce.h @@ -133,7 +133,7 @@ class Reduce : public Node { void setPostOps(dnnl::primitive_attr &attr, const VectorDims &postOpDims, bool initWeights = false); void setJITBeyond5D(); std::vector update_src_dims(); - bool canApplyJIT(const InferenceEngine::Precision &input_prec, const InferenceEngine::Precision &output_prec) const; + bool canApplyJIT(const ov::element::Type &input_prec, const ov::element::Type &output_prec) const; size_t blk_size; static const size_t REDUCE_DATA = 0; @@ -162,7 +162,7 @@ class Reduce : public Node { size_t reduce_stride; uint8_t *tmp_ptr; ReduceLayoutType layout; - InferenceEngine::Precision input_prec, output_prec, intermediate_prec, tmp_prec; + ov::element::Type input_prec, output_prec, intermediate_prec, tmp_prec; VectorDims src_dims; VectorDims process_dst_dims; VectorDims axes_for_reduction; diff --git a/src/plugins/intel_cpu/src/nodes/reference.cpp b/src/plugins/intel_cpu/src/nodes/reference.cpp index 631e3a89dc5224..b7e79de41fcd4a 100644 --- a/src/plugins/intel_cpu/src/nodes/reference.cpp +++ b/src/plugins/intel_cpu/src/nodes/reference.cpp @@ -36,13 +36,13 @@ void Reference::initSupportedPrimitiveDescriptors() { std::vector inputConfigurators; inputConfigurators.reserve(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); i++) { - inputConfigurators.emplace_back(LayoutType::ncsp, convertPrecision(ovCoreNode->get_input_element_type(i)), inputShapes[i]); + inputConfigurators.emplace_back(LayoutType::ncsp, ovCoreNode->get_input_element_type(i), inputShapes[i]); } std::vector outputConfigurators; outputConfigurators.reserve(inputShapes.size()); for (size_t i = 0; i < outputShapes.size(); i++) { - outputConfigurators.emplace_back(LayoutType::ncsp, convertPrecision(ovCoreNode->get_output_element_type(i)), outputShapes[i]); + outputConfigurators.emplace_back(LayoutType::ncsp, ovCoreNode->get_output_element_type(i), outputShapes[i]); } addSupportedPrimDesc(inputConfigurators, outputConfigurators, impl_desc_type::ref); diff --git a/src/plugins/intel_cpu/src/nodes/region_yolo.cpp b/src/plugins/intel_cpu/src/nodes/region_yolo.cpp index 1e9211ddb04f15..88c61f30ea30a6 100644 --- a/src/plugins/intel_cpu/src/nodes/region_yolo.cpp +++ b/src/plugins/intel_cpu/src/nodes/region_yolo.cpp @@ -173,12 +173,12 @@ struct jit_uni_logistic_kernel_f32 : public jit_uni_logistic_kernel, public jit_ int float_1 = 0x3f800000; // 1 // 1.0f } vals_for_logistic_activate; - inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, InferenceEngine::Precision src_dt) { + inline void load_vector(Vmm vmm_src, const Xbyak::Address &op, ov::element::Type src_dt) { switch (src_dt) { - case InferenceEngine::Precision::FP32: + case ov::element::f32: uni_vmovups(vmm_src, op); break; - case InferenceEngine::Precision::BF16: + case ov::element::bf16: vpmovzxwd(vmm_src, op); uni_vpslld(vmm_src, vmm_src, 16); break; @@ -186,14 +186,14 @@ struct jit_uni_logistic_kernel_f32 : public jit_uni_logistic_kernel, public jit_ assert(!"unknown src_dt"); } } - inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, InferenceEngine::Precision dst_dt) { + inline void store_vector(const Xbyak::Address &op, Vmm vmm_dst, ov::element::Type dst_dt) { Xbyak::Ymm ymm_dst = Xbyak::Ymm(vmm_dst.getIdx()); switch (dst_dt) { - case InferenceEngine::Precision::FP32: + case ov::element::f32: uni_vmovups(op, vmm_dst); break; - case InferenceEngine::Precision::BF16: + case ov::element::bf16: uni_vcvtneps2bf16->emit_code({static_cast(vmm_dst.getIdx())}, {static_cast(ymm_dst.getIdx())}); vmovdqu16(op, ymm_dst); break; @@ -201,12 +201,12 @@ struct jit_uni_logistic_kernel_f32 : public jit_uni_logistic_kernel, public jit_ assert(!"unknown dst_dt"); } } - inline void load_scalar(Xbyak::Xmm xmm_src, const Xbyak::Address &op, InferenceEngine::Precision src_dt) { + inline void load_scalar(Xbyak::Xmm xmm_src, const Xbyak::Address &op, ov::element::Type src_dt) { switch (src_dt) { - case InferenceEngine::Precision::FP32: + case ov::element::f32: uni_vmovss(xmm_src, op); break; - case InferenceEngine::Precision::BF16: + case ov::element::bf16: uni_vpinsrw(xmm_src, xmm_src, op, 0x0); uni_vpslld(xmm_src, xmm_src, 16); break; @@ -214,12 +214,12 @@ struct jit_uni_logistic_kernel_f32 : public jit_uni_logistic_kernel, public jit_ assert(!"unknown src_dt"); } } - inline void store_scalar(const Xbyak::Address &op, Xbyak::Xmm xmm_dst, InferenceEngine::Precision dst_dt) { + inline void store_scalar(const Xbyak::Address &op, Xbyak::Xmm xmm_dst, ov::element::Type dst_dt) { switch (dst_dt) { - case InferenceEngine::Precision::FP32: + case ov::element::f32: uni_vmovss(op, xmm_dst); break; - case InferenceEngine::Precision::BF16: + case ov::element::bf16: uni_vpsrld(xmm_dst, xmm_dst, 16); uni_vpextrw(op, xmm_dst, 0x0); break; @@ -274,17 +274,17 @@ void RegionYolo::initSupportedPrimitiveDescriptors() { input_prec = getOriginalInputPrecisionAtPort(0); output_prec = getOriginalOutputPrecisionAtPort(0); - if (input_prec != Precision::FP32 && input_prec != Precision::BF16) { - input_prec = Precision::FP32; + if (input_prec != ov::element::f32 && input_prec != ov::element::bf16) { + input_prec = ov::element::f32; } - if (output_prec != Precision::FP32 && output_prec != Precision::BF16) { - output_prec = Precision::FP32; + if (output_prec != ov::element::f32 && output_prec != ov::element::bf16) { + output_prec = ov::element::f32; } - if (Precision::BF16 == output_prec) { + if (ov::element::bf16 == output_prec) { if (!mayiuse(avx512_core)) { - output_prec = Precision::FP32; + output_prec = ov::element::f32; } } @@ -363,18 +363,18 @@ inline void RegionYolo::calculate_logistic(size_t start_index, int count, uint8_ (*logistic_kernel)(&arg); }); } else { - if (Precision::FP32 == output_prec) { + if (ov::element::f32 == output_prec) { auto float_dst_data = reinterpret_cast(dst_data); for (int i = 0; i < count; i++) { float_dst_data[i + start_index] = logistic_scalar(float_dst_data[i + start_index]); } - } else if (Precision::BF16 == output_prec) { + } else if (ov::element::bf16 == output_prec) { auto bf16_dst_data = reinterpret_cast(dst_data); for (int i = 0; i < count; i++) { bf16_dst_data[i + start_index] = logistic_scalar(bf16_dst_data[i + start_index]); } } else { - OPENVINO_THROW("Unsupported precision configuration outPrc=", output_prec.name()); + OPENVINO_THROW("Unsupported precision configuration outPrc=", output_prec.get_type_name()); } } } diff --git a/src/plugins/intel_cpu/src/nodes/region_yolo.h b/src/plugins/intel_cpu/src/nodes/region_yolo.h index 257edb862a8897..fe038dfc58ea9e 100644 --- a/src/plugins/intel_cpu/src/nodes/region_yolo.h +++ b/src/plugins/intel_cpu/src/nodes/region_yolo.h @@ -22,8 +22,8 @@ struct jit_args_logistic { }; struct jit_logistic_config_params { - InferenceEngine::Precision src_dt; - InferenceEngine::Precision dst_dt; + ov::element::Type src_dt; + ov::element::Type dst_dt; unsigned src_data_size = 0; unsigned dst_data_size = 0; }; @@ -61,7 +61,7 @@ class RegionYolo : public Node { int num; float do_softmax; std::vector mask; - InferenceEngine::Precision input_prec, output_prec; + ov::element::Type input_prec, output_prec; std::string errorPrefix; diff --git a/src/plugins/intel_cpu/src/nodes/reorder.cpp b/src/plugins/intel_cpu/src/nodes/reorder.cpp index 079cc8daae0f17..2d0f2bad9cab1d 100644 --- a/src/plugins/intel_cpu/src/nodes/reorder.cpp +++ b/src/plugins/intel_cpu/src/nodes/reorder.cpp @@ -91,8 +91,8 @@ void Reorder::initSupportedPrimitiveDescriptors() { if (one_of(inShape.getRank(), 4u, 5u) && config.inConfs[0].getMemDesc()->hasLayoutType(LayoutType::nspc) && config.outConfs[0].getMemDesc()->hasLayoutType(LayoutType::ncsp) && - config.inConfs[0].getMemDesc()->getPrecision() == Precision::FP32 && - config.outConfs[0].getMemDesc()->getPrecision() == Precision::FP32) { + config.inConfs[0].getMemDesc()->getPrecision() == ov::element::f32 && + config.outConfs[0].getMemDesc()->getPrecision() == ov::element::f32) { // oneDNN JIT reorder shows bad perf for nspc to ncsp reorder case so we fallback on simple c++ implementation isNspc2NcspCase = true; } else if (!impl::cpu::x64::mayiuse(impl::cpu::x64::avx2) && @@ -205,7 +205,7 @@ void Reorder::prepareParams() { #if defined(OV_CPU_ARM_ENABLE_FP16) // @todo current oneDNN v3.2 lacks optimized jit implementation for fp16 reorders. // Use transpose executor as a temporary WA. - if (everyone_is(Precision::FP16, parentDesc->getPrecision(), childDesc->getPrecision()) && + if (everyone_is(ov::element::f16, parentDesc->getPrecision(), childDesc->getPrecision()) && ((parentDesc->hasLayoutType(LayoutType::ncsp) && childDesc->hasLayoutType(LayoutType::nspc)) || (parentDesc->hasLayoutType(LayoutType::nspc) && childDesc->hasLayoutType(LayoutType::ncsp))) && one_of(parentDesc->getShape().getRank(), 3, 4)) { @@ -427,8 +427,8 @@ void Reorder::execute(dnnl::stream strm) { std::string Reorder::getReorderArgs(const MemoryDesc &parentDesc, const MemoryDesc &childDesc) { std::string inArgs, outArgs; if (parentDesc.getPrecision() != childDesc.getPrecision()) { - inArgs += (inArgs.empty() ? "" : "_") + std::string(parentDesc.getPrecision().name()); - outArgs += (outArgs.empty() ? "" : "_") + std::string(childDesc.getPrecision().name()); + inArgs += (inArgs.empty() ? "" : "_") + std::string(parentDesc.getPrecision().get_type_name()); + outArgs += (outArgs.empty() ? "" : "_") + std::string(childDesc.getPrecision().get_type_name()); } auto formatSrc = parentDesc.serializeFormat(); auto formatDst = childDesc.serializeFormat(); @@ -471,8 +471,8 @@ void Reorder::reorderData(const IMemory &input, const IMemory &output, MultiCach auto data = static_cast(input.getData()); tmpBuff.resize(input.getSize()); - const auto outPrc = DnnlExtensionUtils::DataTypeToIEPrecision(output.getDataType()); - cpu_convert(data, tmpBuff.data(), DnnlExtensionUtils::DataTypeToIEPrecision(input.getDataType()), + const auto outPrc = DnnlExtensionUtils::DataTypeToElementType(output.getDataType()); + cpu_convert(data, tmpBuff.data(), DnnlExtensionUtils::DataTypeToElementType(input.getDataType()), outPrc, input.getSize() / input.getDesc().getPrecision().size()); auto tmpDesc = input.getDesc().cloneWithNewPrecision(outPrc); diff --git a/src/plugins/intel_cpu/src/nodes/reorg_yolo.cpp b/src/plugins/intel_cpu/src/nodes/reorg_yolo.cpp index ea60a936a3301a..16f217b710e896 100644 --- a/src/plugins/intel_cpu/src/nodes/reorg_yolo.cpp +++ b/src/plugins/intel_cpu/src/nodes/reorg_yolo.cpp @@ -49,8 +49,8 @@ void ReorgYolo::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}}, - {{LayoutType::ncsp, Precision::FP32}}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } diff --git a/src/plugins/intel_cpu/src/nodes/reshape.cpp b/src/plugins/intel_cpu/src/nodes/reshape.cpp index 4b4e50f1c7b4d8..d399b5bb5b58aa 100644 --- a/src/plugins/intel_cpu/src/nodes/reshape.cpp +++ b/src/plugins/intel_cpu/src/nodes/reshape.cpp @@ -95,9 +95,9 @@ void Reshape::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision inPrec = getOriginalInputPrecisionAtPort(0); - InferenceEngine::Precision outPrec = getOriginalOutputPrecisionAtPort(0); - InferenceEngine::Precision secondInPrc = InferenceEngine::Precision::I32; + ov::element::Type inPrec = getOriginalInputPrecisionAtPort(0); + ov::element::Type outPrec = getOriginalOutputPrecisionAtPort(0); + ov::element::Type secondInPrc = ov::element::i32; // Current reshape implementation is simple memory reinterpret, // same precision on input and output is required diff --git a/src/plugins/intel_cpu/src/nodes/reverse_sequence.cpp b/src/plugins/intel_cpu/src/nodes/reverse_sequence.cpp index c5c94818876f14..b8e233bf92d19c 100644 --- a/src/plugins/intel_cpu/src/nodes/reverse_sequence.cpp +++ b/src/plugins/intel_cpu/src/nodes/reverse_sequence.cpp @@ -72,12 +72,12 @@ void ReverseSequence::initSupportedPrimitiveDescriptors() { return; lengthsPrecision = getOriginalInputPrecisionAtPort(REVERSESEQUENCE_LENGTHS); - if (lengthsPrecision != Precision::I32 && lengthsPrecision != Precision::FP32) - lengthsPrecision = Precision::I32; + if (lengthsPrecision != ov::element::i32 && lengthsPrecision != ov::element::f32) + lengthsPrecision = ov::element::i32; - addSupportedPrimDesc({{LayoutType::ncsp, Precision::FP32}, + addSupportedPrimDesc({{LayoutType::ncsp, ov::element::f32}, {LayoutType::ncsp, lengthsPrecision}}, - {{LayoutType::ncsp, Precision::FP32}}, + {{LayoutType::ncsp, ov::element::f32}}, impl_desc_type::ref_any); } @@ -172,10 +172,10 @@ void ReverseSequence::execute(dnnl::stream strm) { OPENVINO_THROW(errorPrefix, " has no compiled executor"); const auto precision = getParentEdgeAt(REVERSESEQUENCE_LENGTHS)->getMemory().getDesc().getPrecision(); - if (!one_of(precision, Precision::FP32, Precision::I32)) + if (!one_of(precision, ov::element::f32, ov::element::i32)) OPENVINO_THROW("ReverseSequence layer does not support ", precision , " precision"); - if (precision == Precision::FP32) + if (precision == ov::element::f32) execPtr->exec(getParentEdgeAt(REVERSESEQUENCE_DATA)->getMemoryPtr(), getParentEdgeAt(REVERSESEQUENCE_LENGTHS)->getMemoryPtr(), getChildEdgeAt(0)->getMemoryPtr()); diff --git a/src/plugins/intel_cpu/src/nodes/reverse_sequence.h b/src/plugins/intel_cpu/src/nodes/reverse_sequence.h index ba997fbb557cf9..4db22f5da1d18d 100644 --- a/src/plugins/intel_cpu/src/nodes/reverse_sequence.h +++ b/src/plugins/intel_cpu/src/nodes/reverse_sequence.h @@ -52,7 +52,7 @@ class ReverseSequence : public Node { int seq_axis; int batch_axis; - InferenceEngine::Precision lengthsPrecision; + ov::element::Type lengthsPrecision; std::string errorPrefix; }; diff --git a/src/plugins/intel_cpu/src/nodes/rnn.cpp b/src/plugins/intel_cpu/src/nodes/rnn.cpp index 60e7a64347718a..3b2416723850a6 100644 --- a/src/plugins/intel_cpu/src/nodes/rnn.cpp +++ b/src/plugins/intel_cpu/src/nodes/rnn.cpp @@ -4,7 +4,6 @@ #include "rnn.h" #include -#include "ie_precision.hpp" #include "nodes/common/cpu_memcpy.h" #include "nodes/common/cpu_convert.h" #include "utils/bfloat16.hpp" @@ -487,21 +486,21 @@ bool RNN::created() const { } void RNN::configurePortDataTypes() { - inDataTypes[xIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(0)); - inDataTypes[hIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(1)); + inDataTypes[xIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(0)); + inDataTypes[hIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(1)); if (haveCellState(cell_type)) inDataTypes[cIdx] = memory::data_type::f32; // @todo bf16 is also allowed, should be tried out if (!is_cell) inDataTypes[sIdx] = memory::data_type::s32; - inDataTypes[wIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(wIdx)); - inDataTypes[rIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(rIdx)); + inDataTypes[wIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(wIdx)); + inDataTypes[rIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(rIdx)); inDataTypes[bIdx] = memory::data_type::f32; // @todo bf16 is also allowed, should be tried out if (haveAttention(cell_type)) - inDataTypes[aIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalInputPrecisionAtPort(aIdx)); + inDataTypes[aIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalInputPrecisionAtPort(aIdx)); if (!is_cell) - outDataTypes[yIdx] = DnnlExtensionUtils::IEPrecisionToDataType(getOriginalOutputPrecisionAtPort(0)); + outDataTypes[yIdx] = DnnlExtensionUtils::ElementTypeToDataType(getOriginalOutputPrecisionAtPort(0)); outDataTypes[hoIdx] = inDataTypes[hIdx]; // required by oneDNN. Output hidden state is a input hidden state for the next iteration @@ -747,12 +746,12 @@ void RNN::fillSequenceDesc() { template void RNN::fillWeights(const int *gate_map, const size_t wIdx, const size_t rIdx) { - const auto& weightPrec = DnnlExtensionUtils::DataTypeToIEPrecision(inDataTypes[wIdx]); - const auto& targetWeightPrec = DnnlExtensionUtils::DataTypeToIEPrecision(weightsByinputDataType.at(inDataTypes[xIdx])); + const auto& weightPrec = DnnlExtensionUtils::DataTypeToElementType(inDataTypes[wIdx]); + const auto& targetWeightPrec = DnnlExtensionUtils::DataTypeToElementType(weightsByinputDataType.at(inDataTypes[xIdx])); // create weight blobs (data and state part) const VectorDims dims_w = { L, D, DC, G, SC }; - TensorDesc w_data_desc(targetWeightPrec, dims_w, getWeightsLayoutByDims(dims_w, false)); + TensorDesc w_data_desc(InferenceEngine::details::convertPrecision(targetWeightPrec), dims_w, getWeightsLayoutByDims(dims_w, false)); Blob::Ptr w_data_mem = make_shared_blob(w_data_desc); w_data_mem->allocate(); @@ -761,7 +760,7 @@ void RNN::fillWeights(const int *gate_map, const size_t wIdx, const size_t rIdx) IE_THROW(NotAllocated) << "Internal blob was not allocated for node " << getName() << "."; const VectorDims dims_s = { L, D, SC, G, SC }; - TensorDesc w_state_desc(targetWeightPrec, dims_s, getWeightsLayoutByDims(dims_s, false)); + TensorDesc w_state_desc(InferenceEngine::details::convertPrecision(targetWeightPrec), dims_s, getWeightsLayoutByDims(dims_s, false)); Blob::Ptr w_state_mem = make_shared_blob(w_state_desc); w_state_mem->allocate(); auto r_ptr = static_cast(w_state_mem->buffer()); @@ -809,16 +808,16 @@ void RNN::fillWeights(const int *gate_map, const size_t wIdx, const size_t rIdx) internalBlobs.push_back(w_state_mem); } -template +template void RNN::fillBiases(const int *gate_map) { - using dataType = typename PrecisionTrait::value_type; + using dataType = typename element_type_traits::value_type; if (inDataTypes[bIdx] != memory::data_type::f32) { - THROW_ERROR("doesn't support bias data type: ", DnnlExtensionUtils::DataTypeToIEPrecision(inDataTypes[bIdx])); + THROW_ERROR("doesn't support bias data type: ", DnnlExtensionUtils::DataTypeToElementType(inDataTypes[bIdx])); } VectorDims dims_b = { L, D, Gb, SC }; - TensorDesc w_bias_data_desc(Prec, dims_b, getWeightsLayoutByDims(dims_b, false)); + TensorDesc w_bias_data_desc(InferenceEngine::details::convertPrecision(Prec), dims_b, getWeightsLayoutByDims(dims_b, false)); Blob::Ptr w_bias_data_mem = make_shared_blob(w_bias_data_desc); w_bias_data_mem->allocate(); auto b_ptr = static_cast(w_bias_data_mem->buffer()); @@ -832,14 +831,14 @@ void RNN::fillBiases(const int *gate_map) { std::vector ie_b_vec(elementsCount); cpu_convert(constBlob->getData(), &ie_b_vec[0], - DnnlExtensionUtils::DataTypeToIEPrecision(constBlob->getDataType()), + DnnlExtensionUtils::DataTypeToElementType(constBlob->getDataType()), Prec, elementsCount); for (size_t g = 0; g < Gb; g++) { dataType *l_b_ptr = b_ptr + gate_map[g] * SC; const dataType *l_ie_b_ptr = &ie_b_vec[g * SC]; - cpu_memcpy(l_b_ptr, l_ie_b_ptr, SC * sizeof(typename PrecisionTrait::value_type)); + cpu_memcpy(l_b_ptr, l_ie_b_ptr, SC * sizeof(typename element_type_traits::value_type)); } // @todo replace push_back with copy assignment by index, since order matters internalBlobs.push_back(w_bias_data_mem); @@ -910,10 +909,10 @@ void RNN::copyWeightsData() { } else if (dataType == memory::data_type::u8 || dataType == memory::data_type::s8) { fillWeights(gate_map, wIdx, rIdx); } else { - THROW_ERROR("has unsupported data type: ", DnnlExtensionUtils::DataTypeToIEPrecision(dataType)); + THROW_ERROR("has unsupported data type: ", DnnlExtensionUtils::DataTypeToElementType(dataType)); } - fillBiases(gate_map); + fillBiases(gate_map); } namespace { diff --git a/src/plugins/intel_cpu/src/nodes/rnn.h b/src/plugins/intel_cpu/src/nodes/rnn.h index 83784d7682d66f..f163b85c88e111 100644 --- a/src/plugins/intel_cpu/src/nodes/rnn.h +++ b/src/plugins/intel_cpu/src/nodes/rnn.h @@ -58,12 +58,12 @@ class RNN : public Node { void fillCellDesc(); void fillSequenceDesc(); void fillDescs(); - bool verifyWeightsPrecision(const InferenceEngine::Precision& layerPrec, - const InferenceEngine::Precision& weightsPrec); + bool verifyWeightsPrecision(const ov::element::Type& layerPrec, + const ov::element::Type& weightsPrec); template void fillWeights(const int* gate_map, const size_t wIdx, const size_t rIdx); - template + template void fillBiases(const int* gate_map); void copyWeightsData(); diff --git a/src/plugins/intel_cpu/src/nodes/roi_align.cpp b/src/plugins/intel_cpu/src/nodes/roi_align.cpp index 068e1f1a00dc97..314457ab622f4d 100644 --- a/src/plugins/intel_cpu/src/nodes/roi_align.cpp +++ b/src/plugins/intel_cpu/src/nodes/roi_align.cpp @@ -159,26 +159,26 @@ struct jit_uni_roi_align_kernel_f32 : public jit_uni_roi_align_kernel, public ji } inline void load(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, jcp_.data_prc, Precision::FP32, elt_num, offset); + emit_load(reg_src, vmm_src, jcp_.data_prc, ov::element::f32, elt_num, offset); } inline void load_buffer(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, Precision::FP32, Precision::FP32, elt_num, offset); + emit_load(reg_src, vmm_src, ov::element::f32, ov::element::f32, elt_num, offset); } inline void load_idx(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, Precision::I32, Precision::I32, elt_num, offset); + emit_load(reg_src, vmm_src, ov::element::i32, ov::element::i32, elt_num, offset); } inline void store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, const int elt_num, const int offset = 0) { - emit_store(vmm_dst, reg_dst, Precision::FP32, jcp_.data_prc, elt_num, offset); + emit_store(vmm_dst, reg_dst, ov::element::f32, jcp_.data_prc, elt_num, offset); } inline void store_buffer(Vmm vmm_dst, Xbyak::Reg64 reg_dst, const int elt_num, const int offset = 0) { - emit_store(vmm_dst, reg_dst, Precision::FP32, Precision::FP32, elt_num, offset); + emit_store(vmm_dst, reg_dst, ov::element::f32, ov::element::f32, elt_num, offset); } - inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, Precision src_prc, Precision dst_prc, const int elt_num, const int offset = 0) { + inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int elt_num, const int offset = 0) { const auto seed = load_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -188,7 +188,7 @@ struct jit_uni_roi_align_kernel_f32 : public jit_uni_roi_align_kernel, public ji {static_cast(vmm_src.getIdx())}, {}, {load_pool_gpr_idxs}); } - inline void emit_store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, Precision src_prc, Precision dst_prc, const int elt_num, const int offset = 0) { + inline void emit_store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, ov::element::Type src_prc, ov::element::Type dst_prc, const int elt_num, const int offset = 0) { const auto seed = store_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_store_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -469,9 +469,9 @@ struct jit_uni_roi_align_kernel_f32 : public jit_uni_roi_align_kernel, public ji load_idx(reg_buf, vmm_buf, v_step); - if (jcp_.data_prc == Precision::FP32) + if (jcp_.data_prc == ov::element::f32) gather_f32(vmm_src, reg_src, vmm_buf); - else if (jcp_.data_prc == Precision::BF16) + else if (jcp_.data_prc == ov::element::bf16) gather_bf16_to_f32_zmm(vmm_src, reg_src, vmm_buf); uni_vmovups(vmm_weights, ptr[reg_weights]); @@ -519,9 +519,9 @@ struct jit_uni_roi_align_kernel_f32 : public jit_uni_roi_align_kernel, public ji load_idx(reg_buf, vmm_buf, x_step); - if (jcp_.data_prc == Precision::FP32) + if (jcp_.data_prc == ov::element::f32) gather_f32_xmm(xmm_src, reg_src, xmm_buf); - else if (jcp_.data_prc == Precision::BF16) + else if (jcp_.data_prc == ov::element::bf16) gather_bf16_to_f32_xmm(xmm_src, reg_src, xmm_buf); uni_vmovups(xmm_weights, ptr[reg_weights]); @@ -549,9 +549,9 @@ struct jit_uni_roi_align_kernel_f32 : public jit_uni_roi_align_kernel, public ji } // xmm_dst[0] of f32 is the dst value - if (jcp_.data_prc == Precision::FP32) + if (jcp_.data_prc == ov::element::f32) uni_vpextrd(ptr[reg_dst], xmm_dst, 0); - else if (jcp_.data_prc == Precision::BF16) + else if (jcp_.data_prc == ov::element::bf16) uni_vpextrw(ptr[reg_dst], xmm_dst, 1); } @@ -742,7 +742,7 @@ void ROIAlign::getSupportedDescriptors() { } } -void ROIAlign::createJitKernel(const InferenceEngine::Precision& dataPrec, const ROIAlignLayoutType& selectLayout) { +void ROIAlign::createJitKernel(const ov::element::Type& dataPrec, const ROIAlignLayoutType& selectLayout) { auto jcp = jit_roi_align_params(); jcp.alg = algorithm; jcp.data_prc = dataPrec; @@ -767,14 +767,14 @@ void ROIAlign::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision inputPrec0 = getOriginalInputPrecisionAtPort(0); - Precision outputPrec = getOriginalOutputPrecisionAtPort(0); + ov::element::Type inputPrec0 = getOriginalInputPrecisionAtPort(0); + ov::element::Type outputPrec = getOriginalOutputPrecisionAtPort(0); - if (inputPrec0 != Precision::FP32 || outputPrec != Precision::FP32) { - if ((outputPrec == Precision::BF16 || inputPrec0 == Precision::BF16) && mayiuse(avx512_core)) { - outputPrec = inputPrec0 = Precision::BF16; + if (inputPrec0 != ov::element::f32 || outputPrec != ov::element::f32) { + if ((outputPrec == ov::element::bf16 || inputPrec0 == ov::element::bf16) && mayiuse(avx512_core)) { + outputPrec = inputPrec0 = ov::element::bf16; } else { - outputPrec = inputPrec0 = Precision::FP32; + outputPrec = inputPrec0 = ov::element::f32; } } @@ -807,8 +807,8 @@ void ROIAlign::initSupportedPrimitiveDescriptors() { for (auto fmts : supportedFormats) { addSupportedPrimDesc({{fmts.first, inputPrec0}, - {LayoutType::ncsp, Precision::FP32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::f32}, + {LayoutType::ncsp, ov::element::i32}}, {{fmts.second, outputPrec}}, impl_type); } diff --git a/src/plugins/intel_cpu/src/nodes/roi_align.h b/src/plugins/intel_cpu/src/nodes/roi_align.h index eead89ddf4f36f..cfbe47c9d4c466 100644 --- a/src/plugins/intel_cpu/src/nodes/roi_align.h +++ b/src/plugins/intel_cpu/src/nodes/roi_align.h @@ -29,7 +29,7 @@ enum ROIAlignedMode { struct jit_roi_align_params { Algorithm alg; - InferenceEngine::Precision data_prc; + ov::element::Type data_prc; int data_size; ROIAlignLayoutType layout; int pooled_h; @@ -91,7 +91,7 @@ class ROIAlign : public Node { template struct ROIAlignExecute; - void createJitKernel(const InferenceEngine::Precision& dataPrec, const ROIAlignLayoutType& selectLayout); + void createJitKernel(const ov::element::Type& dataPrec, const ROIAlignLayoutType& selectLayout); std::shared_ptr roi_align_kernel = nullptr; std::string errorPrefix; diff --git a/src/plugins/intel_cpu/src/nodes/roi_pooling.cpp b/src/plugins/intel_cpu/src/nodes/roi_pooling.cpp index f25c5dd9e34fea..58472124ae9bdf 100644 --- a/src/plugins/intel_cpu/src/nodes/roi_pooling.cpp +++ b/src/plugins/intel_cpu/src/nodes/roi_pooling.cpp @@ -49,8 +49,8 @@ struct jit_uni_roi_pooling_kernel_f32 : public jit_uni_roi_pooling_kernel, publi }; void generate() override { - load_emitter.reset(new jit_load_emitter(this, isa, jpp_.src_prc, Precision::FP32, step)); - store_emitter.reset(new jit_store_emitter(this, isa, Precision::FP32, jpp_.dst_prc, step)); + load_emitter.reset(new jit_load_emitter(this, isa, jpp_.src_prc, ov::element::f32, step)); + store_emitter.reset(new jit_store_emitter(this, isa, ov::element::f32, jpp_.dst_prc, step)); store_empty_roi_emitter.reset(new jit_store_emitter(this, isa, jpp_.src_prc, jpp_.dst_prc, step)); this->preamble(); @@ -335,8 +335,8 @@ size_t RoiPoolingKey::hash() const { seed = hash_combine(seed, refParams.oh); seed = hash_combine(seed, refParams.ow); seed = hash_combine(seed, refParams.alg); - seed = hash_combine(seed, refParams.src_prc.getPrecVal()); - seed = hash_combine(seed, refParams.dst_prc.getPrecVal()); + seed = hash_combine(seed, refParams.src_prc.hash()); + seed = hash_combine(seed, refParams.dst_prc.hash()); seed = hash_combine(seed, refParams.spatial_scale); seed = hash_combine(seed, refParams.pooled_h); seed = hash_combine(seed, refParams.pooled_w); @@ -449,12 +449,12 @@ void ROIPooling::initSupportedPrimitiveDescriptors() { refParams.src_prc = getOriginalInputPrecisionAtPort(0); if (!mayiuse(avx512_core)) { - if (refParams.src_prc == Precision::BF16) - refParams.src_prc = Precision::FP32; + if (refParams.src_prc == ov::element::bf16) + refParams.src_prc = ov::element::f32; } - if (impl_type != impl_desc_type::ref && refParams.src_prc == Precision::FP16) { - refParams.src_prc = Precision::FP32; + if (impl_type != impl_desc_type::ref && refParams.src_prc == ov::element::f16) { + refParams.src_prc = ov::element::f32; } addSupportedPrimDesc({{format, refParams.src_prc}, @@ -829,9 +829,9 @@ std::shared_ptr ROIPooling::ROIPoolingExecutor:: ROIPoolingContext ctx = { nullptr, jpp }; OV_SWITCH(intel_cpu, ROIPoolingExecutorCreation, ctx, jpp.src_prc, - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::BF16, bfloat16_t), - OV_CASE(Precision::FP16, float16_t)) + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::bf16, bfloat16_t), + OV_CASE(ov::element::f16, float16_t)) return ctx.executor; } diff --git a/src/plugins/intel_cpu/src/nodes/roi_pooling.h b/src/plugins/intel_cpu/src/nodes/roi_pooling.h index 8be0a0477cb35b..c36cde24d58c64 100644 --- a/src/plugins/intel_cpu/src/nodes/roi_pooling.h +++ b/src/plugins/intel_cpu/src/nodes/roi_pooling.h @@ -25,8 +25,8 @@ struct jit_roi_pooling_params { int pooled_h; int pooled_w; - InferenceEngine::Precision src_prc; - InferenceEngine::Precision dst_prc; + ov::element::Type src_prc; + ov::element::Type dst_prc; Algorithm alg; diff --git a/src/plugins/intel_cpu/src/nodes/roll.cpp b/src/plugins/intel_cpu/src/nodes/roll.cpp index 2282ce154bf9d1..c23d7ee0204c09 100644 --- a/src/plugins/intel_cpu/src/nodes/roll.cpp +++ b/src/plugins/intel_cpu/src/nodes/roll.cpp @@ -9,7 +9,6 @@ #include "roll.h" #include "openvino/core/parallel.hpp" -#include "ie_precision.hpp" #include #include "utils/general_utils.h" #include "common/cpu_memcpy.h" @@ -47,7 +46,7 @@ Roll::Roll(const std::shared_ptr& op, const GraphContext::CPtr context const auto &dataPrecision = getOriginalInputPrecisionAtPort(DATA_INDEX); if (std::find(supportedPrecisionSizes.begin(), supportedPrecisionSizes.end(), dataPrecision.size()) == supportedPrecisionSizes.end()) - OPENVINO_THROW(layerErrorPrefix, "has unsupported precision: ", dataPrecision.name()); + OPENVINO_THROW(layerErrorPrefix, "has unsupported precision: ", dataPrecision.get_type_name()); const auto dataRank = getInputShapeAtPort(DATA_INDEX).getRank(); if (dataRank < 1) { @@ -59,8 +58,8 @@ Roll::Roll(const std::shared_ptr& op, const GraphContext::CPtr context /* Axes */ const auto& axesTensorPrec = getOriginalInputPrecisionAtPort(AXES_INDEX); - if (axesTensorPrec != Precision::I32 && axesTensorPrec != Precision::I64) { - OPENVINO_THROW(layerErrorPrefix, " has unsupported 'axes' input precision: ", axesTensorPrec.name()); + if (axesTensorPrec != ov::element::i32 && axesTensorPrec != ov::element::i64) { + OPENVINO_THROW(layerErrorPrefix, " has unsupported 'axes' input precision: ", axesTensorPrec.get_type_name()); } const auto axesTensorRank = getInputShapeAtPort(AXES_INDEX).getRank(); @@ -70,8 +69,8 @@ Roll::Roll(const std::shared_ptr& op, const GraphContext::CPtr context /* Shift */ const auto& shiftTensorPrec = getOriginalInputPrecisionAtPort(SHIFT_INDEX); - if (shiftTensorPrec != Precision::I32 && shiftTensorPrec != Precision::I64) { - OPENVINO_THROW(layerErrorPrefix, " has unsupported 'shift' input precision: ", shiftTensorPrec.name()); + if (shiftTensorPrec != ov::element::i32 && shiftTensorPrec != ov::element::i64) { + OPENVINO_THROW(layerErrorPrefix, " has unsupported 'shift' input precision: ", shiftTensorPrec.get_type_name()); } const auto shiftTensorRank = getInputShapeAtPort(SHIFT_INDEX).getRank(); @@ -89,11 +88,11 @@ void Roll::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); addSupportedPrimDesc({{LayoutType::ncsp, precision}, - {LayoutType::ncsp, InferenceEngine::Precision::I32}, - {LayoutType::ncsp, InferenceEngine::Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::ncsp, precision}}, impl_desc_type::ref); } @@ -134,29 +133,29 @@ void Roll::execute(dnnl::stream strm) { const auto dataPrecision = getParentEdgeAt(DATA_INDEX)->getMemory().getDesc().getPrecision(); const auto& dataTypeSize = dataPrecision.size(); switch (dataTypeSize) { - case sizeof(PrecisionTrait::value_type): { - execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), + case sizeof(element_type_traits::value_type): { + execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), getParentEdgeAt(SHIFT_INDEX)->getMemoryPtr(), getParentEdgeAt(AXES_INDEX)->getMemoryPtr(), getChildEdgeAt(0)->getMemoryPtr()); break; } - case sizeof(PrecisionTrait::value_type): { - execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), + case sizeof(element_type_traits::value_type): { + execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), getParentEdgeAt(SHIFT_INDEX)->getMemoryPtr(), getParentEdgeAt(AXES_INDEX)->getMemoryPtr(), getChildEdgeAt(0)->getMemoryPtr()); break; } - case sizeof(PrecisionTrait::value_type): { - execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), + case sizeof(element_type_traits::value_type): { + execPtr->exec::value_type>(getParentEdgeAt(DATA_INDEX)->getMemoryPtr(), getParentEdgeAt(SHIFT_INDEX)->getMemoryPtr(), getParentEdgeAt(AXES_INDEX)->getMemoryPtr(), getChildEdgeAt(0)->getMemoryPtr()); break; } default: - OPENVINO_THROW(layerErrorPrefix, "has unsupported 'data' input precision: ", dataPrecision.name()); + OPENVINO_THROW(layerErrorPrefix, "has unsupported 'data' input precision: ", dataPrecision.get_type_name()); } } diff --git a/src/plugins/intel_cpu/src/nodes/scatter_update.cpp b/src/plugins/intel_cpu/src/nodes/scatter_update.cpp index 0380e18124085e..2ba495ed2eec9f 100644 --- a/src/plugins/intel_cpu/src/nodes/scatter_update.cpp +++ b/src/plugins/intel_cpu/src/nodes/scatter_update.cpp @@ -44,9 +44,9 @@ bool ScatterUpdate::isExecutable() const { ScatterUpdate::ScatterUpdate(const std::shared_ptr& op, const GraphContext::CPtr context) : Node(op, context, NgraphShapeInferFactory(op, EMPTY_PORT_MASK)), dataSize(0lu), indicesSize(0lu), axisSize(0lu), - dataPrec(Precision::UNSPECIFIED), - indicesPrec(Precision::UNSPECIFIED), - axisPrec(Precision::UNSPECIFIED) { + dataPrec(ov::element::undefined), + indicesPrec(ov::element::undefined), + axisPrec(ov::element::undefined) { std::string errorMessage; if (isSupportedOperation(op, errorMessage)) { errorPrefix = std::string(op->get_type_name()) + " node with name '" + getName() + "'"; @@ -172,25 +172,25 @@ void ScatterUpdate::initSupportedPrimitiveDescriptors() { } indicesPrec = getOriginalInputPrecisionAtPort(INDICES_ID); - auto indicesType = DnnlExtensionUtils::IEPrecisionToDataType(indicesPrec); + auto indicesType = DnnlExtensionUtils::ElementTypeToDataType(indicesPrec); indicesSize = DnnlExtensionUtils::sizeOfDataType(indicesType); if (indicesSize >= 8) { - indicesPrec = Precision::I64; + indicesPrec = ov::element::i64; indicesSize = 8; } else { - indicesPrec = Precision::I32; + indicesPrec = ov::element::i32; indicesSize = 4; } if (axisRelaxed) { axisPrec = getOriginalInputPrecisionAtPort(AXIS_ID); - auto axisType = DnnlExtensionUtils::IEPrecisionToDataType(axisPrec); + auto axisType = DnnlExtensionUtils::ElementTypeToDataType(axisPrec); axisSize = DnnlExtensionUtils::sizeOfDataType(axisType); if (axisSize >= 8) { - axisPrec = Precision::I64; + axisPrec = ov::element::i64; axisSize = 8; } else { - axisPrec = Precision::I32; + axisPrec = ov::element::i32; axisSize = 4; } } diff --git a/src/plugins/intel_cpu/src/nodes/scatter_update.h b/src/plugins/intel_cpu/src/nodes/scatter_update.h index 512110ef2dc646..bf5c7be08b3385 100644 --- a/src/plugins/intel_cpu/src/nodes/scatter_update.h +++ b/src/plugins/intel_cpu/src/nodes/scatter_update.h @@ -50,7 +50,7 @@ class ScatterUpdate : public Node { // if axis can be set other than default 0. bool axisRelaxed = false; size_t dataSize, indicesSize, axisSize; - InferenceEngine::Precision dataPrec, indicesPrec, axisPrec; + ov::element::Type dataPrec, indicesPrec, axisPrec; std::string errorPrefix; }; diff --git a/src/plugins/intel_cpu/src/nodes/shapeof.cpp b/src/plugins/intel_cpu/src/nodes/shapeof.cpp index 99bd75fa180ff7..e287cde72522d4 100644 --- a/src/plugins/intel_cpu/src/nodes/shapeof.cpp +++ b/src/plugins/intel_cpu/src/nodes/shapeof.cpp @@ -49,12 +49,12 @@ void ShapeOf::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); const LayoutType dataFormats[4] = { LayoutType::ncsp, LayoutType::nspc, LayoutType::nCsp16c, LayoutType::nCsp8c }; for (const auto &df : dataFormats) { addSupportedPrimDesc({{df, precision}}, - {{LayoutType::ncsp, Precision::I32}}, + {{LayoutType::ncsp, ov::element::i32}}, impl_desc_type::ref); } } diff --git a/src/plugins/intel_cpu/src/nodes/shuffle_channels.cpp b/src/plugins/intel_cpu/src/nodes/shuffle_channels.cpp index c5539af2f2d8e5..e618ac67e3e3c9 100644 --- a/src/plugins/intel_cpu/src/nodes/shuffle_channels.cpp +++ b/src/plugins/intel_cpu/src/nodes/shuffle_channels.cpp @@ -87,10 +87,10 @@ void ShuffleChannels::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); const std::set supported_precision_sizes = {1, 2, 4, 8, 16}; if (supported_precision_sizes.find(precision.size()) == supported_precision_sizes.end()) - THROW_SHCH_ERROR("has unsupported precision: ", precision.name()); + THROW_SHCH_ERROR("has unsupported precision: ", precision.get_type_name()); impl_desc_type impl_type; if (mayiuse(cpu::x64::avx512_core)) { diff --git a/src/plugins/intel_cpu/src/nodes/softmax.cpp b/src/plugins/intel_cpu/src/nodes/softmax.cpp index a2539e9e4ed9db..20217fbb06ad58 100644 --- a/src/plugins/intel_cpu/src/nodes/softmax.cpp +++ b/src/plugins/intel_cpu/src/nodes/softmax.cpp @@ -80,13 +80,13 @@ void SoftMax::getSupportedDescriptors() { if (descs.size()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); if (!one_of(precision, - InferenceEngine::Precision::FP32, - InferenceEngine::Precision::BF16, - InferenceEngine::Precision::FP16)) - precision = InferenceEngine::Precision::FP32; - auto inputDataType = DnnlExtensionUtils::IEPrecisionToDataType(precision); + ov::element::f32, + ov::element::bf16, + ov::element::f16)) + precision = ov::element::f32; + auto inputDataType = DnnlExtensionUtils::ElementTypeToDataType(precision); if (getParentEdges().size() != 1) OPENVINO_THROW("Incorrect number of input edges for layer ", getName()); diff --git a/src/plugins/intel_cpu/src/nodes/space_to_batch.cpp b/src/plugins/intel_cpu/src/nodes/space_to_batch.cpp index 949c62a5fb4873..192564c623dd2b 100644 --- a/src/plugins/intel_cpu/src/nodes/space_to_batch.cpp +++ b/src/plugins/intel_cpu/src/nodes/space_to_batch.cpp @@ -54,33 +54,33 @@ void SpaceToBatch::initSupportedPrimitiveDescriptors() { const auto precision = getOriginalInputPrecisionAtPort(0); const std::set supported_precision_sizes = {1, 2, 4, 8}; if (supported_precision_sizes.find(precision.size()) == supported_precision_sizes.end()) - OPENVINO_THROW(errorPrefix, " has unsupported precision: ", precision.name()); + OPENVINO_THROW(errorPrefix, " has unsupported precision: ", precision.get_type_name()); addSupportedPrimDesc({{LayoutType::nspc, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nspc, precision}}, impl_desc_type::ref_any); addSupportedPrimDesc({{LayoutType::ncsp, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::ncsp, precision}}, impl_desc_type::ref_any); if (inDims[1] != Shape::UNDEFINED_DIM && inDims[1] % 8 == 0) { addSupportedPrimDesc({{LayoutType::nCsp8c, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nCsp8c, precision}}, impl_desc_type::ref_any); } if (inDims[1] != Shape::UNDEFINED_DIM && inDims[1] % 16 == 0) { addSupportedPrimDesc({{LayoutType::nCsp16c, precision}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}, - {LayoutType::ncsp, Precision::I32}}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}, + {LayoutType::ncsp, ov::element::i32}}, {{LayoutType::nCsp16c, precision}}, impl_desc_type::ref_any); } @@ -245,12 +245,18 @@ void SpaceToBatch::executeDynamicImpl(dnnl::stream strm) { void SpaceToBatch::execute(dnnl::stream strm) { switch (getParentEdgeAt(0)->getMemory().getDesc().getPrecision().size()) { - case 1: SpaceToBatchKernel::value_type>(); break; - case 2: SpaceToBatchKernel::value_type>(); break; - case 4: SpaceToBatchKernel::value_type>(); break; - default: - OPENVINO_THROW("SpaceToBatch layer does not support precision '" + - std::string(getParentEdgeAt(0)->getMemory().getDesc().getPrecision().name()) + "'"); + case 1: + SpaceToBatchKernel::value_type>(); + break; + case 2: + SpaceToBatchKernel::value_type>(); + break; + case 4: + SpaceToBatchKernel::value_type>(); + break; + default: + OPENVINO_THROW("SpaceToBatch layer does not support precision '" + + std::string(getParentEdgeAt(0)->getMemory().getDesc().getPrecision().get_type_name()) + "'"); } } diff --git a/src/plugins/intel_cpu/src/nodes/space_to_depth.cpp b/src/plugins/intel_cpu/src/nodes/space_to_depth.cpp index bcd900fdbcc6a9..99d4f619f74855 100644 --- a/src/plugins/intel_cpu/src/nodes/space_to_depth.cpp +++ b/src/plugins/intel_cpu/src/nodes/space_to_depth.cpp @@ -116,7 +116,7 @@ void SpaceToDepth::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - InferenceEngine::Precision precision = getOriginalInputPrecisionAtPort(0); + ov::element::Type precision = getOriginalInputPrecisionAtPort(0); impl_desc_type impl_type = impl_desc_type::ref; if (cpu::x64::mayiuse(impl::cpu::x64::avx512_core)) { diff --git a/src/plugins/intel_cpu/src/nodes/split.cpp b/src/plugins/intel_cpu/src/nodes/split.cpp index 5bc5e0551ed421..ab35c1f4a6213e 100644 --- a/src/plugins/intel_cpu/src/nodes/split.cpp +++ b/src/plugins/intel_cpu/src/nodes/split.cpp @@ -98,8 +98,8 @@ void Split::initSupportedPrimitiveDescriptors() { } } - InferenceEngine::Precision inpPrecision = getOriginalInputPrecisionAtPort(0); - const auto axisPrecision = Precision::I32; + ov::element::Type inpPrecision = getOriginalInputPrecisionAtPort(0); + const auto axisPrecision = ov::element::i32; // Set plain and tailC formats std::vector tdCreatorTypes{ LayoutType::ncsp, LayoutType::nspc }; diff --git a/src/plugins/intel_cpu/src/nodes/strided_slice.cpp b/src/plugins/intel_cpu/src/nodes/strided_slice.cpp index 5cedffdfccad93..9930f72dd97c59 100644 --- a/src/plugins/intel_cpu/src/nodes/strided_slice.cpp +++ b/src/plugins/intel_cpu/src/nodes/strided_slice.cpp @@ -210,8 +210,8 @@ void StridedSlice::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - const InferenceEngine::Precision dataPrecision = getOriginalInputPrecisionAtPort(DATA_ID); - const InferenceEngine::Precision iPrecision = Precision::I32; + const ov::element::Type dataPrecision = getOriginalInputPrecisionAtPort(DATA_ID); + const ov::element::Type iPrecision = ov::element::i32; attrs.dataSize = dataPrecision.size(); const size_t nDims = getInputShapeAtPort(DATA_ID).getRank(); diff --git a/src/plugins/intel_cpu/src/nodes/subgraph.cpp b/src/plugins/intel_cpu/src/nodes/subgraph.cpp index 6e190588275b99..ef8647933d289d 100644 --- a/src/plugins/intel_cpu/src/nodes/subgraph.cpp +++ b/src/plugins/intel_cpu/src/nodes/subgraph.cpp @@ -65,14 +65,14 @@ size_t SnippetKey::hash() const { for (const auto& order : attrs.inMemOrders) seed = get_vector_hash(seed, order); for (const auto& prec : attrs.inMemPrecs) - seed = hash_combine(seed, prec.getPrecVal()); + seed = hash_combine(seed, prec.hash()); for (const auto& blockedDim : attrs.outMemBlockedDims) seed = get_vector_hash(seed, blockedDim); for (const auto& order : attrs.outMemOrders) seed = get_vector_hash(seed, order); for (const auto& prec : attrs.outMemPrecs) - seed = hash_combine(seed, prec.getPrecVal()); + seed = hash_combine(seed, prec.hash()); seed = hash_combine(seed, attrs.bodyHash); @@ -118,7 +118,6 @@ bool SnippetKey::operator==(const SnippetKey& rhs) const { return true; } - } // namespace Snippet::Snippet(const std::shared_ptr& op, const GraphContext::CPtr& context) @@ -153,7 +152,8 @@ void Snippet::initSupportedPrimitiveDescriptors() { if (!supportedPrimitiveDescriptors.empty()) return; - const std::set supportedPrecisions = { Precision::FP32, Precision::I32, Precision::BF16, Precision::FP16, Precision::I8, Precision::U8 }; + const std::set supportedPrecisions = + {ov::element::f32, ov::element::i32, ov::element::bf16, ov::element::f16, ov::element::i8, ov::element::u8}; bool dimRanksAreEqual = true; for (size_t i = 0; dimRanksAreEqual && i < inputShapes.size(); i++) { @@ -183,7 +183,7 @@ void Snippet::initSupportedPrimitiveDescriptors() { Blocked }; auto initDesc = [&] (LayoutType lt) -> NodeDesc { - auto createMemoryDesc = [lt](const Shape &shape, Precision prc, size_t offset) -> std::shared_ptr { + auto createMemoryDesc = [lt](const Shape &shape, ov::element::Type prc, size_t offset) -> std::shared_ptr { const auto &dims = shape.getDims(); if (lt == ChannelsFirst && shape.getRank() != 1) { auto ndims = shape.getRank(); @@ -226,10 +226,10 @@ void Snippet::initSupportedPrimitiveDescriptors() { config.inConfs.resize(inputShapes.size()); for (size_t i = 0; i < inputShapes.size(); i++) { const auto originalInputPrecision = getOriginalInputPrecisionAtPort(i); - const auto precision = ((originalInputPrecision == InferenceEngine::Precision::FP32) && + const auto precision = ((originalInputPrecision == ov::element::f32) && context->getConfig().inferencePrecision == ov::element::bf16 && snippetAttrs.snippet->has_domain_sensitive_ops()) ? - static_cast(InferenceEngine::Precision::BF16) : + static_cast(ov::element::bf16) : originalInputPrecision; if (supportedPrecisions.count(precision) == 0) OPENVINO_THROW("Subgraph node with name `", getName(), "` doesn't support ", precision, " precision."); @@ -359,22 +359,22 @@ void Snippet::initOptimalPrimitiveDescriptor() { std::vector output_precisions; input_precisions.reserve(inputNum); for (const auto& p : snippetAttrs.inMemPrecs) { - input_precisions.push_back(InferenceEngine::details::convertPrecision(p)); + input_precisions.push_back(p); } output_precisions.reserve(outputNum); for (const auto& p : snippetAttrs.outMemPrecs) - output_precisions.push_back(InferenceEngine::details::convertPrecision(p)); + output_precisions.push_back(p); snippetAttrs.snippet->data_flow_transformations(in_blocked_shapes, input_precisions, output_precisions, backend_passes); snippetAttrs.snippet->convert_body_to_linear_ir(std::make_shared()); } -InferenceEngine::Precision Snippet::getRuntimePrecision() const { - std::vector inputPrecisions; +ov::element::Type Snippet::getRuntimePrecision() const { + std::vector inputPrecisions; for (size_t i = 0; i < getParentEdges().size(); i++) { auto parentEdge = getParentEdgeAt(i); if (parentEdge && parentEdge->getStatus() == Edge::Status::Validated && !parentEdge->getParent()->isConstant()) { - inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToIEPrecision((parentEdge->getMemoryPtr()->getDataType()))); + inputPrecisions.emplace_back(DnnlExtensionUtils::DataTypeToElementType((parentEdge->getMemoryPtr()->getDataType()))); } } diff --git a/src/plugins/intel_cpu/src/nodes/subgraph.h b/src/plugins/intel_cpu/src/nodes/subgraph.h index 422225bf7b66e5..990d1c66945d6a 100644 --- a/src/plugins/intel_cpu/src/nodes/subgraph.h +++ b/src/plugins/intel_cpu/src/nodes/subgraph.h @@ -31,7 +31,7 @@ class Snippet : public Node { void initSupportedPrimitiveDescriptors() override; void selectOptimalPrimitiveDescriptor() override; void initOptimalPrimitiveDescriptor() override; - InferenceEngine::Precision getRuntimePrecision() const override; + ov::element::Type getRuntimePrecision() const override; // Here we convert to canonical for & jit everything void prepareParams() override; @@ -50,10 +50,10 @@ class Snippet : public Node { uint64_t bodyHash; std::vector inMemBlockedDims; std::vector inMemOrders; - std::vector inMemPrecs; + std::vector inMemPrecs; std::vector outMemBlockedDims; std::vector outMemOrders; - std::vector outMemPrecs; + std::vector outMemPrecs; // todo: used flag if we need extra shape infer, can be removed after [121670] bool has_non_planar_inputs; }; diff --git a/src/plugins/intel_cpu/src/nodes/tensoriterator.cpp b/src/plugins/intel_cpu/src/nodes/tensoriterator.cpp index 8e78233d11494f..40586d9bccc6ee 100644 --- a/src/plugins/intel_cpu/src/nodes/tensoriterator.cpp +++ b/src/plugins/intel_cpu/src/nodes/tensoriterator.cpp @@ -32,7 +32,7 @@ static NodeConfig make_plain_config(const std::shared_ptr& op) { for (size_t i = 0; i < op->get_input_size(); i++) { const auto &origShape = op->get_input_partial_shape(i); const auto& shape = Shape(origShape.rank().get_length() == 0 ? ov::PartialShape{1} : origShape); - const auto prec = InferenceEngine::details::convertPrecision(op->get_input_element_type(i)); + const auto prec = op->get_input_element_type(i); PortConfig data_conf {}; auto descCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::ncsp); @@ -43,7 +43,7 @@ static NodeConfig make_plain_config(const std::shared_ptr& op) { for (size_t i = 0; i < op->get_output_size(); i++) { const auto &origShape = op->get_output_partial_shape(i); const auto& shape = Shape(origShape.rank().get_length() == 0 ? ov::PartialShape{1} : origShape); - const auto prec = InferenceEngine::details::convertPrecision(op->get_output_element_type(i)); + const auto prec = op->get_output_element_type(i); PortConfig data_conf {}; auto descCreator = BlockedDescCreator::getCommonCreators().at(LayoutType::ncsp); diff --git a/src/plugins/intel_cpu/src/nodes/topk.cpp b/src/plugins/intel_cpu/src/nodes/topk.cpp index 059b482158fe12..1bd540b07812b1 100644 --- a/src/plugins/intel_cpu/src/nodes/topk.cpp +++ b/src/plugins/intel_cpu/src/nodes/topk.cpp @@ -98,8 +98,8 @@ struct jit_uni_topk_kernel_f32 : public jit_uni_topk_kernel, public jit_generato if (!shape_agnostic_alg) mov(reg_table, l_table); - data_type = DnnlExtensionUtils::IEPrecisionToDataType(jcp_.precision); - precision_in_reg = isFloatCompatible(data_type) ? Precision::FP32 : Precision::I32; + data_type = DnnlExtensionUtils::ElementTypeToDataType(jcp_.precision); + precision_in_reg = isFloatCompatible(data_type) ? ov::element::f32 : ov::element::i32; if (!shape_agnostic_alg && jcp_.layout == TopKLayoutType::topk_blocked && jcp_.topk_innermost) blk_stride = jcp_.sort_stride * jcp_.blk_size; @@ -133,7 +133,7 @@ struct jit_uni_topk_kernel_f32 : public jit_uni_topk_kernel, public jit_generato Xbyak::Ymm, Xbyak::Zmm>::type; size_t vlen = cpu_isa_traits::vlen; dnnl::memory::data_type data_type; - Precision precision_in_reg; + ov::element::Type precision_in_reg; Xbyak::Address table_val(int index) { return ptr[reg_table + index * vlen]; } Xbyak::Address table_bubble_block_idx(int index) { return ptr[reg_bubble_block_idx + index * vlen]; } @@ -232,7 +232,7 @@ struct jit_uni_topk_kernel_f32 : public jit_uni_topk_kernel, public jit_generato } inline void load_i32(Xbyak::Reg64 reg_src, Vmm vmm_src, const int elt_num, const int offset = 0) { - emit_load(reg_src, vmm_src, Precision::I32, Precision::I32, elt_num, offset); + emit_load(reg_src, vmm_src, ov::element::i32, ov::element::i32, elt_num, offset); } inline void store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, const int elt_num, const int offset = 0) { @@ -240,10 +240,10 @@ struct jit_uni_topk_kernel_f32 : public jit_uni_topk_kernel, public jit_generato } inline void store_i32(Vmm vmm_dst, Xbyak::Reg64 reg_dst, const int elt_num, const int offset = 0) { - emit_store(vmm_dst, reg_dst, Precision::I32, Precision::I32, elt_num, offset); + emit_store(vmm_dst, reg_dst, ov::element::i32, ov::element::i32, elt_num, offset); } - inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, Precision src_prc, Precision dst_prc, const int elt_num, const int offset = 0) { + inline void emit_load(Xbyak::Reg64 reg_src, Vmm vmm_src, ov::element::Type src_prc, ov::element::Type dst_prc, const int elt_num, const int offset = 0) { const auto seed = load_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_load_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -253,7 +253,7 @@ struct jit_uni_topk_kernel_f32 : public jit_uni_topk_kernel, public jit_generato {static_cast(vmm_src.getIdx())}, {}, {load_pool_gpr_idxs}); } - inline void emit_store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, Precision src_prc, Precision dst_prc, const int elt_num, const int offset = 0) { + inline void emit_store(Vmm vmm_dst, Xbyak::Reg64 reg_dst, ov::element::Type src_prc, ov::element::Type dst_prc, const int elt_num, const int offset = 0) { const auto seed = store_emitter_params(src_prc, dst_prc, elt_num).hash(); if (!emitters[seed]) { emitters[seed].reset(new jit_store_emitter(this, isa, src_prc, dst_prc, elt_num)); @@ -1906,24 +1906,24 @@ void TopK::initSupportedPrimitiveDescriptors() { jit_mode = false; #endif - static const Precision supportedPrecision[] = { - Precision::FP32, - Precision::BF16, - Precision::I32, - Precision::I8, - Precision::U8 + static const ov::element::Type supportedPrecision[] = { + ov::element::f32, + ov::element::bf16, + ov::element::i32, + ov::element::i8, + ov::element::u8 }; - Precision dataPrecision = getOriginalOutputPrecisionAtPort(TOPK_DATA); - if (dataPrecision == Precision::BF16 && !mayiuse(avx512_core)) + ov::element::Type dataPrecision = getOriginalOutputPrecisionAtPort(TOPK_DATA); + if (dataPrecision == ov::element::bf16 && !mayiuse(avx512_core)) OPENVINO_THROW(errorPrefix, " gets incorrect isa for BF16! AVX512 must be supported!"); bool precisionSupported = std::find(std::begin(supportedPrecision), std::end(supportedPrecision), dataPrecision) != std::end(supportedPrecision); if (!precisionSupported) { - if (dataPrecision.is_float()) { - dataPrecision = Precision::FP32; + if (dataPrecision.is_real()) { + dataPrecision = ov::element::f32; } else { - dataPrecision = Precision::I32; + dataPrecision = ov::element::i32; } } @@ -1937,8 +1937,8 @@ void TopK::initSupportedPrimitiveDescriptors() { }; for (const auto &df : dataFomats) { - addSupportedPrimDesc({{df.first, dataPrecision}, {LayoutType::ncsp, Precision::I32}}, - {{df.second, dataPrecision}, {df.second, Precision::I32}}, + addSupportedPrimDesc({{df.first, dataPrecision}, {LayoutType::ncsp, ov::element::i32}}, + {{df.second, dataPrecision}, {df.second, ov::element::i32}}, impl_type); } } @@ -1955,7 +1955,7 @@ bool TopK::needPrepareParams() const { void TopK::preset_params() { auto selectedPD = getSelectedPrimitiveDescriptor(); - auto data_type = DnnlExtensionUtils::IEPrecisionToDataType(selectedPD->getConfig().inConfs[TOPK_DATA].getMemDesc()->getPrecision()); + auto data_type = DnnlExtensionUtils::ElementTypeToDataType(selectedPD->getConfig().inConfs[TOPK_DATA].getMemDesc()->getPrecision()); data_size = DnnlExtensionUtils::sizeOfDataType(data_type); topk_innermost = (layout == TopKLayoutType::topk_ncsp && axis == static_cast(getOutputShapeAtPort(TOPK_DATA).getRank() - 1)) || diff --git a/src/plugins/intel_cpu/src/nodes/topk.h b/src/plugins/intel_cpu/src/nodes/topk.h index fcb98fbdcf260b..d8992e3bd04089 100644 --- a/src/plugins/intel_cpu/src/nodes/topk.h +++ b/src/plugins/intel_cpu/src/nodes/topk.h @@ -6,7 +6,6 @@ #include -#include #include #include #include @@ -35,7 +34,7 @@ struct jit_topk_config_params { bool stable; // if require stable sorting TopKLayoutType layout; // memory layout TopKAlgorithm algorithm; // topk sorting algorithm - InferenceEngine::Precision precision; // precision + ov::element::Type precision; // precision int data_size; // data size int blk_size; // block size int top_k; // number of the output elements in the sorting dimension diff --git a/src/plugins/intel_cpu/src/nodes/transpose.cpp b/src/plugins/intel_cpu/src/nodes/transpose.cpp index dcca60396efb22..84fc099c808dcb 100644 --- a/src/plugins/intel_cpu/src/nodes/transpose.cpp +++ b/src/plugins/intel_cpu/src/nodes/transpose.cpp @@ -75,7 +75,7 @@ void Transpose::initSupportedPrimitiveDescriptors() { config.inConfs[INPUT_DATA_IDX].constant(false); config.inConfs[INPUT_ORDER_IDX].constant(isInputOrderConst); config.inConfs[INPUT_ORDER_IDX].setMemDesc(creatorsMap.at(LayoutType::ncsp)->createSharedDesc( - Precision::I32, getInputShapeAtPort(INPUT_ORDER_IDX))); + ov::element::i32, getInputShapeAtPort(INPUT_ORDER_IDX))); config.outConfs[0].inPlace(isOptimized ? 0 : -1); config.outConfs[0].constant(false); transpose_context = std::make_shared(context, getImplPriority()); @@ -111,7 +111,7 @@ void Transpose::initSupportedPrimitiveDescriptors() { supportedPrimitiveDescriptorsBuilder(config, transposeParams); } #endif // OPENVINO_ARCH_X86_64 - if (prec == Precision::FP32 || prec == Precision::FP16 || prec == Precision::I8 || prec == Precision::U8 || prec == Precision::BF16) { + if (prec == ov::element::f32 || prec == ov::element::f16 || prec == ov::element::i8 || prec == ov::element::u8 || prec == ov::element::bf16) { config.inConfs[0].setMemDesc(creatorsMap.at(LayoutType::nspc)->createSharedDesc(prec, inputDataShape)); config.outConfs[0].setMemDesc(creatorsMap.at(LayoutType::nspc)->createSharedDesc(prec, outputDataShape)); supportedPrimitiveDescriptorsBuilder(config, transposeParams); diff --git a/src/plugins/intel_cpu/src/nodes/transpose.h b/src/plugins/intel_cpu/src/nodes/transpose.h index 61f95048729709..3d96576eff3267 100644 --- a/src/plugins/intel_cpu/src/nodes/transpose.h +++ b/src/plugins/intel_cpu/src/nodes/transpose.h @@ -50,7 +50,7 @@ class Transpose : public Node { TransposeExecutorPtr execPtr = nullptr; dnnl::primitive prim; VectorDims order; - InferenceEngine::Precision prec; + ov::element::Type prec; TransposeParams transposeParams; diff --git a/src/plugins/intel_cpu/src/nodes/unique.cpp b/src/plugins/intel_cpu/src/nodes/unique.cpp index e56b94ec3d35be..47938f98b65f06 100644 --- a/src/plugins/intel_cpu/src/nodes/unique.cpp +++ b/src/plugins/intel_cpu/src/nodes/unique.cpp @@ -64,11 +64,11 @@ Unique::Unique(const std::shared_ptr& op, const GraphContext::CPtr con void Unique::initSupportedPrimitiveDescriptors() { dataPrecision = getOriginalInputPrecisionAtPort(IN_DATA); - if (dataPrecision != Precision::I32 && dataPrecision != Precision::I8 && dataPrecision != Precision::U8) { - dataPrecision = Precision::FP32; + if (dataPrecision != ov::element::i32 && dataPrecision != ov::element::i8 && dataPrecision != ov::element::u8) { + dataPrecision = ov::element::f32; } dataTypeSize = dataPrecision.size(); - const InferenceEngine::Precision axisPrecision = Precision::I32; + const ov::element::Type axisPrecision = ov::element::i32; impl_desc_type implType = ref; @@ -134,16 +134,16 @@ struct Unique::slicedExec { void Unique::execute(dnnl::stream strm) { if (flattened) { OV_SWITCH(intel_cpu, flattenExec, this, dataPrecision, - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::I32, int32_t), - OV_CASE(Precision::I8, int8_t), - OV_CASE(Precision::U8, uint8_t)) + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::i32, int32_t), + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t)) } else { OV_SWITCH(intel_cpu, slicedExec, this, dataPrecision, - OV_CASE(Precision::FP32, float), - OV_CASE(Precision::I32, int32_t), - OV_CASE(Precision::I8, int8_t), - OV_CASE(Precision::U8, uint8_t)) + OV_CASE(ov::element::f32, float), + OV_CASE(ov::element::i32, int32_t), + OV_CASE(ov::element::i8, int8_t), + OV_CASE(ov::element::u8, uint8_t)) } } diff --git a/src/plugins/intel_cpu/src/nodes/unique.hpp b/src/plugins/intel_cpu/src/nodes/unique.hpp index 65b8636abe3d01..bdbfe8b99fa044 100644 --- a/src/plugins/intel_cpu/src/nodes/unique.hpp +++ b/src/plugins/intel_cpu/src/nodes/unique.hpp @@ -45,7 +45,7 @@ class Unique : public Node { bool flattened = true; int axis = 0; bool definedOutputs[4] = { false, false, false, false }; - InferenceEngine::Precision dataPrecision; + ov::element::Type dataPrecision; int64_t dataTypeSize = 1l; size_t uniqueLen = 1lu; diff --git a/src/plugins/intel_cpu/src/normalize_preprocess.cpp b/src/plugins/intel_cpu/src/normalize_preprocess.cpp index e057a4c5a984e5..1836e73c1eef62 100644 --- a/src/plugins/intel_cpu/src/normalize_preprocess.cpp +++ b/src/plugins/intel_cpu/src/normalize_preprocess.cpp @@ -6,6 +6,7 @@ #include "ie_parallel.hpp" #include "nodes/common/cpu_memcpy.h" #include "utils/general_utils.h" +#include "ie_ngraph_utils.hpp" using namespace InferenceEngine; @@ -47,7 +48,7 @@ void NormalizePreprocess::Load(const Shape& inputShape, InputInfo::Ptr inputInfo auto meanWidth = pp[0]->meanData->getTensorDesc().getDims()[pp[0]->meanData->getTensorDesc().getDims().size() - 1]; auto meanHeight = pp[0]->meanData->getTensorDesc().getDims()[pp[0]->meanData->getTensorDesc().getDims().size() - 2]; - TensorDesc desc(Precision::FP32, {inChannels, meanHeight, meanWidth}, InferenceEngine::Layout::CHW); + TensorDesc desc(InferenceEngine::details::convertPrecision(ov::element::f32), {inChannels, meanHeight, meanWidth}, InferenceEngine::Layout::CHW); meanBuffer = make_shared_blob(desc); @@ -55,7 +56,7 @@ void NormalizePreprocess::Load(const Shape& inputShape, InputInfo::Ptr inputInfo for (unsigned channel = 0; channel < inChannels; channel++) { Blob::Ptr meanBlob = pp[channel]->meanData; - if (!meanBlob || meanBlob->getTensorDesc().getPrecision() != Precision::FP32) + if (!meanBlob || InferenceEngine::details::convertPrecision(meanBlob->getTensorDesc().getPrecision()) != ov::element::f32) IE_THROW() << "mean image not provided or not in Float 32"; if (meanBlob->size() != meanHeight*meanWidth) { IE_THROW() << "mean image size does not match expected network input, expecting " << meanWidth << " x " << meanHeight; diff --git a/src/plugins/intel_cpu/src/shape_inference/custom/gather.cpp b/src/plugins/intel_cpu/src/shape_inference/custom/gather.cpp index 5fefec17f063f4..26c1f816e0462a 100644 --- a/src/plugins/intel_cpu/src/shape_inference/custom/gather.cpp +++ b/src/plugins/intel_cpu/src/shape_inference/custom/gather.cpp @@ -18,7 +18,7 @@ Result GatherShapeInfer::infer(const std::vectorgetDesc().getPrecision() != Precision::I32) { + if (data_dependency.at(GATHER_AXIS)->getDesc().getPrecision() != ov::element::i32) { OPENVINO_THROW("Unsupported precision ", data_dependency.at(GATHER_AXIS)->getDesc().getPrecision(), " for axis tensor."); diff --git a/src/plugins/intel_cpu/src/shape_inference/custom/reshape.cpp b/src/plugins/intel_cpu/src/shape_inference/custom/reshape.cpp index d5c535b03cfdee..2d7a11e8ff7261 100644 --- a/src/plugins/intel_cpu/src/shape_inference/custom/reshape.cpp +++ b/src/plugins/intel_cpu/src/shape_inference/custom/reshape.cpp @@ -22,7 +22,7 @@ Result ReshapeShapeInfer::infer(const std::vectorgetStaticDims(); const auto outputPatternSize = std::accumulate(dims.begin(), dims.end(), 1, std::multiplies()); std::vector outPattern = ov::get_raw_data_as( - InferenceEngine::details::convertPrecision(memPtr->getDesc().getPrecision()), + memPtr->getDesc().getPrecision(), data, outputPatternSize, ov::util::Cast()); @@ -78,7 +78,7 @@ Result SqueezeShapeInfer::infer(const std::vector()); std::vector outPattern = ov::get_raw_data_as( - InferenceEngine::details::convertPrecision(memPtr->getDesc().getPrecision()), + memPtr->getDesc().getPrecision(), data, outputPatternSize, ov::util::Cast()); @@ -135,7 +135,7 @@ Result UnsqueezeShapeInfer::infer(const std::vectorgetStaticDims(); size_t outputPatternSize = std::accumulate(dims.begin(), dims.end(), 1, std::multiplies()); std::vector originOutPattern = ov::get_raw_data_as( - InferenceEngine::details::convertPrecision(memPtr->getDesc().getPrecision()), + memPtr->getDesc().getPrecision(), data, outputPatternSize, ov::util::Cast()); diff --git a/src/plugins/intel_cpu/src/shape_inference/custom/strided_slice.cpp b/src/plugins/intel_cpu/src/shape_inference/custom/strided_slice.cpp index 0ed160bf6e877a..8ca1ac3e79a7b0 100644 --- a/src/plugins/intel_cpu/src/shape_inference/custom/strided_slice.cpp +++ b/src/plugins/intel_cpu/src/shape_inference/custom/strided_slice.cpp @@ -30,9 +30,9 @@ Result StridedSliceShapeInfer::infer( static constexpr size_t DATA_ID = 0, BEGIN_ID = 1, END_ID = 2, STRIDE_ID = 3; const VectorDims& shapeIn = input_shapes[DATA_ID].get(); const VectorDims& shapeBegin = input_shapes[BEGIN_ID].get(); - if (data_dependency.at(BEGIN_ID)->getDesc().getPrecision() != Precision::I32 || - data_dependency.at(END_ID)->getDesc().getPrecision() != Precision::I32 || - data_dependency.at(STRIDE_ID)->getDesc().getPrecision() != Precision::I32) { + if (data_dependency.at(BEGIN_ID)->getDesc().getPrecision() != ov::element::i32 || + data_dependency.at(END_ID)->getDesc().getPrecision() != ov::element::i32 || + data_dependency.at(STRIDE_ID)->getDesc().getPrecision() != ov::element::i32) { OPENVINO_THROW("The data type of begin/end/stride is NOT I32, which is unexpected!"); } auto beginPtr = reinterpret_cast(data_dependency.at(BEGIN_ID)->getData()); diff --git a/src/plugins/intel_cpu/src/shape_inference/memory_accessor.hpp b/src/plugins/intel_cpu/src/shape_inference/memory_accessor.hpp index f75400beb68c96..c394e7ef4fb5b8 100644 --- a/src/plugins/intel_cpu/src/shape_inference/memory_accessor.hpp +++ b/src/plugins/intel_cpu/src/shape_inference/memory_accessor.hpp @@ -28,7 +28,7 @@ class MemoryAccessor : public ov::ITensorAccessor { auto memPtr = t_iter->second; // use scalar shape {} instead of {1} if required by shapeInference const auto shape = (m_ranks[port] != 0) ? ov::Shape(memPtr->getStaticDims()) : ov::Shape(); - return {InferenceEngine::details::convertPrecision(memPtr->getDesc().getPrecision()), + return {memPtr->getDesc().getPrecision(), shape, memPtr->getData() }; diff --git a/src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp b/src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp index fad9321b340de9..0796454a5feee6 100644 --- a/src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp +++ b/src/plugins/intel_cpu/src/transformations/transformation_pipeline.cpp @@ -351,7 +351,7 @@ void Transformations::PreLpt(const std::vector& defaultPrecis // However, if the extension operation produces an output precision that is not natively supported, this may lead to inconsistency during // element type propagation. This transformation is called before the ConvertPrecision pass to align the actual precisions with the list of supported ones. CPU_REGISTER_PASS_COMMON(manager, ov::pass::InsertConvertAfterExtension); - // Precision convert is disabled. + // element type convert is disabled. CPU_REGISTER_PASS_COMMON(manager, ov::pass::ConvertPrecision, precisions, type_to_fuse, false, false); CPU_REGISTER_PASS_COMMON(manager, ov::pass::EliminateConvert); diff --git a/src/plugins/intel_cpu/src/utils/blob_dump.cpp b/src/plugins/intel_cpu/src/utils/blob_dump.cpp index 597af37a161af5..e99c63c6cf6ecb 100644 --- a/src/plugins/intel_cpu/src/utils/blob_dump.cpp +++ b/src/plugins/intel_cpu/src/utils/blob_dump.cpp @@ -52,7 +52,7 @@ static IEB_HEADER prepare_header(const MemoryDesc& desc) { header.ver[0] = 0; header.ver[1] = 1; - header.precision = desc.getPrecision(); + header.precision = static_cast(ov::element::Type_t(desc.getPrecision())); if (desc.getShape().getRank() > 7) OPENVINO_THROW("Dumper support max 7D blobs"); @@ -78,7 +78,7 @@ static DnnlBlockedMemoryDesc parse_header(IEB_HEADER &header) { header.ver[1] != 1) OPENVINO_THROW("Dumper cannot parse file. Unsupported IEB format version."); - const auto prc = Precision(static_cast(header.precision)); + const auto prc = static_cast(header.precision); SizeVector dims(header.ndims); for (int i = 0; i < header.ndims; i++) dims[i] = header.dims[i]; @@ -102,30 +102,30 @@ void BlobDumper::prepare_plain_data(const MemoryPtr &memory, std::vectorgetData(); switch (desc.getPrecision()) { - case Precision::FP32: - case Precision::I32: { + case ov::element::f32: + case ov::element::i32: { auto *pln_blob_ptr = reinterpret_cast(data.data()); auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) pln_blob_ptr[i] = blob_ptr[desc.getElementOffset(i)]; break; } - case Precision::BF16: { + case ov::element::bf16: { auto *pln_blob_ptr = reinterpret_cast(data.data()); auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) pln_blob_ptr[i] = blob_ptr[desc.getElementOffset(i)]; break; } - case Precision::FP16: { + case ov::element::f16: { auto *pln_blob_ptr = reinterpret_cast(data.data()); auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) pln_blob_ptr[i] = blob_ptr[desc.getElementOffset(i)]; break; } - case Precision::I8: - case Precision::U8: { + case ov::element::i8: + case ov::element::u8: { auto *pln_blob_ptr = reinterpret_cast(data.data()); auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) @@ -163,7 +163,7 @@ void BlobDumper::dumpAsTxt(std::ostream &stream) const { size_t data_size = desc.getShape().getElementsCount(); // Header like "U8 4D shape: 2 3 224 224 () - stream << memory->getDesc().getPrecision().name() << " " + stream << memory->getDesc().getPrecision().get_type_name() << " " << dims.size() << "D " << "shape: "; for (size_t d : dims) stream << d << " "; @@ -173,19 +173,19 @@ void BlobDumper::dumpAsTxt(std::ostream &stream) const { const void *ptr = memory->getData(); switch (desc.getPrecision()) { - case Precision::FP32 : { + case ov::element::f32 : { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::I32: { + case ov::element::i32: { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::BF16: { + case ov::element::bf16: { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) { float fn = static_cast(blob_ptr[desc.getElementOffset(i)]); @@ -193,43 +193,43 @@ void BlobDumper::dumpAsTxt(std::ostream &stream) const { } break; } - case Precision::FP16: { + case ov::element::f16: { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::I8: { + case ov::element::i8: { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << static_cast(blob_ptr[desc.getElementOffset(i)]) << std::endl; break; } - case Precision::U8: { + case ov::element::u8: { auto *blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << static_cast(blob_ptr[desc.getElementOffset(i)]) << std::endl; break; } - case Precision::I64: { + case ov::element::i64: { auto* blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::U32: { + case ov::element::u32: { auto* blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::U16: { + case ov::element::u16: { auto* blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; break; } - case Precision::I16: { + case ov::element::i16: { auto* blob_ptr = reinterpret_cast(ptr); for (size_t i = 0; i < data_size; i++) stream << blob_ptr[desc.getElementOffset(i)] << std::endl; diff --git a/src/plugins/intel_cpu/src/utils/cpu_utils.hpp b/src/plugins/intel_cpu/src/utils/cpu_utils.hpp index 4b8c59fa48dd03..1c607d6c805c90 100644 --- a/src/plugins/intel_cpu/src/utils/cpu_utils.hpp +++ b/src/plugins/intel_cpu/src/utils/cpu_utils.hpp @@ -97,37 +97,37 @@ inline bool isEmptyTensorDesc(const InferenceEngine::TensorDesc &td) { * precision for convert * @return plug-in supported precision or UNSPECIFIED if precision unsupported */ -inline InferenceEngine::Precision normalizeToSupportedPrecision(InferenceEngine::Precision precision) { +inline ov::element::Type normalizeToSupportedPrecision(ov::element::Type precision) { switch (precision) { - case InferenceEngine::Precision::BF16: - case InferenceEngine::Precision::FP16: { + case ov::element::bf16: + case ov::element::f16: { if (!hasHardwareSupport(precision)) - precision = InferenceEngine::Precision::FP32; + precision = ov::element::f32; } - case InferenceEngine::Precision::U8: - case InferenceEngine::Precision::I8: - case InferenceEngine::Precision::I32: - case InferenceEngine::Precision::FP32: { + case ov::element::u8: + case ov::element::i8: + case ov::element::i32: + case ov::element::f32: { break; } - case InferenceEngine::Precision::FP64: { - precision = InferenceEngine::Precision::FP32; + case ov::element::f64: { + precision = ov::element::f32; break; } - case InferenceEngine::Precision::BOOL: { - precision = InferenceEngine::Precision::U8; + case ov::element::boolean: { + precision = ov::element::u8; break; } - case InferenceEngine::Precision::U16: - case InferenceEngine::Precision::I16: - case InferenceEngine::Precision::U32: - case InferenceEngine::Precision::I64: - case InferenceEngine::Precision::U64: { - precision = InferenceEngine::Precision::I32; + case ov::element::u16: + case ov::element::i16: + case ov::element::u32: + case ov::element::i64: + case ov::element::u64: { + precision = ov::element::i32; break; } default: { - precision = InferenceEngine::Precision::UNSPECIFIED; + precision = ov::element::undefined; } } diff --git a/src/plugins/intel_cpu/src/utils/debug_capabilities.cpp b/src/plugins/intel_cpu/src/utils/debug_capabilities.cpp index 05f631bcfb14c5..49cd125d011ba4 100644 --- a/src/plugins/intel_cpu/src/utils/debug_capabilities.cpp +++ b/src/plugins/intel_cpu/src/utils/debug_capabilities.cpp @@ -110,7 +110,7 @@ void DebugLogEnabled::break_at(const std::string & log) { std::ostream & operator<<(std::ostream & os, const MemoryDesc& desc) { os << desc.getShape().toString() - << " " << desc.getPrecision().name() + << " " << desc.getPrecision().get_type_name() << " " << desc.serializeFormat(); return os; } @@ -196,7 +196,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { auto desc = &(ptr->getDesc()); auto shape_str = desc->getShape().toString(); replace_all(shape_str, " ", ""); - leftside << comma << desc->getPrecision().name() + leftside << comma << desc->getPrecision().get_type_name() << "_" << desc->serializeFormat() << "_" << shape_str << "_" << ptr->getData(); @@ -210,7 +210,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { auto shape_str = desc->getShape().toString(); replace_all(shape_str, "0 - ?", "?"); replace_all(shape_str, " ", ""); - leftside << comma << desc->getPrecision().name() + leftside << comma << desc->getPrecision().get_type_name() << "_" << desc->serializeFormat() << "_" << shape_str; b_ouputed = true; @@ -229,7 +229,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { if (!inConfs.empty()) { os << " in:["; for (auto& c : inConfs) { - os << c.getMemDesc()->getPrecision().name() + os << c.getMemDesc()->getPrecision().get_type_name() << c.getMemDesc()-> << "/" << c.getMemDesc()->serializeFormat() << "; "; @@ -244,7 +244,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { for (auto& c : outConfs) { auto shape_str = c.getMemDesc()->getShape().toString(); replace_all(shape_str, "0 - ?", "?"); - leftside << comma << c.getMemDesc()->getPrecision().name() + leftside << comma << c.getMemDesc()->getPrecision().get_type_name() << "_" << c.getMemDesc()->serializeFormat() << "_" << shape_str; comma = ","; @@ -257,7 +257,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { for (size_t i = 0; i < node.getOriginalOutputPrecisions().size(); i++) { auto shape = node.getOutputShapeAtPort(i); std::string prec_name = "Undef"; - prec_name = node.getOriginalOutputPrecisionAtPort(i).name(); + prec_name = node.getOriginalOutputPrecisionAtPort(i).get_type_name(); auto shape_str = shape.toString(); replace_all(shape_str, "0 - ?", "?"); leftside << comma << prec_name @@ -300,7 +300,7 @@ std::ostream & operator<<(std::ostream & os, const Node &c_node) { auto shape = pmem->getDesc().getShape().getDims(); if (shape_size(shape) <= 8) { - auto type = InferenceEngine::details::convertPrecision(pmem->getDesc().getPrecision()); + auto type = pmem->getDesc().getPrecision(); auto tensor = std::make_shared(type, shape, data); auto constop = std::make_shared(tensor); comma = ""; diff --git a/src/plugins/intel_cpu/src/utils/general_utils.h b/src/plugins/intel_cpu/src/utils/general_utils.h index 3e147fa8e403b3..08fab4686bde85 100644 --- a/src/plugins/intel_cpu/src/utils/general_utils.h +++ b/src/plugins/intel_cpu/src/utils/general_utils.h @@ -131,15 +131,15 @@ inline bool dimsEqualWeak(const std::vector& lhs, const std::vector precisions) { +inline ov::element::Type getMaxPrecision(std::vector precisions) { if (!precisions.empty()) { return *std::max_element(precisions.begin(), precisions.end(), - [](const InferenceEngine::Precision &lhs, const InferenceEngine::Precision &rhs) { + [](const ov::element::Type &lhs, const ov::element::Type &rhs) { return lhs.size() > rhs.size(); }); } - return InferenceEngine::Precision::UNSPECIFIED; + return ov::element::undefined; } inline std::vector split(const std::string &str, char delim) { diff --git a/src/plugins/intel_cpu/src/utils/node_dumper.cpp b/src/plugins/intel_cpu/src/utils/node_dumper.cpp index 33eef78253236c..ed4793ab2e88da 100644 --- a/src/plugins/intel_cpu/src/utils/node_dumper.cpp +++ b/src/plugins/intel_cpu/src/utils/node_dumper.cpp @@ -10,6 +10,7 @@ #include "ie_common.h" #include "utils/blob_dump.h" #include "memory_desc/cpu_memory_desc_utils.h" +#include "ie_ngraph_utils.hpp" #include #include @@ -107,7 +108,7 @@ static void dumpInternalBlobs(const NodePtr& node, const DebugCapsConfig& config auto dump_file = config.blobDumpDir + "/#" + std::to_string(node->getExecIndex()) + "_" + file_name; TensorDesc desc = blb->getTensorDesc(); - if (desc.getPrecision() == Precision::BIN) + if (InferenceEngine::details::convertPrecision(desc.getPrecision()) == ov::element::u1) continue; MemoryPtr memory = std::make_shared(node->getEngine(), MemoryDescUtils::convertToDnnlBlockedMemoryDesc(desc), blb->buffer()); @@ -140,7 +141,7 @@ void dumpInputBlobs(const NodePtr& node, const DebugCapsConfig& config, int coun std::cout << "Dump inputs: " << dump_file << std::endl; auto& desc = prEdge->getMemory().getDesc(); - if (desc.getPrecision() == Precision::BIN) + if (desc.getPrecision() == ov::element::u1) continue; BlobDumper dumper(prEdge->getMemoryPtr()); @@ -173,7 +174,7 @@ void dumpOutputBlobs(const NodePtr& node, const DebugCapsConfig& config, int cou std::cout << "Dump outputs: " << dump_file << std::endl; auto& desc = childEdge->getMemory().getDesc(); - if (desc.getPrecision() == Precision::BIN) + if (desc.getPrecision() == ov::element::u1) continue; BlobDumper dumper(childEdge->getMemoryPtr()); diff --git a/src/plugins/intel_cpu/src/utils/precision_support.cpp b/src/plugins/intel_cpu/src/utils/precision_support.cpp index a973efd8a043fc..cc942777697c51 100644 --- a/src/plugins/intel_cpu/src/utils/precision_support.cpp +++ b/src/plugins/intel_cpu/src/utils/precision_support.cpp @@ -4,16 +4,15 @@ #include "precision_support.h" -#include "ie_precision.hpp" #include "cpu/x64/cpu_isa_traits.hpp" #include "openvino/core/visibility.hpp" namespace ov { namespace intel_cpu { -bool hasHardwareSupport(const InferenceEngine::Precision& precision) { +bool hasHardwareSupport(const ov::element::Type& precision) { switch (precision) { - case InferenceEngine::Precision::FP16: { + case ov::element::f16: { #if defined(OPENVINO_ARCH_X86_64) if (dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core_fp16)) return true; @@ -24,7 +23,7 @@ bool hasHardwareSupport(const InferenceEngine::Precision& precision) { return false; #endif } - case InferenceEngine::Precision::BF16: { + case ov::element::bf16: { #if defined(OPENVINO_ARCH_X86_64) if (dnnl::impl::cpu::x64::mayiuse(dnnl::impl::cpu::x64::avx512_core)) return true; diff --git a/src/plugins/intel_cpu/src/utils/precision_support.h b/src/plugins/intel_cpu/src/utils/precision_support.h index 5a4a527d586e97..f5d4c4907a6326 100644 --- a/src/plugins/intel_cpu/src/utils/precision_support.h +++ b/src/plugins/intel_cpu/src/utils/precision_support.h @@ -4,12 +4,12 @@ #pragma once -#include "ie_precision.hpp" +#include "openvino/core/type/element_type.hpp" namespace ov { namespace intel_cpu { -bool hasHardwareSupport(const InferenceEngine::Precision& precision); +bool hasHardwareSupport(const ov::element::Type& precision); } // namespace intel_cpu } // namespace ov diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/batch_to_space_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/batch_to_space_transformation.cpp index f378f334ebdee6..4adea1767af5a7 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/batch_to_space_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/batch_to_space_transformation.cpp @@ -22,7 +22,7 @@ const std::vector params = { { 1, 1, 2, 2 }, { 0, 0, 0, 0 }, { 0, 0, 0, 1 }, { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 2.55f }, { 0.f }, { 2.55f } }, "BatchToSpace", - "U8" + "u8" }, // per-channel quantization { @@ -37,7 +37,7 @@ const std::vector params = { { 255.f, 255.f/2.f, 255.f/3.f }, }, "BatchToSpace", - "FP32" + "f32" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_backprop_data_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_backprop_data_transformation.cpp index 4cfc66b11894f3..f8309d5e29939c 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_backprop_data_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_backprop_data_transformation.cpp @@ -24,14 +24,14 @@ const std::vector para { {0.2f}, ngraph::element::f32, {}, false } }, "Convolution", - "FP32" + "f32" }, // Actual: @@ -127,7 +127,7 @@ const std::vector para { {0.2f}, ngraph::element::f32, {}, false } }, "Convolution", - "U8" + "u8" }, // Actual: @@ -178,7 +178,7 @@ const std::vector para { {0.2f}, ngraph::element::f32, {}, false } }, "Convolution", - "FP32" + "f32" }, // Actual: @@ -229,7 +229,7 @@ const std::vector para { {0.2f}, ngraph::element::f32, {}, false } }, "Convolution", - "U8" + "u8" }, { @@ -249,7 +249,7 @@ const std::vector para { {0.2f}, ngraph::element::f32, {}, false } }, "Convolution", - "U8" + "u8" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_transformation.cpp index 8ba250533458c4..fdf00c2753ff04 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/convolution_transformation.cpp @@ -27,7 +27,7 @@ const std::vector params {}, false, "Convolution", - "FP32" + "f32" }, { {}, @@ -35,7 +35,7 @@ const std::vector params { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "FP32" + "f32" }, { { 256ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, @@ -43,7 +43,7 @@ const std::vector params { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "U8" + "u8" }, { { 256ul, ngraph::Shape {}, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, @@ -51,7 +51,7 @@ const std::vector params { 255ul, ngraph::Shape {}, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "U8" + "u8" }, { { 14ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, @@ -59,7 +59,7 @@ const std::vector params { 14ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "FP32" + "f32" }, { { 14ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 25.5f }, { 0.f }, { 25.5f } }, @@ -67,7 +67,7 @@ const std::vector params { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { -12.7f }, { 12.7f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "FP32" + "f32" }, { { 256ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, @@ -75,7 +75,7 @@ const std::vector params { 14ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "FP32" + "f32" }, { { 256ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { -12.7f }, { 12.8f } }, @@ -83,7 +83,7 @@ const std::vector params { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "U8" + "u8" }, { { 256ul, ngraph::Shape { 1 }, { 0.f }, { 255.f }, { -18.7f }, { 18.8f } }, @@ -91,7 +91,7 @@ const std::vector params { 255ul, ngraph::Shape { 1 }, { 0.f }, { 254.f }, { -18.7f }, { 18.7f } }, false, "Convolution", - "U8" + "u8" }, { { 256ul, ngraph::Shape { 1 }, { 0.f }, { 255.f }, { -18.7f }, { 18.8f } }, @@ -102,7 +102,7 @@ const std::vector params }, false, "Convolution", - "U8" + "u8" }, { { 256ul, ngraph::Shape { 1 }, { 0.f }, { 255.f }, { -18.7f }, { 18.8f } }, @@ -114,7 +114,7 @@ const std::vector params }, false, "Convolution", - "U8" + "u8" }, // not supported quantization level on data { @@ -123,7 +123,7 @@ const std::vector params { 255ul, ngraph::Shape{1, 1, 1, 1}, {0.f}, {254.f}, {-12.7f}, {12.7f}}, false, "Convolution", - "FP32" + "f32" }, // not supported quantization level on data & weights { @@ -132,7 +132,7 @@ const std::vector params { 65536ul, ngraph::Shape{1, 1, 1, 1}, {0.f}, {254.f}, {-12.7f}, {12.7f}}, false, "Convolution", - "FP32" + "f32" }, // not supported quantization level on weights { @@ -141,7 +141,7 @@ const std::vector params { 65536ul, ngraph::Shape{1, 1, 1, 1}, {0.f}, {254.f}, {-12.7f}, {12.7f}}, false, "Convolution", - "FP32" + "f32" } }; @@ -191,7 +191,7 @@ const std::vector params { 255ul, ngraph::Shape { 1, 1, 1}, { 0.f }, { 254.f }, { -12.7f }, { 12.7f } }, false, "Convolution", - "U8" + "u8" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/elementwise_branch_selection_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/elementwise_branch_selection_transformation.cpp index 1623d63ebc4ae2..0f5227dfa69c7b 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/elementwise_branch_selection_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/elementwise_branch_selection_transformation.cpp @@ -47,9 +47,9 @@ const std::vector p {"maxPool", "result"} }, { - {"convolution1", "U8"}, - {"convolution2", "U8"}, - {"eltwise", "U8"} + {"convolution1", "u8"}, + {"convolution2", "u8"}, + {"eltwise", "u8"} } }, { @@ -78,9 +78,9 @@ const std::vector p {"maxPool", "result"} }, { - {"convolution1", "U8"}, - {"convolution2", "U8"}, - {"eltwise", "U8"} + {"convolution1", "u8"}, + {"convolution2", "u8"}, + {"eltwise", "u8"} } } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_transformation.cpp index cccd6250dac624..f27e3174a5a1c8 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_transformation.cpp @@ -33,53 +33,53 @@ const std::vector isConvertOnConstants = { const std::vector fakeQuantizeOnDataValues = { { {256ul, {}, {0.f}, {2.55f}, {0.f}, {2.55f}}, - "Pooling", "U8" + "Pooling", "u8" }, { { 256ul, { {1ul}, {1ul}, {1ul}, {1ul} }, { 0.f }, { 2.55f }, { 0.f }, { 2.55f } }, - "Pooling", "U8" + "Pooling", "u8" }, { { 256ul, {}, { 0.f }, { 2.55f }, { -1.28f }, { 1.27f } }, - "Pooling", "I8" + "Pooling", "i8" }, { { 256ul, {}, { 0.f }, { 2.55f }, { 2.55f }, { 2.55f } }, - "Pooling", "U8" + "Pooling", "u8" }, { { 256ul, {}, { -127.5f }, { 0.f }, { -127.5f }, { 0.f } }, - "Pooling", "U8" + "Pooling", "u8" }, // corner case: FQ with equal constant values { { 256ul, {}, { 0.f }, { 0.f }, { 0.f }, { 0.f } }, - "Pooling", "U8" + "Pooling", "u8" }, { { 16ul, {}, { 0.f }, { 1.5f }, { 0.f }, { 1.5f } }, - "Pooling", "U8" + "Pooling", "u8" }, { { 16ul, {}, { -0.8f }, { 0.7f }, { -0.8f }, { 0.7f } }, - "Pooling", "I8" + "Pooling", "i8" }, // INT16, INT32 FQ's are transformed, but updatePrecision = false for inference on CPU Plugin and inferred via FP32 { { 65536, {}, { 0.f }, { 65.535f }, { 0.f }, { 65.535f } }, - "Pooling", "FP32" + "Pooling", "f32" }, { { 65536, {}, { -32.768f }, { 32.767f }, { -32.768f }, { 32.767f } }, - "Pooling", "FP32" + "Pooling", "f32" }, { { 4294967296, {}, { 0.f }, { 4.294967295f }, { 0.f }, { 4.294967295f } }, - "Pooling", "FP32" + "Pooling", "f32" }, { { 4294967296, {}, { -2.147483648f }, { 2.147483647f }, { -2.147483648f }, { 2.147483647f } }, - "Pooling", "FP32" + "Pooling", "f32" }, // nGraph: I8->FP32 Convert is not supported // { 256ul, {}, { -1.28f} , { 1.27f }, { -1.28f} , { 1.27f } }, diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_with_dq_not_optimal_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_with_dq_not_optimal_transformation.cpp index b3b0dbc853cbb5..5c8732a5989227 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_with_dq_not_optimal_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/fq_with_dq_not_optimal_transformation.cpp @@ -40,7 +40,7 @@ const std::vector fakeQuanti { {0.3f}, ngraph::element::f32, {}, false } }, {}, - "FP32" + "f32" }, { { 256ul, {{ 1, 1, 1, 1 }}, { 0.f }, { 25.5f }, { -128.f }, { 127.f }, ngraph::element::f32 }, @@ -59,7 +59,7 @@ const std::vector fakeQuanti { {0.3f}, ngraph::element::f32, {}, false } }, {}, - "I8" + "i8" }, { { 256ul, {{ 1, 1, 1, 1 }}, { 0.f }, { 25.5f }, { -128.f }, { 127.f }, ngraph::element::f32 }, @@ -78,7 +78,7 @@ const std::vector fakeQuanti { {0.3f}, ngraph::element::f32, {}, false } }, {}, - "FP32" + "f32" }, { { 256ul, {{ 1, 1, 1, 1 }}, { 0.f }, { 25.5f }, { -128.f }, { 127.f }, ngraph::element::f32 }, @@ -97,7 +97,7 @@ const std::vector fakeQuanti { {0.3f}, ngraph::element::f32, {}, false } }, {}, - "U8" + "u8" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/group_convolution_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/group_convolution_transformation.cpp index 381ad56a2a17a2..fe5ef5c998addd 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/group_convolution_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/group_convolution_transformation.cpp @@ -34,7 +34,7 @@ const std::vector pa { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f } }, true, "Convolution", - "U8" + "u8" }, // group convolution, tensor quantization { @@ -44,7 +44,7 @@ const std::vector pa { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f } }, true, "Convolution", - "U8" + "u8" }, // group convolution, tensor quantization { @@ -54,7 +54,7 @@ const std::vector pa { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f } }, true, "Convolution", - "U8" + "u8" }, // group convolution, per-channel quantization { @@ -71,7 +71,7 @@ const std::vector pa { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f } }, true, "Convolution", - "U8" + "u8" }, // group convolution without reshape, tensor quantization { @@ -81,7 +81,7 @@ const std::vector pa { 255ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f } }, false, "Convolution", - "U8" + "u8" } }; @@ -109,7 +109,7 @@ const std::vector pa { 255ul, ngraph::Shape { 3, 8, 1, 1, 1 }, { -127.f }, { 127.f }, { -127.f }, { 127.f } }, false, "Convolution", - "U8" + "u8" }, // group convolution without reshape, per channel quantization with different values { @@ -132,7 +132,7 @@ const std::vector pa }, false, "Convolution", - "U8" + "u8" }, }; @@ -161,7 +161,7 @@ const std::vector pa { 255ul, ngraph::Shape { 3, 8, 1, 1 }, { -127.f }, { 127.f }, { -127.f }, { 127.f } }, false, "Convolution", - "U8" + "u8" }, // group convolution without reshape, per channel quantization with different values { @@ -184,7 +184,7 @@ const std::vector pa }, false, "Convolution", - "U8" + "u8" }, }; @@ -278,7 +278,7 @@ const std::vector pa {255ul, ngraph::Shape { 1, 1, 1, 1, 1 }, { 0.f }, { 254.f }, { -127.f }, { 127.f }}, true, "Convolution", - "I8" + "i8" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/groupconvolution_qdq_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/groupconvolution_qdq_transformation.cpp index 59c24a03d7c66e..319d5c3cfa626f 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/groupconvolution_qdq_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/groupconvolution_qdq_transformation.cpp @@ -80,7 +80,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "FP32", + "f32", false, }, @@ -144,7 +144,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "FP32", + "f32", true, }, @@ -196,7 +196,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "U8", + "u8", false }, @@ -251,7 +251,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "U8", + "u8", true, }, @@ -308,7 +308,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "FP32", + "f32", false, }, @@ -368,7 +368,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "FP32", + "f32", true, }, @@ -428,7 +428,7 @@ const std::vector }, {}, "output_original", - "FP32", + "f32", true, }, @@ -485,7 +485,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "U8", + "u8", false, }, @@ -542,7 +542,7 @@ const std::vector }, {}, "output_original", - "U8", + "u8", false, }, @@ -602,7 +602,7 @@ const std::vector }, { {3, 2, 2, 5, 5} }, "output_original", - "U8", + "u8", true, }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_transformation.cpp index 5a1419245cc299..4dcb9ef2475381 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_transformation.cpp @@ -22,7 +22,7 @@ std::vector testValues = { { 1, 4, 2, 12 }, { 256ul, ngraph::Shape({}), {-12.8f}, {12.7f}, {-12.8f}, {12.7f} }, "matMul_original", - "U8" + "u8" }, { { 8, 4, 12, 2 }, @@ -30,7 +30,7 @@ std::vector testValues = { { 8, 4, 2, 12 }, { 256ul, ngraph::Shape({}), {-12.8f}, {12.7f}, {-12.8f}, {12.7f} }, "matMul_original", - "U8" + "u8" }, { { 1, 4, 12, 2 }, @@ -38,7 +38,7 @@ std::vector testValues = { { 1, 4, 2, 12 }, { 256ul, ngraph::Shape({}), {-12.8f}, {12.7f}, {-12.8f}, {12.7f} }, "matMul_original", - "I8" + "i8" }, { { 1, 1, 1, 4, 12, 2 }, @@ -46,7 +46,7 @@ std::vector testValues = { { 1, 1, 1, 4, 2, 12 }, { 256ul, ngraph::Shape({}), {-12.8f}, {12.7f}, {-12.8f}, {12.7f} }, "matMul_original", - "I8" + "i8" }, { { 12 }, @@ -54,7 +54,7 @@ std::vector testValues = { { 12 }, { 256ul, ngraph::Shape({}), {-12.8f}, {12.7f}, {-12.8f}, {12.7f} }, "matMul_original/MM", - "I8" + "i8" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_with_constant_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_with_constant_transformation.cpp index 829299dc1db860..552631fc33242e 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_with_constant_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/mat_mul_with_constant_transformation.cpp @@ -22,7 +22,7 @@ std::vector testValues = { { 256ul, {{1}, {1}, {2, 1}, {2, 1}}, {-128.f}, {127.f}, {-128.f, -12.8f}, {127.f, 12.7f} }, { {}, {}, {} }, "FullyConnected", - "U8" + "u8" }, // 3D with dequantize on weights { @@ -32,7 +32,7 @@ std::vector testValues = { {}, { ngraph::element::f32, {}, {0.1f} }, "FullyConnected", - "U8" + "u8" }, // 3D with different values { @@ -42,7 +42,7 @@ std::vector testValues = { { 256ul, {{1}, {1}, {2, 1}, {2, 1}}, {-128.f}, {127.f}, {-128.f, -12.8f}, {127.f, 12.7f} }, { {}, {}, {} }, "FullyConnected", - "U8" + "u8" }, // 4D with different values { @@ -52,7 +52,7 @@ std::vector testValues = { { 256ul, {{1}, {1}, {2, 1}, {2, 1}}, {-128.f}, {127.f}, {-128.f, -12.8f}, {127.f, 12.7f} }, { {}, {}, {} }, "MatMul", - "U8" + "u8" }, // 4D with Dq on weights { @@ -62,7 +62,7 @@ std::vector testValues = { {}, { ngraph::element::f32, {}, {{0.1f, 0.01f}, ngraph::element::f32, ngraph::Shape{ 2, 1 }} }, "MatMul", - "U8" + "u8" }, // 3D with the same values { @@ -72,7 +72,7 @@ std::vector testValues = { { 256ul, {{1}, {1}, {1}, {1}}, {-128.f}, {127.f}, {-128.f}, {127.f} }, { {}, {}, {} }, "FullyConnected", - "U8" + "u8" }, // 2D with subtract on activations { @@ -82,7 +82,7 @@ std::vector testValues = { { 256ul, {{1}, {1}, {1}, {1}}, {-128.f}, {127.f}, {-12.8f}, {12.7f} }, { {}, {}, {} }, "FullyConnected", - "U8" + "u8" }, // 2D with subtract on activations & Dq on weights { @@ -92,7 +92,7 @@ std::vector testValues = { {}, { ngraph::element::f32, {}, {0.1f} }, "FullyConnected", - "U8" + "u8" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/move_fake_quantize_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/move_fake_quantize_transformation.cpp index 52667010cf3f18..f32a45256b187d 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/move_fake_quantize_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/move_fake_quantize_transformation.cpp @@ -29,7 +29,7 @@ const std::vector pa {}, {}, "Concatenation", - "U8", + "u8", 1, }, // with ReLU operation @@ -40,7 +40,7 @@ const std::vector pa {}, {}, "Concatenation", - "U8", + "u8", 1 }, // Q/DQ @@ -55,7 +55,7 @@ const std::vector pa { 0.01f } }, "Concatenation", - "U8", + "u8", 1 }, // Q/DQ with ReLU @@ -70,7 +70,7 @@ const std::vector pa { 0.01f } }, "Concatenation", - "U8", + "u8", 1 }, // multi-chanels @@ -88,7 +88,7 @@ const std::vector pa {}, {}, "Concatenation", - "I8", + "i8", 1 }, // Q/DQ with multi-channels multiply @@ -110,7 +110,7 @@ const std::vector pa { {0.01f, 0.02f, 0.03f, 0.04f, 0.05f, 0.06f}, ngraph::element::f32, {1, 6, 1, 1} }, }, "Concatenation", - "U8", + "u8", 1 }, // Q/DQ with multi-channels subtract @@ -132,7 +132,7 @@ const std::vector pa { 0.01f }, }, "Concatenation", - "U8", + "u8", 1 }, }; @@ -164,7 +164,7 @@ namespace testValues2 { {}, {}, "Concatenation", - "I8", + "i8", -1 }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pad_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pad_transformation.cpp index a527361199de28..4d27832332ba60 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pad_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pad_transformation.cpp @@ -42,7 +42,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "U8" + "u8" }, // per-channel quantization with the same values { @@ -57,7 +57,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "U8" + "u8" }, // per-channel quantization with different values { @@ -73,7 +73,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "U8" + "u8" }, }; @@ -97,7 +97,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "FP32" + "f32" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { -2.f }, { 10.5f }, { -2.f }, { 10.5f } }, @@ -105,7 +105,7 @@ const std::vector params = { { 0, 0, 1, -1 }, 0.f, "Pad", - "FP32" + "f32" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { -2.f }, { 10.5f }, { -2.f }, { 10.5f } }, @@ -113,7 +113,7 @@ const std::vector params = { { 0, 0, -1, -1 }, 0.f, "Pad", - "U8" + "u8" }, // tensor quantization with subtract, non zero padValue and pad by unique dimension { @@ -122,7 +122,7 @@ const std::vector params = { { 0, 0, 1, 0 }, 2.f, "Pad", - "U8" + "u8" }, { @@ -131,7 +131,7 @@ const std::vector params = { { 0, 0, -1, 0 }, 2.f, "Pad", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 25.5f }, { 0.f }, { 12.8f } }, @@ -139,7 +139,7 @@ const std::vector params = { { 0, 0, -1, 0 }, 2.f, "Pad", - "U8" + "u8" }, // per-channel quantization with different values, non zero padValue and pad by channel { @@ -155,7 +155,7 @@ const std::vector params = { { 0, 0, 0, 0 }, 2.f, "Pad", - "U8" + "u8" }, { { @@ -170,7 +170,7 @@ const std::vector params = { { 0, -1, 0, 0 }, 2.f, "Pad", - "U8" + "u8" }, { { @@ -185,7 +185,7 @@ const std::vector params = { { 0, -1, 0, 0 }, 2.f, "Pad", - "U8" + "u8" }, // per-channel quantization with subtract { @@ -199,7 +199,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "FP32" + "f32" }, { { @@ -212,7 +212,7 @@ const std::vector params = { { 0, 0, 1, -1 }, 0.f, "Pad", - "FP32" + "f32" }, { { @@ -225,7 +225,7 @@ const std::vector params = { { 0, 0, -1, -1 }, 0.f, "Pad", - "U8" + "u8" }, }; @@ -255,7 +255,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "U8" + "u8" }, // per-channel quantization with subtract { @@ -269,7 +269,7 @@ const std::vector params = { { 0, 0, 1, 1 }, 0.f, "Pad", - "U8" + "u8" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pull_reshape_through_dequantization.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pull_reshape_through_dequantization.cpp index 0b1023113306de..03a1cc11af5aa5 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pull_reshape_through_dequantization.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/pull_reshape_through_dequantization.cpp @@ -38,7 +38,7 @@ const std::vector params = { ngraph::element::f32, {}, "output_original", - "U8" + "u8" }, { ngraph::element::f32, @@ -57,7 +57,7 @@ const std::vector params = { ngraph::element::f32, {}, "output_original", - "FP32" + "f32" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/recurrent_cell_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/recurrent_cell_transformation.cpp index f13a30ddd1adf7..42d513efad46fd 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/recurrent_cell_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/recurrent_cell_transformation.cpp @@ -49,7 +49,7 @@ const std::vector param {{}, {}, {}}, ngraph::builder::subgraph::RecurrentCellFunction::RNNType::LSTMSequence, "RNNSeq", - "U8" + "u8" }, // asymmetrical FQ on weights { @@ -79,7 +79,7 @@ const std::vector param {{}, {}, {}}, ngraph::builder::subgraph::RecurrentCellFunction::RNNType::LSTMSequence, "RNNSeq", - "FP32" + "f32" } }; @@ -128,7 +128,7 @@ const std::vector param {{}, {}, {}}, ngraph::builder::subgraph::RecurrentCellFunction::RNNType::GRUSequence, "RNNSeq", - "U8" + "u8" }, // asymmetrical FQ on weights { @@ -158,7 +158,7 @@ const std::vector param {{}, {}, {}}, ngraph::builder::subgraph::RecurrentCellFunction::RNNType::GRUSequence, "RNNSeq", - "FP32" + "f32" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_max_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_max_transformation.cpp index b2895ddb70c120..f12d44e5195563 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_max_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_max_transformation.cpp @@ -27,28 +27,28 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 1 }, true, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 1 }, false, "Output_original", - "U8" + "u8" }, { { @@ -61,7 +61,7 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { @@ -74,7 +74,7 @@ const std::vector params = { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { @@ -87,7 +87,7 @@ const std::vector params = { 0, 1 }, true, "Output", - "FP32" + "f32" }, { { @@ -100,7 +100,7 @@ const std::vector params = { 0, 1 }, false, "Output", - "FP32" + "f32" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_mean_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_mean_transformation.cpp index f5fe193dc18f94..3e4506bac0fa9a 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_mean_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_mean_transformation.cpp @@ -28,7 +28,7 @@ const std::vector params = {{ 2, 3 }, true}, {}, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { -128.f }, { 1.27f }, { 0.f }, { 255.f }, ov::element::f32 }, @@ -41,7 +41,7 @@ const std::vector params = {{ 2, 3 }, true}, {}, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { -128.f }, { 1.27f }, { 0.f }, { 255.f }, ov::element::f32 }, @@ -54,7 +54,7 @@ const std::vector params = {{ 2, 3 }, true}, {}, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, @@ -63,7 +63,7 @@ const std::vector params = {{ 2, 3 }, false}, {}, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, @@ -72,7 +72,7 @@ const std::vector params = {{ 1 }, true}, {}, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, @@ -81,7 +81,7 @@ const std::vector params = {{ 1 }, false}, {}, "Output_original", - "U8" + "u8" }, { { @@ -96,7 +96,7 @@ const std::vector params = {{ 2, 3 }, true}, {}, "Output_original", - "U8" + "u8" }, { { @@ -111,7 +111,7 @@ const std::vector params = {{2, 3}, false}, {}, "Output_original", - "U8" + "u8" }, { { @@ -126,7 +126,7 @@ const std::vector params = {{0, 1}, true}, {}, "Output", - "FP32" + "f32" }, { { @@ -141,7 +141,7 @@ const std::vector params = {{0, 1}, false}, {}, "Output", - "FP32" + "f32" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_min_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_min_transformation.cpp index f0ef6846fc672b..07ef9b458ab632 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_min_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_min_transformation.cpp @@ -27,28 +27,28 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 1 }, true, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 127.f } }, { 1 }, false, "Output_original", - "U8" + "u8" }, { { @@ -61,7 +61,7 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { @@ -74,7 +74,7 @@ const std::vector params = { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { @@ -87,7 +87,7 @@ const std::vector params = { 0, 1 }, true, "Output", - "FP32" + "f32" }, { { @@ -100,7 +100,7 @@ const std::vector params = { 0, 1 }, false, "Output", - "FP32" + "f32" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_sum_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_sum_transformation.cpp index 6cf203bf5e83a3..1f5aec32221848 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_sum_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reduce_sum_transformation.cpp @@ -27,14 +27,14 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 2.f }, { 10.f }, { 2.f }, { 10.f } }, { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { @@ -47,7 +47,7 @@ const std::vector params = { 2, 3 }, true, "Output_original", - "U8" + "u8" }, { { @@ -60,7 +60,7 @@ const std::vector params = { 2, 3 }, false, "Output_original", - "U8" + "u8" }, { { @@ -73,7 +73,7 @@ const std::vector params = { 0, 1 }, true, "Output", - "FP32" + "f32" }, { { @@ -86,7 +86,7 @@ const std::vector params = { 0, 1 }, false, "Output", - "FP32" + "f32" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reshape_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reshape_transformation.cpp index 9d4c856970b750..1cca68667da319 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reshape_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/reshape_transformation.cpp @@ -26,7 +26,7 @@ const std::vector params = { { 1, 3, 4, 8 }, { 256ul, ngraph::Shape{ 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, "Reshape", - "U8" + "u8" }, // 3D -> 1D { @@ -34,7 +34,7 @@ const std::vector params = { { -1 }, { 256ul, ngraph::Shape{}, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, "Reshape", - "U8" + "u8" }, // 4D -> 3D { @@ -42,7 +42,7 @@ const std::vector params = { { 1, 3, 256 }, { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, "Reshape", - "U8" + "u8" }, // 4D -> 3D { @@ -50,7 +50,7 @@ const std::vector params = { { 0, 3, -1 }, { 256ul, ngraph::Shape{ 1, 3, 1, 1 }, { 0.f }, { 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "U8" + "u8" }, // 4D -> 2D { @@ -58,7 +58,7 @@ const std::vector params = { { 1, -1 }, { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, "Reshape", - "U8" + "u8" }, // 4D -> 6D { @@ -66,7 +66,7 @@ const std::vector params = { { 1, 3, 4, 8, 1, 1 }, { 256ul, ngraph::Shape{ 1, 1, 1, 1}, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, "Reshape", - "U8" + "u8" }, // 4D -> 2D { @@ -81,7 +81,7 @@ const std::vector params = { { 255.f, 255.f/2.f, 255.f/3.f }, }, "Reshape", - "U8" + "u8" }, // 4D -> 3D { @@ -96,7 +96,7 @@ const std::vector params = { { 255.f, 255.f/2.f, 255.f/3.f }, }, "Reshape", - "U8" + "u8" }, // per-channel // 4D -> 3D @@ -112,7 +112,7 @@ const std::vector params = { { 255.f, 255.f/2.f, 255.f/3.f }, }, "Reshape", - "U8" + "u8" }, // Channels count reducing, per-channel dequantizations 4d -> 4d { @@ -122,7 +122,7 @@ const std::vector params = { { 0.f, 0.f, 0.f }, { 255.f, 255.f, 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "FP32" + "f32" }, // Channels count reducing, per-channel dequantizations 3d -> 4d { @@ -132,7 +132,7 @@ const std::vector params = { { 0.f, 0.f, 0.f }, { 255.f, 255.f, 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "FP32" + "f32" }, // Channels count reducing, per-channel dequantizations 4d -> 3d { @@ -142,7 +142,7 @@ const std::vector params = { { 0.f, 0.f, 0.f }, { 255.f, 255.f, 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "FP32" + "f32" }, // Channels count reducing, per-channel dequantizations 5d -> 3d { @@ -152,7 +152,7 @@ const std::vector params = { { 0.f, 0.f, 0.f }, { 255.f, 255.f, 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "FP32" + "f32" }, // Channels count reducing, per-channel dequantizations 5d -> 4d { @@ -162,7 +162,7 @@ const std::vector params = { { 0.f, 0.f, 0.f }, { 255.f, 255.f, 255.f }, { 0.f, 0.f, 0.f }, { 255.f, 25.5f, 2.55f } }, "Reshape", - "FP32" + "f32" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/shuffle_channels_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/shuffle_channels_transformation.cpp index df22a554c1d44e..eefbdde3c26428 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/shuffle_channels_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/shuffle_channels_transformation.cpp @@ -30,14 +30,14 @@ const std::vector par 0, 1, "output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, -3, 1, "output_original", - "U8" + "u8" }, { { @@ -51,7 +51,7 @@ const std::vector par -3, 1, "output_original", - "U8" + "u8" }, { { @@ -65,14 +65,14 @@ const std::vector par -3, 1, "output_original", - "U8" + "u8" }, { { 256ul, ngraph::Shape { 1, 1, 1, 1 }, { 0.f }, { 255.f }, { 0.f }, { 25.5f } }, 2, 4, "output_original", - "U8" + "u8" }, { { @@ -86,7 +86,7 @@ const std::vector par -1, 8, "output_original", - "U8" + "u8" }, }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/space_to_batch_transformation.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/space_to_batch_transformation.cpp index 7870b21660f043..f46191ab6a5f77 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/space_to_batch_transformation.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/low_precision_transformations/space_to_batch_transformation.cpp @@ -21,7 +21,7 @@ const std::vector params = { { 1, 1, 2, 2 }, { 0, 0, 2, 2 }, { 0, 0, 2, 3 }, { 256ul, ngraph::Shape{ 1, 1, 1, 1 }, { 0.f }, { 2.55f }, { 0.f }, { 2.55f } }, "SpaceToBatch", - "U8" + "u8" }, { {1, 3, 100, 171}, @@ -35,7 +35,7 @@ const std::vector params = { { 255.f, 255.f/2.f, 255.f/3.f }, }, "SpaceToBatch", - "FP32" + "f32" } }; diff --git a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp index 1568bf51e1fa56..790db155ed67b3 100644 --- a/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp +++ b/src/plugins/intel_cpu/tests/functional/shared_tests_instances/skip_tests_config.cpp @@ -335,7 +335,7 @@ std::vector disabledTestPatterns() { if (!InferenceEngine::with_cpu_x86_avx512_core_amx_int8()) //TODO: Issue 92895 // on platforms which do not support AMX, we are disabling I8 input tests - retVector.emplace_back(R"(smoke_LPT/FakeQuantizeWithNotOptimalTransformation.CompareWithRefImpl.*CPU.*I8.*)"); + retVector.emplace_back(R"(smoke_LPT/FakeQuantizeWithNotOptimalTransformation.CompareWithRefImpl.*CPU.*i8.*)"); if (!InferenceEngine::with_cpu_x86_avx512_core_amx_bf16() && !InferenceEngine::with_cpu_x86_bfloat16()) { // ignored for not supported bf16 platforms retVector.emplace_back(R"(.*smoke_Snippets_EnforcePrecision_bf16.*)"); diff --git a/src/plugins/intel_cpu/tests/functional/single_layer_tests/rnn_sequence.cpp b/src/plugins/intel_cpu/tests/functional/single_layer_tests/rnn_sequence.cpp index 2efa7fae3b70ea..e3c05700d7243b 100644 --- a/src/plugins/intel_cpu/tests/functional/single_layer_tests/rnn_sequence.cpp +++ b/src/plugins/intel_cpu/tests/functional/single_layer_tests/rnn_sequence.cpp @@ -100,9 +100,9 @@ class RNNSequenceCPUTest : public testing::WithParamInterface #include #include "test_utils/fusing_test_utils.hpp" #include "test_utils/convolution_params.hpp" @@ -138,11 +139,15 @@ class ConvSumInPlaceTest : public testing::WithParamInterface(concat, ngraphParam, "fq_cache"); diff --git a/src/plugins/intel_cpu/tests/functional/test_utils/cpu_test_utils.cpp b/src/plugins/intel_cpu/tests/functional/test_utils/cpu_test_utils.cpp index e2b3a7788a4a64..095164ae8c82f4 100644 --- a/src/plugins/intel_cpu/tests/functional/test_utils/cpu_test_utils.cpp +++ b/src/plugins/intel_cpu/tests/functional/test_utils/cpu_test_utils.cpp @@ -227,7 +227,14 @@ void CPUTestsBase::CheckPluginRelatedResultsImpl(const std::shared_ptr(shape); ::testing::Mock::AllowLeak(memdesc.get()); @@ -159,7 +159,7 @@ TEST_F(CPUTensorTest, canCreateTensor) { const std::size_t totalSize = ov::shape_size(ov_shape); ov::element::Type elem_type = ov::element::f32; - auto memptr = create_memory(create_memdesc(Precision::FP32, shape, strides)); + auto memptr = create_memory(create_memdesc(ov::element::f32, shape, strides)); { std::shared_ptr t = std::make_shared(memptr); ASSERT_EQ(totalSize, t->get_size()); @@ -178,7 +178,7 @@ TEST_F(CPUTensorTest, canAccessF16Tensor) { Shape shape = {4, 3, 2}; auto strides = ov::Strides({6, 2, 1}); - auto memptr = create_memory(create_memdesc(Precision::FP16, shape, strides)); + auto memptr = create_memory(create_memdesc(ov::element::f16, shape, strides)); { std::shared_ptr t = std::make_shared(memptr); EXPECT_NE(nullptr, t->data()); @@ -196,14 +196,14 @@ TEST_F(CPUTensorTest, canSetShape) { const Shape origShape = {1, 2, 3}; const ov::Shape ov_origShape = origShape.toPartialShape().to_shape(); auto strides = ov::Strides({6, 3, 1}); - auto memdesc = create_memdesc(Precision::FP32, origShape, strides); + auto memdesc = create_memdesc(ov::element::f32, origShape, strides); auto memptr = create_memory(memdesc); std::shared_ptr t = std::make_shared(memptr); const Shape newShape({4, 5, 6}); const ov::Shape ov_newShape = newShape.toPartialShape().to_shape(); auto new_strides = ov::Strides{30, 6, 1}; - auto new_memdesc = create_memdesc(Precision::FP32, newShape, new_strides); + auto new_memdesc = create_memdesc(ov::element::f32, newShape, new_strides); // set_shape to a bigger memory { @@ -233,7 +233,7 @@ TEST_F(CPUTensorTest, canSyncMemoryAndTensor) { const Shape origShape = {1, 2, 3}; const ov::Shape ov_origShape = origShape.toPartialShape().to_shape(); auto strides = ov::Strides({6, 3, 1}); - auto memdesc = create_memdesc(Precision::FP32, origShape, strides); + auto memdesc = create_memdesc(ov::element::f32, origShape, strides); auto memptr = create_memory(memdesc); std::shared_ptr t = std::make_shared(memptr); @@ -243,7 +243,7 @@ TEST_F(CPUTensorTest, canSyncMemoryAndTensor) { const Shape newShape({4, 5, 6}); const ov::Shape ov_newShape = newShape.toPartialShape().to_shape(); auto new_strides = ov::Strides{30, 6, 1}; - auto new_memdesc = create_memdesc(Precision::FP32, newShape, new_strides); + auto new_memdesc = create_memdesc(ov::element::f32, newShape, new_strides); // reallocate memory out boundary of tensor instance { diff --git a/src/plugins/intel_cpu/tests/unit/cpu_tensor_test_ext.cpp b/src/plugins/intel_cpu/tests/unit/cpu_tensor_test_ext.cpp index be8b6a055982c8..b2129c978a3377 100644 --- a/src/plugins/intel_cpu/tests/unit/cpu_tensor_test_ext.cpp +++ b/src/plugins/intel_cpu/tests/unit/cpu_tensor_test_ext.cpp @@ -29,7 +29,7 @@ static ov::Strides byteStrides(const ov::Strides& strides, const ov::element::Ty return byte_strides; } -inline MemoryPtr create_memory(Precision prc, const Shape& shape) { +inline MemoryPtr create_memory(ov::element::Type prc, const Shape& shape) { dnnl::engine eng(dnnl::engine::kind::cpu, 0); CpuBlockedMemoryDescPtr desc; desc = std::make_shared(prc, shape); @@ -40,7 +40,7 @@ TEST_F(CPUTensorExtTest, canCreateTensor) { Shape shape{4, 3, 2}; ov::Shape ov_shape = shape.toPartialShape().to_shape(); - std::shared_ptr t = std::make_shared(create_memory(Precision::FP32, shape)); + std::shared_ptr t = std::make_shared(create_memory(ov::element::f32, shape)); const std::size_t totalSize = ov::shape_size(ov_shape); ASSERT_EQ(totalSize, t->get_size()); ASSERT_NE(nullptr, t->data()); @@ -55,7 +55,7 @@ TEST_F(CPUTensorExtTest, canCreateTensor) { TEST_F(CPUTensorExtTest, canAccessF16Tensor) { Shape shape = {4, 3, 2}; - std::shared_ptr t = std::make_shared(create_memory(Precision::FP16, shape)); + std::shared_ptr t = std::make_shared(create_memory(ov::element::f16, shape)); EXPECT_NE(nullptr, t->data()); ASSERT_EQ(ov::element::f16, t->get_element_type()); EXPECT_NO_THROW(t->data(ov::element::f16)); @@ -68,7 +68,7 @@ TEST_F(CPUTensorExtTest, canAccessF16Tensor) { // SetShape TEST_F(CPUTensorExtTest, canSetShape) { const ov::Shape origShape({1, 2, 3}); - std::shared_ptr t = std::make_shared(create_memory(Precision::FP32, {1, 2, 3})); + std::shared_ptr t = std::make_shared(create_memory(ov::element::f32, {1, 2, 3})); const ov::Shape newShape({4, 5, 6}); const void* orig_data = t->data(); @@ -92,7 +92,7 @@ TEST_F(CPUTensorExtTest, emptySize) { Shape shape{pshape}; const ov::Shape origShape({0, 3, 2}); - std::shared_ptr t = std::make_shared(create_memory(Precision::FP32, shape)); + std::shared_ptr t = std::make_shared(create_memory(ov::element::f32, shape)); ASSERT_EQ(ov::element::f32, t->get_element_type()); ASSERT_EQ(0, t->get_size()); @@ -109,17 +109,17 @@ TEST_F(CPUTensorExtTest, canCreateTensorWithDynamicShape) { std::shared_ptr t; // construct with memory with dynamic shape - ASSERT_NO_THROW(t = std::make_shared(create_memory(Precision::FP32, shape))); + ASSERT_NO_THROW(t = std::make_shared(create_memory(ov::element::f32, shape))); ASSERT_THROW(t->get_shape(), ov::Exception); ASSERT_THROW(t->get_strides(), ov::Exception); // change memory to dynamic shape { - auto memptr = create_memory(Precision::FP32, {4, 3, 2}); + auto memptr = create_memory(ov::element::f32, {4, 3, 2}); ASSERT_NO_THROW(t = std::make_shared(memptr)); ov::PartialShape pshape{{1, 10}, 3, 2}; - CpuBlockedMemoryDescPtr desc2 = std::make_shared(Precision::FP32, Shape(pshape)); + CpuBlockedMemoryDescPtr desc2 = std::make_shared(ov::element::f32, Shape(pshape)); memptr->redefineDesc(desc2); ASSERT_THROW(t->get_shape(), ov::Exception); ASSERT_THROW(t->get_strides(), ov::Exception); @@ -127,7 +127,7 @@ TEST_F(CPUTensorExtTest, canCreateTensorWithDynamicShape) { // set_shape const ov::Shape newShape({4, 0, 2}); - ASSERT_NO_THROW(t = std::make_shared(create_memory(Precision::FP32, {4, 3, 2}))); + ASSERT_NO_THROW(t = std::make_shared(create_memory(ov::element::f32, {4, 3, 2}))); const void* orig_data = t->data(); ASSERT_NO_THROW(t->set_shape({4, 0, 2})); @@ -139,7 +139,7 @@ TEST_F(CPUTensorExtTest, canCreateTensorWithDynamicShape) { TEST_F(CPUTensorExtTest, canSyncMemoryAndTensor) { Shape orig_shape{4, 3, 2}; - auto memptr = create_memory(Precision::FP32, orig_shape); + auto memptr = create_memory(ov::element::f32, orig_shape); std::shared_ptr t = std::make_shared(memptr); ASSERT_EQ(memptr->getDescPtr()->getShape().toPartialShape().to_shape(), t->get_shape()); ASSERT_EQ(byteStrides(memptr->getDescWithType()->getStrides(), t->get_element_type()), t->get_strides()); diff --git a/src/plugins/intel_cpu/tests/unit/dnnl_memory_desc_test.cpp b/src/plugins/intel_cpu/tests/unit/dnnl_memory_desc_test.cpp index 649466bd3a792a..1f6818b7d6309b 100644 --- a/src/plugins/intel_cpu/tests/unit/dnnl_memory_desc_test.cpp +++ b/src/plugins/intel_cpu/tests/unit/dnnl_memory_desc_test.cpp @@ -192,7 +192,7 @@ TEST(MemDescTest, KeepOrder) { using dnnl::memory; Shape dims(VectorDims{7, 3, 1, 5}); memory::data_type dataType = memory::data_type::u8; - DnnlBlockedMemoryDesc descPalanar(DnnlExtensionUtils::DataTypeToIEPrecision(dataType), dims); + DnnlBlockedMemoryDesc descPalanar(DnnlExtensionUtils::DataTypeToElementType(dataType), dims); ASSERT_THAT(descPalanar.getOrder(), ElementsAre(0, 1, 2, 3)); DnnlBlockedMemoryDesc descTailC(dims, dataType, memory::format_tag::acdb); @@ -235,7 +235,7 @@ TEST(MemDescTest, UndefinedState) { ASSERT_TRUE(definedDesc->isDefined()); auto creator = BlockedDescCreator::getCommonCreators().at(LayoutType::nCsp8c); - auto cpuBlockedDesc = creator->createSharedDesc(Precision::FP32, pluginShape); + auto cpuBlockedDesc = creator->createSharedDesc(ov::element::f32, pluginShape); ASSERT_FALSE(cpuBlockedDesc->isDefined()); @@ -258,7 +258,7 @@ TEST(MemDescTest, UndefinedState) { TEST(MemDescTest, MemSize) { constexpr size_t undefSize = MemoryDesc::UNDEFINED_SIZE; static const auto dnnlDataType = dnnl::memory::data_type::f32; - static const Precision iePrc = Precision::FP32; + static const ov::element::Type iePrc = ov::element::f32; ngraph::PartialShape ngraphShapeUndef({{16}, {-1, -1}, {20, 30}, {7}}); diff --git a/src/plugins/intel_cpu/tests/unit/dnnl_memory_test.cpp b/src/plugins/intel_cpu/tests/unit/dnnl_memory_test.cpp index b2728ee309ec1c..358003d75b497c 100644 --- a/src/plugins/intel_cpu/tests/unit/dnnl_memory_test.cpp +++ b/src/plugins/intel_cpu/tests/unit/dnnl_memory_test.cpp @@ -25,7 +25,7 @@ TEST(MemoryTest, ConcurrentGetPrimitive) { dnnl::engine eng(dnnl::engine::kind::cpu, 0); dnnl::memory dnnl_mem1; dnnl::memory dnnl_mem2; - auto desc = std::make_shared(Precision::FP32, Shape{10, 2}); + auto desc = std::make_shared(ov::element::f32, Shape{10, 2}); Memory cpu_mem1(eng, desc); std::atomic lock{true}; @@ -53,10 +53,10 @@ TEST(MemoryTest, ConcurrentResizeGetPrimitive) { dnnl::engine eng(dnnl::engine::kind::cpu, 0); for (size_t i = 0; i < number_of_attempts; ++i) { dnnl::memory dnnl_mem; - auto desc = std::make_shared(Precision::FP32, Shape{10, 2}); + auto desc = std::make_shared(ov::element::f32, Shape{10, 2}); Memory cpu_mem1(eng, desc); Memory cpu_mem2(eng, desc, cpu_mem1.getMemoryMngr()); - auto desc2 = std::make_shared(Precision::FP32, Shape{10, 20}); + auto desc2 = std::make_shared(ov::element::f32, Shape{10, 20}); std::atomic lock{true}; diff --git a/src/plugins/intel_cpu/tests/unit/dnnl_zero_dims_test.cpp b/src/plugins/intel_cpu/tests/unit/dnnl_zero_dims_test.cpp index affde8b61bf908..89c5862059ff09 100644 --- a/src/plugins/intel_cpu/tests/unit/dnnl_zero_dims_test.cpp +++ b/src/plugins/intel_cpu/tests/unit/dnnl_zero_dims_test.cpp @@ -19,7 +19,7 @@ class MemDescWithZeroDimsBaseTest: public ::testing::Test { protected: Shape shape; dnnl::memory::format_tag fmt; - const InferenceEngine::Precision precision = InferenceEngine::Precision::FP32; + const ov::element::Type precision = ov::element::f32; void validate(const BlockedMemoryDesc& desc, const VectorDims& expectedStrieds, size_t offsetSize, size_t offsetPaddingSize, size_t maxMemSize, bool orderCheckSkip = false) { @@ -30,7 +30,7 @@ class MemDescWithZeroDimsBaseTest: public ::testing::Test { auto replaceShape = origShape; std::replace(replaceShape.begin(), replaceShape.end(), ngraph::Dimension(0), ngraph::Dimension(3)); Shape dummyShape(replaceShape); - DnnlBlockedMemoryDesc dummyDesc(dummyShape, DnnlExtensionUtils::IEPrecisionToDataType(precision), fmt); + DnnlBlockedMemoryDesc dummyDesc(dummyShape, DnnlExtensionUtils::ElementTypeToDataType(precision), fmt); expectedBlkDims = dummyDesc.getBlockDims(); expectedOrder = dummyDesc.getOrder(); for (size_t i = 0; i < dummyShape.getRank(); i++) { @@ -134,7 +134,7 @@ class MemDescWithZeroDimsFmtTest: public testing::WithParamInterface createDescs() const override { - DnnlBlockedMemoryDesc descDnnl(shape, DnnlExtensionUtils::IEPrecisionToDataType(precision), fmt); + DnnlBlockedMemoryDesc descDnnl(shape, DnnlExtensionUtils::ElementTypeToDataType(precision), fmt); CpuBlockedMemoryDesc descCpu(precision, shape, descDnnl.getBlockDims(), descDnnl.getOrder()); return {descDnnl, descCpu}; } @@ -213,7 +213,7 @@ class MemDescWithZeroDimsCloneNewDimsTest: public testing::WithParamInterface eltwise_data = { @@ -25,14 +25,14 @@ TEST(EltwisePrecisionHelperTest, get_precision_mixed) { }; const auto precision = ov::intel_cpu::node::eltwise_precision_helper::get_precision(inputs_size, src_prc, eltwise_data); - ASSERT_EQ(InferenceEngine::Precision::I32, precision); + ASSERT_EQ(ov::element::i32, precision); } TEST(EltwisePrecisionHelperTest, get_precision_single) { - InferenceEngine::Precision src_prc[MAX_ELTWISE_INPUTS]; + ov::element::Type src_prc[MAX_ELTWISE_INPUTS]; const size_t inputs_size = 4ull; for (size_t i = 0; i < inputs_size; ++i) { - src_prc[i] = InferenceEngine::Precision::I32; + src_prc[i] = ov::element::i32; } std::vector eltwise_data = { @@ -41,5 +41,5 @@ TEST(EltwisePrecisionHelperTest, get_precision_single) { }; const auto precision = ov::intel_cpu::node::eltwise_precision_helper::get_precision(inputs_size, src_prc, eltwise_data); - ASSERT_EQ(InferenceEngine::Precision::FP32, precision); + ASSERT_EQ(ov::element::f32, precision); } diff --git a/src/plugins/intel_cpu/tests/unit/nodes/reorder_node_test.cpp b/src/plugins/intel_cpu/tests/unit/nodes/reorder_node_test.cpp index 838fb291e5023c..c54dd4a3a757fe 100644 --- a/src/plugins/intel_cpu/tests/unit/nodes/reorder_node_test.cpp +++ b/src/plugins/intel_cpu/tests/unit/nodes/reorder_node_test.cpp @@ -24,7 +24,7 @@ using namespace ov::intel_cpu; namespace ReorderCPUTest { inline void checkReorder(const ov::intel_cpu::IMemory& inputMemory, const ov::intel_cpu::IMemory& outputMemory, - const InferenceEngine::Precision& prescision) { + const ov::element::Type& prescision) { auto srcData = inputMemory.getData(); auto dstData = outputMemory.getData(); auto mdInput = inputMemory.getDescWithType()->getDnnlDesc(); @@ -38,20 +38,20 @@ inline void checkReorder(const ov::intel_cpu::IMemory& inputMemory, auto srcOffset = mdwInput.off_l(i, false); auto dstOffset = mdwOutput.off_l(i, false); switch (prescision) { - case InferenceEngine::Precision::FP32: { + case ov::element::f32: { auto s = *(static_cast(srcData) + srcOffset); auto d = *(static_cast(dstData) + dstOffset); ASSERT_EQ(s, d) << "mismatch at position " << i; break; } - case InferenceEngine::Precision::I8: { + case ov::element::i8: { auto s = *(static_cast(srcData) + srcOffset); auto d = *(static_cast(dstData) + dstOffset); ASSERT_EQ(s, d) << "mismatch at position " << i; break; } default: - FAIL() << "Unsupported data precision in the test" << prescision.name(); + FAIL() << "Unsupported data precision in the test" << prescision.get_type_name(); } } } @@ -68,22 +68,22 @@ inline std::string layoutName(const LayoutType& layout) { return "Unsupported layout type"; } -inline void fillData(const ov::intel_cpu::IMemory& inputMemory, const InferenceEngine::Precision& prec) { +inline void fillData(const ov::intel_cpu::IMemory& inputMemory, const ov::element::Type& prec) { ov::intel_cpu::DnnlMemoryDescPtr dnnlMdInput = inputMemory.getDescWithType(); const dnnl::impl::memory_desc_wrapper mdInput{dnnlMdInput->getDnnlDesc().get()}; auto elemNum = mdInput.nelems(); auto inputReorderData = inputMemory.getData(); switch (prec) { - case InferenceEngine::Precision::FP32: + case ov::element::f32: for (int64_t i = 0; i < elemNum; ++i) *(static_cast(inputReorderData) + mdInput.off_l(i, false)) = static_cast(i); break; - case InferenceEngine::Precision::I8: + case ov::element::i8: for (int64_t i = 0; i < elemNum; ++i) *(static_cast(inputReorderData) + mdInput.off_l(i, false)) = static_cast(i); break; default: - FAIL() << "Unsupported data precision in the test" << prec.name(); + FAIL() << "Unsupported data precision in the test" << prec.get_type_name(); } } struct ReorderCustomImplTestParamSet { @@ -91,7 +91,7 @@ struct ReorderCustomImplTestParamSet { std::vector srcDims; bool isNspc2Ncsp; uint32_t strideFactor; - InferenceEngine::Precision prec; + ov::element::Type prec; size_t stridedAxis; }; @@ -101,7 +101,7 @@ struct ReorderCPUTestParamSet { std::vector> inputShapes; LayoutType srcLayout; LayoutType dstLayout; - InferenceEngine::Precision prec; + ov::element::Type prec; }; class ReorderCPUTestGraph { @@ -157,7 +157,7 @@ class ReorderCPUTestGraph { std::shared_ptr outputNode; std::shared_ptr parentEdge; std::shared_ptr childEdge; - InferenceEngine::Precision prec; + ov::element::Type prec; }; }// namespace ReorderCPUTest @@ -179,8 +179,8 @@ class ReorderCustomizedStrideTest : public ::testing::Test, result << "IS:("; result << ov::test::utils::vec2str(p.srcDims); result << (p.isNspc2Ncsp ? "_NSPC2NCSP" : "_NCSP2NSPC"); - result << "_InputDataType:" << p.prec.name(); - result << "_OutputDataType:" << p.prec.name(); + result << "_InputDataType:" << p.prec.get_type_name(); + result << "_OutputDataType:" << p.prec.get_type_name(); result << "_StrideFactor:" << p.strideFactor; result << "_StridedLogicChannelIndice:" << p.stridedAxis; result << ")"; @@ -202,7 +202,7 @@ class ReorderCustomizedStrideTest : public ::testing::Test, // The custom NSPC2NCSP impl is used only if an input shape complies with: ASSERT_TRUE(srcDims[1] <= 64 && srcDims[1] >= 16 && (getNumElems(srcDims) / srcDims[1]) >= 128); // The custom NSPC2NCSP impl is used only for FP32 - prec = InferenceEngine::Precision::FP32; + prec = ov::element::f32; srcOrder = std::vector{0, 2, 3, 1}; dstOrder = std::vector{0, 1, 2, 3}; } else { @@ -210,7 +210,7 @@ class ReorderCustomizedStrideTest : public ::testing::Test, srcOrder = std::vector{0, 1, 2, 3}; dstOrder = std::vector{0, 2, 3, 1}; // The custom NSPC2NCSP impl is used only for U8 - prec = InferenceEngine::Precision::I8; + prec = ov::element::i8; } dstDims = srcDims; // Create strided dst layout for the inPlace case, @@ -294,13 +294,13 @@ TEST_P(ReorderCustomizedStrideTest, OutputIsStrided) { } const auto stridedParameter = - ::testing::Values(ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 2, InferenceEngine::Precision::FP32, 0}, - ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 4, InferenceEngine::Precision::FP32, 1}, - ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 3, InferenceEngine::Precision::FP32, 1}, - ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 1, InferenceEngine::Precision::FP32, 2}, - ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 2, InferenceEngine::Precision::I8, 0}, - ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 5, InferenceEngine::Precision::I8, 1}, - ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 1, InferenceEngine::Precision::I8, 2}); + ::testing::Values(ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 2, ov::element::f32, 0}, + ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 4, ov::element::f32, 1}, + ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 3, ov::element::f32, 1}, + ReorderCustomImplTestParamSet{{2, 16, 8, 8}, true, 1, ov::element::f32, 2}, + ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 2, ov::element::i8, 0}, + ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 5, ov::element::i8, 1}, + ReorderCustomImplTestParamSet{{2, 8, 4, 4}, false, 1, ov::element::i8, 2}); INSTANTIATE_TEST_SUITE_P(smoke_ReorderTestCustomStrideWithFactor, ReorderCustomizedStrideTest, @@ -324,8 +324,8 @@ class ReorderDynamismCPUTest : public ::testing::Test, } result << "_InputLayoutType:" << layoutName(p.srcLayout) << "."; result << "_OutputLayoutType:" << layoutName(p.dstLayout) << "."; - result << "_InputDataType:" << p.prec.name(); - result << "_OutputDataType:" << p.prec.name(); + result << "_InputDataType:" << p.prec.get_type_name(); + result << "_OutputDataType:" << p.prec.get_type_name(); result << ")"; return result.str(); } @@ -399,22 +399,22 @@ const auto reorderCpuTestDynamismParams = {{2, 16, 8, 8}, {2, 16, 8, 16}, {2, 16, 8, 8}}, LayoutType::nspc, LayoutType::ncsp, - InferenceEngine::Precision::FP32}, + ov::element::f32}, ReorderCPUTestParamSet{{-1, -1, -1, -1}, {{2, 8, 4, 4}, {2, 8, 8, 4}, {2, 8, 4, 4}}, LayoutType::ncsp, LayoutType::nspc, - InferenceEngine::Precision::FP32}, + ov::element::f32}, ReorderCPUTestParamSet{{2, 32, -1, 4}, {{2, 32, 3, 4}, {2, 32, 6, 4}, {2, 32, 3, 4}}, LayoutType::ncsp, LayoutType::nCsp8c, - InferenceEngine::Precision::FP32}, + ov::element::f32}, ReorderCPUTestParamSet{{-1, 32, -1, -1}, {{2, 32, 3, 4}, {2, 32, 6, 4}, {2, 32, 3, 4}}, LayoutType::nCsp16c, LayoutType::nspc, - InferenceEngine::Precision::I8}); + ov::element::i8}); INSTANTIATE_TEST_SUITE_P(smoke_ReorderTestDynamism, ReorderDynamismCPUTest, diff --git a/src/plugins/intel_cpu/tests/unit/shape_inference_test/custom_shape_infer/custom_shape_infer.cpp b/src/plugins/intel_cpu/tests/unit/shape_inference_test/custom_shape_infer/custom_shape_infer.cpp index f4a35907253017..26e60df4edba70 100644 --- a/src/plugins/intel_cpu/tests/unit/shape_inference_test/custom_shape_infer/custom_shape_infer.cpp +++ b/src/plugins/intel_cpu/tests/unit/shape_inference_test/custom_shape_infer/custom_shape_infer.cpp @@ -127,7 +127,7 @@ void cpu_test_shape_infer(ov::Node* op, elementType = const_op->get_element_type(); } CpuBlockedMemoryDesc desc( - InferenceEngine::details::convertPrecision(elementType), + elementType, ov::intel_cpu::Shape(tmpInputShapes[port])); MemoryPtr memoryPtr = std::make_shared(eng, desc, data, true); cusInputValues[port] = memoryPtr; diff --git a/src/tests/functional/plugin/shared/src/execution_graph_tests/runtime_precision.cpp b/src/tests/functional/plugin/shared/src/execution_graph_tests/runtime_precision.cpp index b596510eb17451..0cc83d81c494a9 100644 --- a/src/tests/functional/plugin/shared/src/execution_graph_tests/runtime_precision.cpp +++ b/src/tests/functional/plugin/shared/src/execution_graph_tests/runtime_precision.cpp @@ -123,9 +123,9 @@ TEST_P(ExecGraphRuntimePrecision, CheckRuntimePrecision) { if (rtIter == rtInfo.end()) FAIL() << "Runtime precision is not found for node: " << opIter->get()->get_friendly_name(); - if (expectedPrc.second.name() != rtIter->second.as()) + if (InferenceEngine::details::convertPrecision(expectedPrc.second).get_type_name() != rtIter->second.as()) FAIL() << "`" << expectedPrc.first << "' node runtime precision mismatch: actual = " << - rtIter->second.as() << ", expected = " << expectedPrc.second.name(); + rtIter->second.as() << ", expected = " << InferenceEngine::details::convertPrecision(expectedPrc.second).get_type_name(); } fnPtr.reset(); diff --git a/src/tests/functional/plugin/shared/src/low_precision_transformations/elementwise_branch_selection_transformation.cpp b/src/tests/functional/plugin/shared/src/low_precision_transformations/elementwise_branch_selection_transformation.cpp index 86e2cb22672b9d..f21455b9b45c5c 100644 --- a/src/tests/functional/plugin/shared/src/low_precision_transformations/elementwise_branch_selection_transformation.cpp +++ b/src/tests/functional/plugin/shared/src/low_precision_transformations/elementwise_branch_selection_transformation.cpp @@ -100,7 +100,7 @@ void ElementwiseBranchSelectionTransformation::Run() { } else if (type == "Convolution") { const auto& precisionIt = it.second.find("runtimePrecision"); const auto precision = precisionIt->second.as(); - ASSERT_EQ("U8", precision); + ASSERT_EQ("u8", precision); } } diff --git a/src/tests/functional/plugin/shared/src/low_precision_transformations/eliminate_fake_quantize_transformation.cpp b/src/tests/functional/plugin/shared/src/low_precision_transformations/eliminate_fake_quantize_transformation.cpp index 9b6b99a7cfd964..14cb7b9daffe48 100644 --- a/src/tests/functional/plugin/shared/src/low_precision_transformations/eliminate_fake_quantize_transformation.cpp +++ b/src/tests/functional/plugin/shared/src/low_precision_transformations/eliminate_fake_quantize_transformation.cpp @@ -73,7 +73,7 @@ TEST_P(EliminateFakeQuantizeTransformation, CompareWithRefImpl) { if (type == "Convolution") { const auto& precision_it = it.second.find("runtimePrecision"); const auto& precision = precision_it->second.as(); - if (precision == "U8") { + if (precision == "u8") { int8_convolutions++; } } diff --git a/src/tests/functional/plugin/shared/src/low_precision_transformations/multiply_transformation.cpp b/src/tests/functional/plugin/shared/src/low_precision_transformations/multiply_transformation.cpp index e913ae4d117ab4..6aa3f96aeb0871 100644 --- a/src/tests/functional/plugin/shared/src/low_precision_transformations/multiply_transformation.cpp +++ b/src/tests/functional/plugin/shared/src/low_precision_transformations/multiply_transformation.cpp @@ -77,13 +77,13 @@ void MultiplyTransformation::Run() { auto to_string = [](const ngraph::element::Type& precision) -> std::string { switch (precision) { case ngraph::element::f32: { - return "FP32"; + return "f32"; } case ngraph::element::i8: { - return "I8"; + return "i8"; } case ngraph::element::u8: { - return "U8"; + return "u8"; } default: { return "";