@@ -148,30 +148,30 @@ define amdgpu_ps void @init_exec(i64 %var) {
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ret void
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}
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- declare i32 @llvm.amdgcn.s.sendmsg (i32 , i32 )
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+ declare void @llvm.amdgcn.s.sendmsg (i32 , i32 )
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define void @sendmsg (i32 %arg0 , i32 %arg1 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sendmsg(i32 %arg0, i32 %arg1)
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- %val = call i32 @llvm.amdgcn.s.sendmsg (i32 %arg0 , i32 %arg1 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 %arg0, i32 %arg1)
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+ call void @llvm.amdgcn.s.sendmsg (i32 %arg0 , i32 %arg1 )
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ret void
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}
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- declare i32 @llvm.amdgcn.s.sendmsghalt (i32 , i32 )
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+ declare void @llvm.amdgcn.s.sendmsghalt (i32 , i32 )
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define void @sendmsghalt (i32 %arg0 , i32 %arg1 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sendmsghalt(i32 %arg0, i32 %arg1)
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- %val = call i32 @llvm.amdgcn.s.sendmsghalt (i32 %arg0 , i32 %arg1 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sendmsghalt(i32 %arg0, i32 %arg1)
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+ call void @llvm.amdgcn.s.sendmsghalt (i32 %arg0 , i32 %arg1 )
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ret void
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}
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- declare i32 @llvm.amdgcn.s.waitcnt (i32 )
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+ declare void @llvm.amdgcn.s.waitcnt (i32 )
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define void @waitcnt (i32 %arg0 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.waitcnt(i32 %arg0)
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- %val = call i32 @llvm.amdgcn.s.waitcnt (i32 %arg0 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.waitcnt(i32 %arg0)
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+ call void @llvm.amdgcn.s.waitcnt (i32 %arg0 )
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ret void
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}
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@@ -184,30 +184,30 @@ define void @getreg(i32 %arg0, i32 %arg1) {
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ret void
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}
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- declare i32 @llvm.amdgcn.s.sleep (i32 )
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+ declare void @llvm.amdgcn.s.sleep (i32 )
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define void @sleep (i32 %arg0 , i32 %arg1 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.sleep(i32 %arg0)
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- %val = call i32 @llvm.amdgcn.s.sleep (i32 %arg0 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.sleep(i32 %arg0)
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+ call void @llvm.amdgcn.s.sleep (i32 %arg0 )
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ret void
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}
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- declare i32 @llvm.amdgcn.s.incperflevel (i32 )
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+ declare void @llvm.amdgcn.s.incperflevel (i32 )
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define void @incperflevel (i32 %arg0 , i32 %arg1 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.incperflevel(i32 %arg0)
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- %val = call i32 @llvm.amdgcn.s.incperflevel (i32 %arg0 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.incperflevel(i32 %arg0)
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+ call void @llvm.amdgcn.s.incperflevel (i32 %arg0 )
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ret void
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}
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- declare i32 @llvm.amdgcn.s.decperflevel (i32 )
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+ declare void @llvm.amdgcn.s.decperflevel (i32 )
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define void @decperflevel (i32 %arg0 , i32 %arg1 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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- ; CHECK-NEXT: %val = call i32 @llvm.amdgcn.s.decperflevel(i32 %arg0)
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- %val = call i32 @llvm.amdgcn.s.decperflevel (i32 %arg0 )
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+ ; CHECK-NEXT: call void @llvm.amdgcn.s.decperflevel(i32 %arg0)
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+ call void @llvm.amdgcn.s.decperflevel (i32 %arg0 )
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ret void
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}
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@@ -629,25 +629,25 @@ define void @test_interp_p2_f16(float %arg0, float %arg1, i32 %arg2, i32 %arg3,
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ret void
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}
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- declare <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float , float , <32 x i32 >, i32 , i32 , i32 )
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- define void @test_mfma_f32_32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 %arg3 , i32 %arg4 , i32 %arg5 ) {
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+ declare <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float , float , <32 x float >, i32 , i32 , i32 )
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+ define void @test_mfma_f32_32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 %arg3 , i32 %arg4 , i32 %arg5 ) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg3
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- ; CHECK-NEXT: %val0 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 %arg3, i32 2, i32 3)
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- %val0 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 %arg3 , i32 2 , i32 3 )
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- store volatile <32 x i32 > %val0 , ptr addrspace (1 ) undef
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+ ; CHECK-NEXT: %val0 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 %arg3, i32 2, i32 3)
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+ %val0 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 %arg3 , i32 2 , i32 3 )
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+ store volatile <32 x float > %val0 , ptr addrspace (1 ) undef
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg4
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- ; CHECK-NEXT: %val1 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 1, i32 %arg4, i32 3)
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- %val1 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 1 , i32 %arg4 , i32 3 )
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- store volatile <32 x i32 > %val1 , ptr addrspace (1 ) undef
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+ ; CHECK-NEXT: %val1 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 1, i32 %arg4, i32 3)
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+ %val1 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 1 , i32 %arg4 , i32 3 )
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+ store volatile <32 x float > %val1 , ptr addrspace (1 ) undef
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg5
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- ; CHECK-NEXT: %val2 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x i32 > %arg2, i32 1, i32 2, i32 %arg5)
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- %val2 = call <32 x i32 > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x i32 > %arg2 , i32 1 , i32 2 , i32 %arg5 )
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- store volatile <32 x i32 > %val2 , ptr addrspace (1 ) undef
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+ ; CHECK-NEXT: %val2 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32(float %arg0, float %arg1, <32 x float > %arg2, i32 1, i32 2, i32 %arg5)
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+ %val2 = call <32 x float > @llvm.amdgcn.mfma.f32.32x32x1f32 (float %arg0 , float %arg1 , <32 x float > %arg2 , i32 1 , i32 2 , i32 %arg5 )
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+ store volatile <32 x float > %val2 , ptr addrspace (1 ) undef
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ret void
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}
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