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[clang][RISCV] Support RVV bfloat16 C intrinsics (llvm#89354)
It follows the interface defined here: riscv-non-isa/rvv-intrinsic-doc#293
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‎clang/include/clang/Basic/riscv_vector.td

Lines changed: 73 additions & 21 deletions
Large diffs are not rendered by default.

‎clang/include/clang/Support/RISCVVIntrinsicUtils.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -502,7 +502,8 @@ enum RVVRequire : uint32_t {
502502
RVV_REQ_Zvksed = 1 << 14,
503503
RVV_REQ_Zvksh = 1 << 15,
504504
RVV_REQ_Zvfbfwma = 1 << 16,
505-
RVV_REQ_Experimental = 1 << 17,
505+
RVV_REQ_Zvfbfmin = 1 << 17,
506+
RVV_REQ_Experimental = 1 << 18,
506507

507508
LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Experimental)
508509
};

‎clang/lib/Sema/SemaRISCVVectorLookup.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -216,6 +216,7 @@ void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
216216
{"zvksed", RVV_REQ_Zvksed},
217217
{"zvksh", RVV_REQ_Zvksh},
218218
{"zvfbfwma", RVV_REQ_Zvfbfwma},
219+
{"zvfbfmin", RVV_REQ_Zvfbfmin},
219220
{"experimental", RVV_REQ_Experimental}};
220221

221222
// Construction of RVVIntrinsicRecords need to sync with createRVVIntrinsics

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c

Lines changed: 477 additions & 0 deletions
Large diffs are not rendered by default.

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c

Lines changed: 333 additions & 0 deletions
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‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16.c

Lines changed: 132 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,132 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2+
// REQUIRES: riscv-registered-target
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
6+
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
7+
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
8+
9+
#include <riscv_vector.h>
10+
11+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16_v_bf16mf4(
12+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
13+
// CHECK-RV64-NEXT: entry:
14+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vle.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
15+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
16+
//
17+
vbfloat16mf4_t test_vle16_v_bf16mf4(const __bf16 *rs1, size_t vl) {
18+
return __riscv_vle16_v_bf16mf4(rs1, vl);
19+
}
20+
21+
// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16_v_bf16mf2(
22+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
23+
// CHECK-RV64-NEXT: entry:
24+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vle.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
25+
// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
26+
//
27+
vbfloat16mf2_t test_vle16_v_bf16mf2(const __bf16 *rs1, size_t vl) {
28+
return __riscv_vle16_v_bf16mf2(rs1, vl);
29+
}
30+
31+
// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16_v_bf16m1(
32+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
33+
// CHECK-RV64-NEXT: entry:
34+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vle.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
35+
// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
36+
//
37+
vbfloat16m1_t test_vle16_v_bf16m1(const __bf16 *rs1, size_t vl) {
38+
return __riscv_vle16_v_bf16m1(rs1, vl);
39+
}
40+
41+
// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16_v_bf16m2(
42+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
43+
// CHECK-RV64-NEXT: entry:
44+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vle.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
45+
// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
46+
//
47+
vbfloat16m2_t test_vle16_v_bf16m2(const __bf16 *rs1, size_t vl) {
48+
return __riscv_vle16_v_bf16m2(rs1, vl);
49+
}
50+
51+
// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16_v_bf16m4(
52+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
53+
// CHECK-RV64-NEXT: entry:
54+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vle.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
55+
// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
56+
//
57+
vbfloat16m4_t test_vle16_v_bf16m4(const __bf16 *rs1, size_t vl) {
58+
return __riscv_vle16_v_bf16m4(rs1, vl);
59+
}
60+
61+
// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16_v_bf16m8(
62+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
63+
// CHECK-RV64-NEXT: entry:
64+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vle.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
65+
// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
66+
//
67+
vbfloat16m8_t test_vle16_v_bf16m8(const __bf16 *rs1, size_t vl) {
68+
return __riscv_vle16_v_bf16m8(rs1, vl);
69+
}
70+
71+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16_v_bf16mf4_m(
72+
// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
73+
// CHECK-RV64-NEXT: entry:
74+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vle.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3)
75+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
76+
//
77+
vbfloat16mf4_t test_vle16_v_bf16mf4_m(vbool64_t vm, const __bf16 *rs1,
78+
size_t vl) {
79+
return __riscv_vle16_v_bf16mf4_m(vm, rs1, vl);
80+
}
81+
82+
// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16_v_bf16mf2_m(
83+
// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
84+
// CHECK-RV64-NEXT: entry:
85+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vle.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3)
86+
// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
87+
//
88+
vbfloat16mf2_t test_vle16_v_bf16mf2_m(vbool32_t vm, const __bf16 *rs1,
89+
size_t vl) {
90+
return __riscv_vle16_v_bf16mf2_m(vm, rs1, vl);
91+
}
92+
93+
// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16_v_bf16m1_m(
94+
// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
95+
// CHECK-RV64-NEXT: entry:
96+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vle.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3)
97+
// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
98+
//
99+
vbfloat16m1_t test_vle16_v_bf16m1_m(vbool16_t vm, const __bf16 *rs1,
100+
size_t vl) {
101+
return __riscv_vle16_v_bf16m1_m(vm, rs1, vl);
102+
}
103+
104+
// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16_v_bf16m2_m(
105+
// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
106+
// CHECK-RV64-NEXT: entry:
107+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vle.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 3)
108+
// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
109+
//
110+
vbfloat16m2_t test_vle16_v_bf16m2_m(vbool8_t vm, const __bf16 *rs1, size_t vl) {
111+
return __riscv_vle16_v_bf16m2_m(vm, rs1, vl);
112+
}
113+
114+
// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16_v_bf16m4_m(
115+
// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
116+
// CHECK-RV64-NEXT: entry:
117+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vle.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 3)
118+
// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
119+
//
120+
vbfloat16m4_t test_vle16_v_bf16m4_m(vbool4_t vm, const __bf16 *rs1, size_t vl) {
121+
return __riscv_vle16_v_bf16m4_m(vm, rs1, vl);
122+
}
123+
124+
// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16_v_bf16m8_m(
125+
// CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
126+
// CHECK-RV64-NEXT: entry:
127+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vle.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], <vscale x 32 x i1> [[VM]], i64 [[VL]], i64 3)
128+
// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
129+
//
130+
vbfloat16m8_t test_vle16_v_bf16m8_m(vbool2_t vm, const __bf16 *rs1, size_t vl) {
131+
return __riscv_vle16_v_bf16m8_m(vm, rs1, vl);
132+
}

‎clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16ff.c

Lines changed: 177 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,177 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2+
// REQUIRES: riscv-registered-target
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
6+
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
7+
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
8+
9+
#include <riscv_vector.h>
10+
11+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16ff_v_bf16mf4(
12+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
13+
// CHECK-RV64-NEXT: entry:
14+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 1 x bfloat>, i64 } @llvm.riscv.vleff.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
15+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 1 x bfloat>, i64 } [[TMP0]], 0
16+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 1 x bfloat>, i64 } [[TMP0]], 1
17+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
18+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP1]]
19+
//
20+
vbfloat16mf4_t test_vle16ff_v_bf16mf4(const __bf16 *rs1, size_t *new_vl,
21+
size_t vl) {
22+
return __riscv_vle16ff_v_bf16mf4(rs1, new_vl, vl);
23+
}
24+
25+
// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16ff_v_bf16mf2(
26+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
27+
// CHECK-RV64-NEXT: entry:
28+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 2 x bfloat>, i64 } @llvm.riscv.vleff.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
29+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 2 x bfloat>, i64 } [[TMP0]], 0
30+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 2 x bfloat>, i64 } [[TMP0]], 1
31+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
32+
// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP1]]
33+
//
34+
vbfloat16mf2_t test_vle16ff_v_bf16mf2(const __bf16 *rs1, size_t *new_vl,
35+
size_t vl) {
36+
return __riscv_vle16ff_v_bf16mf2(rs1, new_vl, vl);
37+
}
38+
39+
// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16ff_v_bf16m1(
40+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
41+
// CHECK-RV64-NEXT: entry:
42+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 4 x bfloat>, i64 } @llvm.riscv.vleff.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
43+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 4 x bfloat>, i64 } [[TMP0]], 0
44+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 4 x bfloat>, i64 } [[TMP0]], 1
45+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
46+
// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP1]]
47+
//
48+
vbfloat16m1_t test_vle16ff_v_bf16m1(const __bf16 *rs1, size_t *new_vl,
49+
size_t vl) {
50+
return __riscv_vle16ff_v_bf16m1(rs1, new_vl, vl);
51+
}
52+
53+
// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16ff_v_bf16m2(
54+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
55+
// CHECK-RV64-NEXT: entry:
56+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 8 x bfloat>, i64 } @llvm.riscv.vleff.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
57+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 8 x bfloat>, i64 } [[TMP0]], 0
58+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, i64 } [[TMP0]], 1
59+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
60+
// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]
61+
//
62+
vbfloat16m2_t test_vle16ff_v_bf16m2(const __bf16 *rs1, size_t *new_vl,
63+
size_t vl) {
64+
return __riscv_vle16ff_v_bf16m2(rs1, new_vl, vl);
65+
}
66+
67+
// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16ff_v_bf16m4(
68+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
69+
// CHECK-RV64-NEXT: entry:
70+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 16 x bfloat>, i64 } @llvm.riscv.vleff.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
71+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 16 x bfloat>, i64 } [[TMP0]], 0
72+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 16 x bfloat>, i64 } [[TMP0]], 1
73+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
74+
// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP1]]
75+
//
76+
vbfloat16m4_t test_vle16ff_v_bf16m4(const __bf16 *rs1, size_t *new_vl,
77+
size_t vl) {
78+
return __riscv_vle16ff_v_bf16m4(rs1, new_vl, vl);
79+
}
80+
81+
// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16ff_v_bf16m8(
82+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
83+
// CHECK-RV64-NEXT: entry:
84+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 32 x bfloat>, i64 } @llvm.riscv.vleff.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
85+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 32 x bfloat>, i64 } [[TMP0]], 0
86+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 32 x bfloat>, i64 } [[TMP0]], 1
87+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
88+
// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP1]]
89+
//
90+
vbfloat16m8_t test_vle16ff_v_bf16m8(const __bf16 *rs1, size_t *new_vl,
91+
size_t vl) {
92+
return __riscv_vle16ff_v_bf16m8(rs1, new_vl, vl);
93+
}
94+
95+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16ff_v_bf16mf4_m(
96+
// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
97+
// CHECK-RV64-NEXT: entry:
98+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 1 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3)
99+
// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 1 x bfloat>, i64 } [[TMP0]], 0
100+
// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 1 x bfloat>, i64 } [[TMP0]], 1
101+
// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
102+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP1]]
103+
//
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vbfloat16mf4_t test_vle16ff_v_bf16mf4_m(vbool64_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16mf4_m(vm, rs1, new_vl, vl);
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}
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// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16ff_v_bf16mf2_m(
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// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
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// CHECK-RV64-NEXT: entry:
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// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 2 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3)
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// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 2 x bfloat>, i64 } [[TMP0]], 0
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// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 2 x bfloat>, i64 } [[TMP0]], 1
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// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
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// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP1]]
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//
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vbfloat16mf2_t test_vle16ff_v_bf16mf2_m(vbool32_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16mf2_m(vm, rs1, new_vl, vl);
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}
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// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16ff_v_bf16m1_m(
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// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
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// CHECK-RV64-NEXT: entry:
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// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 4 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3)
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// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 4 x bfloat>, i64 } [[TMP0]], 0
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// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 4 x bfloat>, i64 } [[TMP0]], 1
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// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
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// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP1]]
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//
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vbfloat16m1_t test_vle16ff_v_bf16m1_m(vbool16_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16m1_m(vm, rs1, new_vl, vl);
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}
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// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16ff_v_bf16m2_m(
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// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
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// CHECK-RV64-NEXT: entry:
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// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 8 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 3)
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// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 8 x bfloat>, i64 } [[TMP0]], 0
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// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, i64 } [[TMP0]], 1
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// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
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// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]
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//
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vbfloat16m2_t test_vle16ff_v_bf16m2_m(vbool8_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16m2_m(vm, rs1, new_vl, vl);
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}
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// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16ff_v_bf16m4_m(
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// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
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// CHECK-RV64-NEXT: entry:
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// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 16 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 3)
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// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 16 x bfloat>, i64 } [[TMP0]], 0
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// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 16 x bfloat>, i64 } [[TMP0]], 1
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// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
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// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP1]]
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//
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vbfloat16m4_t test_vle16ff_v_bf16m4_m(vbool4_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16m4_m(vm, rs1, new_vl, vl);
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}
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// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16ff_v_bf16m8_m(
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// CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
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// CHECK-RV64-NEXT: entry:
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// CHECK-RV64-NEXT: [[TMP0:%.*]] = call { <vscale x 32 x bfloat>, i64 } @llvm.riscv.vleff.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], <vscale x 32 x i1> [[VM]], i64 [[VL]], i64 3)
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// CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 32 x bfloat>, i64 } [[TMP0]], 0
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// CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 32 x bfloat>, i64 } [[TMP0]], 1
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// CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
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// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP1]]
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//
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vbfloat16m8_t test_vle16ff_v_bf16m8_m(vbool2_t vm, const __bf16 *rs1,
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size_t *new_vl, size_t vl) {
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return __riscv_vle16ff_v_bf16m8_m(vm, rs1, new_vl, vl);
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}

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