PCB for ULX3S FPGA R&D board

A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz

Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

📖 List of FPGA Lattice boards using open tools

TangPrimer-20K-example project

USB DFU bootloader gateware / firmware for FPGAs

Experiments with the LEGO Mindstorms (51515) and SPIKE Prime (45678)

SonicBOOM: The Berkeley Out-of-Order Machine

PicoRV32 - A Size-Optimized RISC-V CPU

A small, light weight, RISC CPU soft core

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

A FPGA friendly 32 bit RISC-V CPU implementation

RiscyOO: RISC-V Out-of-Order Processor

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

32-bit RISC-V system on chip for iCE40 FPGAs

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

MR1 formally verified RISC-V CPU

Cornell CSL's Modular RISC-V RV64IM Out-of-Order Processor Built with PyMTL

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

VeeR EH1 core

In this project the NaCl cryptographic library is being ported to RISC-V

Example litex Risc-V SOC and some example code projects in multiple languages.

Small and low cost FPGA educational and development board

Chisel: A Modern Hardware Design Language

ECP5 breakout board in a feather physical format

Tomu FPGA (Fomu for short), a FPGA which fits inside your USB port!

low cost software radio platform

Build your hardware, easily!

A Python toolbox for building complex digital hardware