Skip to content

Commit 9d369a7

Browse files
committed
riscv: dts: Add full JH7100, Starlight and VisionFive support
Based on the device tree in https://github.com/starfive-tech/u-boot/ with contributions from: yanhong.wang <yanhong.wang@starfivetech.com> Huan.Feng <huan.feng@starfivetech.com> ke.zhu <ke.zhu@starfivetech.com> yiming.li <yiming.li@starfivetech.com> jack.zhu <jack.zhu@starfivetech.com> Samin Guo <samin.guo@starfivetech.com> Chenjieqin <Jessica.Chen@starfivetech.com> bo.li <bo.li@starfivetech.com> Rearranged, cleanups, fixes, pins and resets added by Emil. Cleanups, fixes, clocks added by Geert. Cleanups and GPIO fixes from Drew. Thermal zone added by Stephen. PWM pins added by Jianlong. cpu-map added by Jonas. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Stephen L Arnold <nerdboy@gentoo.org> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Jonas Hahnfeld <hahnjo@hahnjo.de> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
1 parent 613b6eb commit 9d369a7

File tree

6 files changed

+611
-0
lines changed

6 files changed

+611
-0
lines changed

arch/riscv/boot/dts/starfive/Makefile

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,12 @@
11
# SPDX-License-Identifier: GPL-2.0
22
# Enables support for device-tree overlays
3+
DTC_FLAGS_jh7100-beaglev-starlight-a1 := -@
34
DTC_FLAGS_jh7100-beaglev-starlight := -@
45
DTC_FLAGS_jh7100-starfive-visionfive-v1 := -@
56
DTC_FLAGS_jh7110-starfive-visionfive-2-v1.2a := -@
67
DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
78

9+
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight-a1.dtb
810
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
911
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
1012

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
// SPDX-License-Identifier: GPL-2.0 OR MIT
2+
/*
3+
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
4+
*/
5+
6+
/dts-v1/;
7+
#include "jh7100-common.dtsi"
8+
#include <dt-bindings/gpio/gpio.h>
9+
10+
/ {
11+
model = "BeagleV Starlight Beta A1";
12+
compatible = "beagle,beaglev-starlight-jh7100-a1", "starfive,jh7100";
13+
14+
gpio-restart {
15+
compatible = "gpio-restart";
16+
gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
17+
priority = <224>;
18+
};
19+
};
20+
21+
&gpio {
22+
/* don't reset gpio mux for serial console and reset gpio */
23+
starfive,keep-gpiomux = <13 14 63>;
24+
};

arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

77
/dts-v1/;
88
#include "jh7100-common.dtsi"
9+
#include <dt-bindings/gpio/gpio.h>
910

1011
/ {
1112
model = "BeagleV Starlight Beta";
@@ -16,6 +17,11 @@
1617
phy-handle = <&phy>;
1718
};
1819

20+
&gpio {
21+
/* don't reset gpio mux for serial console on uart3 */
22+
starfive,keep-gpiomux = <13 14>;
23+
};
24+
1925
&mdio {
2026
phy: ethernet-phy@7 {
2127
reg = <7>;

arch/riscv/boot/dts/starfive/jh7100-common.dtsi

Lines changed: 177 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
mmc0 = &sdio0;
1616
mmc1 = &sdio1;
1717
serial0 = &uart3;
18+
serial1 = &uart0;
1819
};
1920

2021
chosen {
@@ -47,11 +48,41 @@
4748
#size-cells = <2>;
4849
ranges;
4950

51+
linux,cma {
52+
compatible = "shared-dma-pool";
53+
alloc-ranges = <0x0 0xa0000000 0x0 0x28000000>;
54+
size = <0x0 0x28000000>;
55+
alignment = <0x0 0x1000>;
56+
reusable;
57+
linux,cma-default;
58+
};
59+
60+
jpu_reserved: framebuffer@c9000000 {
61+
reg = <0x0 0xc9000000 0x0 0x4000000>;
62+
};
63+
64+
nvdla_reserved: framebuffer@d0000000 {
65+
reg = <0x0 0xd0000000 0x0 0x28000000>;
66+
no-map;
67+
};
68+
69+
vin_reserved: framebuffer@f9000000 {
70+
compatible = "shared-dma-pool";
71+
reg = <0x0 0xf9000000 0x0 0x1000000>;
72+
no-map;
73+
};
74+
5075
dma-reserved@fa000000 {
5176
reg = <0x0 0xfa000000 0x0 0x1000000>;
5277
no-map;
5378
};
5479

80+
sffb_reserved: framebuffer@fb000000 {
81+
compatible = "shared-dma-pool";
82+
reg = <0x0 0xfb000000 0x0 0x2000000>;
83+
no-map;
84+
};
85+
5586
linux,dma@107a000000 {
5687
compatible = "shared-dma-pool";
5788
reg = <0x10 0x7a000000 0x0 0x1000000>;
@@ -72,6 +103,44 @@
72103
};
73104
};
74105

106+
&display {
107+
memory-region = <&sffb_reserved>;
108+
status = "okay";
109+
};
110+
111+
&crtc {
112+
ddr-format = <4>; //<WIN_FMT_RGB565>;
113+
status = "okay";
114+
115+
port: port@0 {
116+
reg = <0>;
117+
118+
crtc_0_out: endpoint {
119+
remote-endpoint = <&hdmi_input0>;
120+
};
121+
};
122+
};
123+
124+
&encoder {
125+
encoder-type = <2>; // 2-TMDS, 3-LVDS, 6-DSI, 8-DPI
126+
status = "okay";
127+
128+
ports {
129+
port@0 {
130+
hdmi_out: endpoint {
131+
remote-endpoint = <&tda998x_0_input>;
132+
};
133+
};
134+
135+
port@1 {
136+
hdmi_input0: endpoint {
137+
remote-endpoint = <&crtc_0_out>;
138+
};
139+
};
140+
141+
};
142+
};
143+
75144
&gmac {
76145
pinctrl-names = "default";
77146
pinctrl-0 = <&gmac_pins>;
@@ -199,6 +268,20 @@
199268
};
200269
};
201270

271+
pwmdac_pins: pwmdac-0 {
272+
pwmdac-pins {
273+
pinmux = <GPIOMUX(23, GPO_PWMDAC_LEFT_OUT,
274+
GPO_ENABLE, GPI_NONE)>,
275+
<GPIOMUX(24, GPO_PWMDAC_RIGHT_OUT,
276+
GPO_ENABLE, GPI_NONE)>;
277+
bias-disable;
278+
drive-strength = <35>;
279+
input-disable;
280+
input-schmitt-disable;
281+
slew-rate = <0>;
282+
};
283+
};
284+
202285
pwm_pins: pwm-0 {
203286
pwm-pins {
204287
pinmux = <GPIOMUX(7,
@@ -289,6 +372,39 @@
289372
};
290373
};
291374

375+
spi2_pins: spi2-0 {
376+
mosi-pins {
377+
pinmux = <GPIOMUX(18, GPO_SPI2_PAD_TXD,
378+
GPO_ENABLE, GPI_NONE)>;
379+
bias-disable;
380+
input-disable;
381+
input-schmitt-disable;
382+
};
383+
miso-pins {
384+
pinmux = <GPIOMUX(16, GPO_LOW, GPO_DISABLE,
385+
GPI_SPI2_PAD_RXD)>;
386+
bias-pull-up;
387+
input-enable;
388+
input-schmitt-enable;
389+
};
390+
sck-pins {
391+
pinmux = <GPIOMUX(12, GPO_SPI2_PAD_SCK_OUT,
392+
GPO_ENABLE, GPI_NONE)>;
393+
bias-disable;
394+
input-disable;
395+
input-schmitt-disable;
396+
};
397+
ss-pins {
398+
pinmux = <GPIOMUX(15, GPO_SPI2_PAD_SS_0_N,
399+
GPO_ENABLE, GPI_NONE)>,
400+
<GPIOMUX(11, GPO_SPI2_PAD_SS_1_N,
401+
GPO_ENABLE, GPI_NONE)>;
402+
bias-disable;
403+
input-disable;
404+
input-schmitt-disable;
405+
};
406+
};
407+
292408
uart0_pins: uart0-0 {
293409
rx-pins {
294410
pinmux = <GPIOMUX(40, GPO_LOW, GPO_DISABLE,
@@ -364,6 +480,17 @@
364480
regulators {
365481
};
366482
};
483+
484+
tda998x@70 {
485+
compatible = "nxp,tda998x";
486+
reg = <0x70>;
487+
488+
port {
489+
tda998x_0_input: endpoint {
490+
remote-endpoint = <&hdmi_out>;
491+
};
492+
};
493+
};
367494
};
368495

369496
&i2c1 {
@@ -400,6 +527,44 @@
400527
status = "okay";
401528
};
402529

530+
&pwmdac {
531+
pinctrl-names = "default";
532+
pinctrl-0 = <&pwmdac_pins>;
533+
status = "okay";
534+
};
535+
536+
&qspi {
537+
nor_flash: nor-flash@0 {
538+
compatible = "spi-flash";
539+
reg = <0>;
540+
spi-max-frequency = <31250000>;
541+
page-size = <256>;
542+
block-size = <16>;
543+
cdns,read-delay = <4>;
544+
cdns,tshsl-ns = <1>;
545+
cdns,tsd2d-ns = <1>;
546+
cdns,tchsh-ns = <1>;
547+
cdns,tslch-ns = <1>;
548+
spi-tx-bus-width = <1>;
549+
spi-rx-bus-width = <1>;
550+
};
551+
552+
nand_flash: nand-flash@1 {
553+
compatible = "spi-flash-nand";
554+
reg = <1>;
555+
spi-max-frequency = <31250000>;
556+
page-size = <2048>;
557+
block-size = <17>;
558+
cdns,read-delay = <4>;
559+
cdns,tshsl-ns = <1>;
560+
cdns,tsd2d-ns = <1>;
561+
cdns,tchsh-ns = <1>;
562+
cdns,tslch-ns = <1>;
563+
spi-tx-bus-width = <1>;
564+
spi-rx-bus-width = <1>;
565+
};
566+
};
567+
403568
&sdio0 {
404569
broken-cd;
405570
bus-width = <4>;
@@ -428,6 +593,18 @@
428593
};
429594
};
430595

596+
&spi2 {
597+
pinctrl-names = "default";
598+
pinctrl-0 = <&spi2_pins>;
599+
status = "okay";
600+
601+
spi_dev0: spi@0 {
602+
compatible = "rohm,dh2228fv";
603+
spi-max-frequency = <10000000>;
604+
reg = <0>;
605+
};
606+
};
607+
431608
&uart0 {
432609
pinctrl-names = "default";
433610
pinctrl-0 = <&uart0_pins>;

arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,19 @@
2222
phy-handle = <&phy>;
2323
};
2424

25+
&gpio {
26+
/* don't reset gpio mux for serial console and reset gpio */
27+
starfive,keep-gpiomux = <13 14 63>;
28+
};
29+
30+
&i2c0 {
31+
eeprom@50 {
32+
compatible = "atmel,24c04";
33+
reg = <0x50>;
34+
pagesize = <16>;
35+
};
36+
};
37+
2538
/*
2639
* The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
2740
* manual adjustment of the RX internal delay to work properly. The default

0 commit comments

Comments
 (0)