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riscv: dts: Add full JH7100, Starlight and VisionFive support
Based on the device tree in https://github.com/starfive-tech/u-boot/ with contributions from: yanhong.wang <yanhong.wang@starfivetech.com> Huan.Feng <huan.feng@starfivetech.com> ke.zhu <ke.zhu@starfivetech.com> yiming.li <yiming.li@starfivetech.com> jack.zhu <jack.zhu@starfivetech.com> Samin Guo <samin.guo@starfivetech.com> Chenjieqin <Jessica.Chen@starfivetech.com> bo.li <bo.li@starfivetech.com> Rearranged, cleanups, fixes, pins and resets added by Emil. Cleanups, fixes, clocks added by Geert. Cleanups and GPIO fixes from Drew. Thermal zone added by Stephen. PWM pins added by Jianlong. cpu-map added by Jonas. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Stephen L Arnold <nerdboy@gentoo.org> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Jonas Hahnfeld <hahnjo@hahnjo.de> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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‎arch/riscv/boot/dts/starfive/Makefile‎

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Original file line numberDiff line numberDiff line change
@@ -1,10 +1,12 @@
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# SPDX-License-Identifier: GPL-2.0
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# Enables support for device-tree overlays
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DTC_FLAGS_jh7100-beaglev-starlight-a1 := -@
34
DTC_FLAGS_jh7100-beaglev-starlight := -@
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DTC_FLAGS_jh7100-starfive-visionfive-v1 := -@
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DTC_FLAGS_jh7110-starfive-visionfive-2-v1.2a := -@
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DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
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9+
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight-a1.dtb
810
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
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‎arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight-a1.dts‎

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@@ -0,0 +1,24 @@
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
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*/
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6+
/dts-v1/;
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#include "jh7100-common.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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10+
/ {
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model = "BeagleV Starlight Beta A1";
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compatible = "beagle,beaglev-starlight-jh7100-a1", "starfive,jh7100";
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14+
gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
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priority = <224>;
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};
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};
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&gpio {
22+
/* don't reset gpio mux for serial console and reset gpio */
23+
starfive,keep-gpiomux = <13 14 63>;
24+
};

‎arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts‎

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Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
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77
/dts-v1/;
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#include "jh7100-common.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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1011
/ {
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model = "BeagleV Starlight Beta";
@@ -16,6 +17,11 @@
1617
phy-handle = <&phy>;
1718
};
1819

20+
&gpio {
21+
/* don't reset gpio mux for serial console on uart3 */
22+
starfive,keep-gpiomux = <13 14>;
23+
};
24+
1925
&mdio {
2026
phy: ethernet-phy@7 {
2127
reg = <7>;

‎arch/riscv/boot/dts/starfive/jh7100-common.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
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mmc0 = &sdio0;
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mmc1 = &sdio1;
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serial0 = &uart3;
18+
serial1 = &uart0;
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};
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2021
chosen {
@@ -47,11 +48,41 @@
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0xa0000000 0x0 0x28000000>;
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size = <0x0 0x28000000>;
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alignment = <0x0 0x1000>;
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reusable;
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linux,cma-default;
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};
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jpu_reserved: framebuffer@c9000000 {
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reg = <0x0 0xc9000000 0x0 0x4000000>;
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};
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nvdla_reserved: framebuffer@d0000000 {
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reg = <0x0 0xd0000000 0x0 0x28000000>;
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no-map;
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};
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vin_reserved: framebuffer@f9000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xf9000000 0x0 0x1000000>;
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no-map;
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};
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5075
dma-reserved@fa000000 {
5176
reg = <0x0 0xfa000000 0x0 0x1000000>;
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no-map;
5378
};
5479

80+
sffb_reserved: framebuffer@fb000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xfb000000 0x0 0x2000000>;
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no-map;
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};
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5586
linux,dma@107a000000 {
5687
compatible = "shared-dma-pool";
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reg = <0x10 0x7a000000 0x0 0x1000000>;
@@ -72,6 +103,44 @@
72103
};
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};
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&display {
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memory-region = <&sffb_reserved>;
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status = "okay";
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};
110+
111+
&crtc {
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ddr-format = <4>; //<WIN_FMT_RGB565>;
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status = "okay";
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port: port@0 {
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reg = <0>;
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118+
crtc_0_out: endpoint {
119+
remote-endpoint = <&hdmi_input0>;
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};
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};
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};
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&encoder {
125+
encoder-type = <2>; // 2-TMDS, 3-LVDS, 6-DSI, 8-DPI
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status = "okay";
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ports {
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port@0 {
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hdmi_out: endpoint {
131+
remote-endpoint = <&tda998x_0_input>;
132+
};
133+
};
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port@1 {
136+
hdmi_input0: endpoint {
137+
remote-endpoint = <&crtc_0_out>;
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};
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};
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};
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};
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&gmac {
76145
pinctrl-names = "default";
77146
pinctrl-0 = <&gmac_pins>;
@@ -199,6 +268,20 @@
199268
};
200269
};
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271+
pwmdac_pins: pwmdac-0 {
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pwmdac-pins {
273+
pinmux = <GPIOMUX(23, GPO_PWMDAC_LEFT_OUT,
274+
GPO_ENABLE, GPI_NONE)>,
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<GPIOMUX(24, GPO_PWMDAC_RIGHT_OUT,
276+
GPO_ENABLE, GPI_NONE)>;
277+
bias-disable;
278+
drive-strength = <35>;
279+
input-disable;
280+
input-schmitt-disable;
281+
slew-rate = <0>;
282+
};
283+
};
284+
202285
pwm_pins: pwm-0 {
203286
pwm-pins {
204287
pinmux = <GPIOMUX(7,
@@ -289,6 +372,62 @@
289372
};
290373
};
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375+
spi2_pins: spi2-0 {
376+
mosi-pins {
377+
pinmux = <GPIOMUX(18, GPO_SPI2_PAD_TXD,
378+
GPO_ENABLE, GPI_NONE)>;
379+
bias-disable;
380+
input-disable;
381+
input-schmitt-disable;
382+
};
383+
miso-pins {
384+
pinmux = <GPIOMUX(16, GPO_LOW, GPO_DISABLE,
385+
GPI_SPI2_PAD_RXD)>;
386+
bias-pull-up;
387+
input-enable;
388+
input-schmitt-enable;
389+
};
390+
sck-pins {
391+
pinmux = <GPIOMUX(12, GPO_SPI2_PAD_SCK_OUT,
392+
GPO_ENABLE, GPI_NONE)>;
393+
bias-disable;
394+
input-disable;
395+
input-schmitt-disable;
396+
};
397+
ss-pins {
398+
pinmux = <GPIOMUX(15, GPO_SPI2_PAD_SS_0_N,
399+
GPO_ENABLE, GPI_NONE)>,
400+
<GPIOMUX(11, GPO_SPI2_PAD_SS_1_N,
401+
GPO_ENABLE, GPI_NONE)>;
402+
bias-disable;
403+
input-disable;
404+
input-schmitt-disable;
405+
};
406+
};
407+
408+
uart0_pins: uart0-0 {
409+
rx-pins {
410+
pinmux = <GPIOMUX(40, GPO_LOW, GPO_DISABLE,
411+
GPI_UART0_PAD_SIN)>,
412+
<GPIOMUX(39, GPO_LOW, GPO_DISABLE,
413+
GPI_UART0_PAD_CTSN)>;
414+
bias-pull-up;
415+
drive-strength = <14>;
416+
input-enable;
417+
input-schmitt-enable;
418+
};
419+
tx-pins {
420+
pinmux = <GPIOMUX(41, GPO_UART0_PAD_SOUT,
421+
GPO_ENABLE, GPI_NONE)>,
422+
<GPIOMUX(42, GPO_UART0_PAD_RTSN,
423+
GPO_ENABLE, GPI_NONE)>;
424+
bias-disable;
425+
drive-strength = <35>;
426+
input-disable;
427+
input-schmitt-disable;
428+
};
429+
};
430+
292431
uart3_pins: uart3-0 {
293432
rx-pins {
294433
pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
@@ -329,6 +468,17 @@
329468
regulators {
330469
};
331470
};
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472+
tda998x@70 {
473+
compatible = "nxp,tda998x";
474+
reg = <0x70>;
475+
476+
port {
477+
tda998x_0_input: endpoint {
478+
remote-endpoint = <&hdmi_out>;
479+
};
480+
};
481+
};
332482
};
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334484
&i2c1 {
@@ -365,6 +515,44 @@
365515
status = "okay";
366516
};
367517

518+
&pwmdac {
519+
pinctrl-names = "default";
520+
pinctrl-0 = <&pwmdac_pins>;
521+
status = "okay";
522+
};
523+
524+
&qspi {
525+
nor_flash: nor-flash@0 {
526+
compatible = "spi-flash";
527+
reg = <0>;
528+
spi-max-frequency = <31250000>;
529+
page-size = <256>;
530+
block-size = <16>;
531+
cdns,read-delay = <4>;
532+
cdns,tshsl-ns = <1>;
533+
cdns,tsd2d-ns = <1>;
534+
cdns,tchsh-ns = <1>;
535+
cdns,tslch-ns = <1>;
536+
spi-tx-bus-width = <1>;
537+
spi-rx-bus-width = <1>;
538+
};
539+
540+
nand_flash: nand-flash@1 {
541+
compatible = "spi-flash-nand";
542+
reg = <1>;
543+
spi-max-frequency = <31250000>;
544+
page-size = <2048>;
545+
block-size = <17>;
546+
cdns,read-delay = <4>;
547+
cdns,tshsl-ns = <1>;
548+
cdns,tsd2d-ns = <1>;
549+
cdns,tchsh-ns = <1>;
550+
cdns,tslch-ns = <1>;
551+
spi-tx-bus-width = <1>;
552+
spi-rx-bus-width = <1>;
553+
};
554+
};
555+
368556
&sdio0 {
369557
broken-cd;
370558
bus-width = <4>;
@@ -393,6 +581,24 @@
393581
};
394582
};
395583

584+
&spi2 {
585+
pinctrl-names = "default";
586+
pinctrl-0 = <&spi2_pins>;
587+
status = "okay";
588+
589+
spi_dev0: spi@0 {
590+
compatible = "rohm,dh2228fv";
591+
spi-max-frequency = <10000000>;
592+
reg = <0>;
593+
};
594+
};
595+
596+
&uart0 {
597+
pinctrl-names = "default";
598+
pinctrl-0 = <&uart0_pins>;
599+
status = "okay";
600+
};
601+
396602
&uart3 {
397603
pinctrl-names = "default";
398604
pinctrl-0 = <&uart3_pins>;

‎arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts‎

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Original file line numberDiff line numberDiff line change
@@ -22,6 +22,19 @@
2222
phy-handle = <&phy>;
2323
};
2424

25+
&gpio {
26+
/* don't reset gpio mux for serial console and reset gpio */
27+
starfive,keep-gpiomux = <13 14 63>;
28+
};
29+
30+
&i2c0 {
31+
eeprom@50 {
32+
compatible = "atmel,24c04";
33+
reg = <0x50>;
34+
pagesize = <16>;
35+
};
36+
};
37+
2538
/*
2639
* The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
2740
* manual adjustment of the RX internal delay to work properly. The default

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