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siddacioussiddacious
committed
refactoring
1 parent 7d1cf11 commit fd43e06

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3 files changed

+112
-65
lines changed

3 files changed

+112
-65
lines changed

‎i2c_transactions.py

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -109,8 +109,12 @@ def get_capabilities(self):
109109

110110
def _load_register_map(self):
111111
if os.path.exists(self.register_map_file):
112+
print("loading register map from %s"%self.register_map_file)
112113
with open(self.register_map_file) as f:
113114
self.register_map = json.load(f)
115+
else:
116+
raise FileNotFoundError("no register map found at %s"%self.register_map_file)
117+
114118
self.current_map = self.register_map[0]
115119

116120
def set_settings(self, settings):
@@ -119,10 +123,13 @@ def set_settings(self, settings):
119123
120124
This method will be called second, after `get_capbilities` and before `decode`.
121125
'''
122-
123-
if 'Register map (json)' in settings:
126+
if 'Register map (json)' in settings and settings['Register map (json)']:
124127
self.register_map_file = settings['Register map (json)']
125-
self._load_register_map()
128+
print("File is '%s'"%self.register_map_file)
129+
else:
130+
print("No register map provided...", end="")
131+
self.register_map_file = '/Users/bs/dev/logic_hlas/i2c_txns/register_map_v1.json'
132+
self._load_register_map()
126133

127134
if 'Multi-byte auto-increment mode' in settings:
128135
mode_setting = settings['Multi-byte auto-increment mode']
@@ -159,6 +166,7 @@ def process_transaction(self):
159166
if address_key in self.current_map.keys():
160167
register_name = self.current_map[address_key]['name']
161168
else:
169+
# TODO: WRITE UNKNOWN DOES NOT DISPLAY CORRECTLY, READ UNKNOWN DOES
162170
register_name = "UNKNOWN[%s]"%hex(address_byte)
163171
print("\tUNKNOWN: ", hex(address_byte))
164172
print("\tUNKNOWN: frame:", str(self.current_frame))

‎reg_decoder.py

Lines changed: 72 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
bank0 = None
1111
bank1 = None
1212

13+
BITFIELD_REGEX = '^([^\[]+)\[(\d):(\d)\]$' # matches WHO_AM_I[7:0], DISABLE_ACCEL[5:3] etc.
1314

1415
def debug_print(*args, **kwargs):
1516
if DEBUG:
@@ -54,6 +55,7 @@ def decode(self, row_num, row):
5455
# TODO: Add support for an arbitrary number of bytes
5556
# check for a first byte
5657
b0 = int(row["byte0"], 16)
58+
# like UNKNOWN
5759
if rw == "WRITE" and (b0 != 0x7F) and (not self._reg_known(b0)):
5860
print(
5961
"\n\t\tBAD KEY:",
@@ -80,53 +82,11 @@ def decode(self, row_num, row):
8082
def decode_bytes(self, rw, b0, b1):
8183
if b1 is None:
8284
self._single_byte_decode(rw, b0)
85+
elif rw == "WRITE":
86+
self._decode_set_value(rw, b0, b1)
8387
else:
84-
self._multi_byte_decode(rw, b0, b1)
88+
raise RuntimeError("Multi-byte reads not supported")
8589

86-
def _multi_byte_decode(self, rw, b0, b1):
87-
if rw == "WRITE":
88-
current_register = self.banks_dict[self.current_bank][b0]
89-
90-
# TODO: check this by name
91-
if b0 == 0x7F:
92-
self.current_bank = b1 >> 4
93-
return
94-
print("SET %s to %s (%s)" % (self._reg_name(b0), self._b(b1), self._h(b1)))
95-
old_value = current_register['last_read_value']
96-
bitwise_diffs = self._bitwise_diff(old_value, b1)
97-
if len(bitwise_diffs) is 0:
98-
return
99-
100-
for bitfield_def, group_iterator in self._group_diffs(bitwise_diffs, current_register):
101-
group = list(group_iterator)
102-
103-
rx = '^([^\[]+)\[(\d):(\d)\]$'
104-
m = re.fullmatch(rx, bitfield_def)
105-
if m is not None:
106-
bitfield_name, bitfield_value = self._bitfield_value(m, b1)
107-
print("\t%s"%bitfield_name, "now set to", self._h(bitfield_value)) # check that this is called when we know the old value
108-
else:
109-
bitfield_name = bitfield_def
110-
bitfield_value = bool(group[0][1])
111-
print("\t%s is now set to %s"%(bitfield_name, bitfield_value))
112-
print("")
113-
114-
else:
115-
print(
116-
"\t\t\t\t\t\t\t_READ %s=%s (%s)"
117-
% (self._reg_name(b0), self._b(b1), self._h(b1))
118-
)
119-
120-
def _bitwise_diff(self, old_value, new_value):
121-
if old_value is None:
122-
old_value = 0
123-
changed_bits = old_value ^ new_value
124-
changes = []
125-
for shift in range(7, -1, -1):
126-
if changed_bits >>shift & 0b1:
127-
new_bit_value = (new_value & 1<<shift) >> shift
128-
changes.append((shift, new_bit_value))
129-
return changes
13090

13191
def _single_byte_decode(self, rw, b0):
13292

@@ -155,36 +115,86 @@ def _single_byte_decode(self, rw, b0):
155115
else:
156116
raise ("UNEXPECTED READ WITHOUT PREV WRITE")
157117

118+
119+
def _decode_set_value(self, rw, reg_addr, value_byte):
120+
print(rw, reg_addr, value_byte)
121+
122+
current_register = self.banks_dict[self.current_bank][reg_addr]
123+
124+
# TODO: check this by name
125+
# ******* SET BANK **************
126+
if reg_addr == 0x7F:
127+
self.current_bank = value_byte >> 4
128+
return
129+
# ****IDENTIFIED WRITE TO REG W/ NEW VALUE ***
130+
print("SET %s to %s (%s)" % (self._reg_name(reg_addr), self._b(value_byte), self._h(value_byte)))
131+
old_value = current_register['last_read_value']
132+
# FIND BITS THAT HAVE CHANGED
133+
bitwise_diffs = self._bitwise_diff(old_value, value_byte)
134+
135+
# NOTHING CHANGED
136+
if len(bitwise_diffs) is 0:
137+
return
138+
139+
self._decode_bitfields(bitwise_diffs, current_register, value_byte)
140+
print("")
141+
142+
def _decode_bitfields(self, bitwise_diffs, current_register, value_byte):
143+
for bitfield_def, group_iterator in self._group_bitwise_diffs_by_bitfield_def(bitwise_diffs, current_register):
144+
145+
match = re.fullmatch(BITFIELD_REGEX, bitfield_def)
146+
# NAMED BITFIELD UPDATED
147+
if match: #
148+
name, msb_str, lsb_str = match.groups()
149+
bitfield_msb = int(msb_str)
150+
bitfield_lsb = int(lsb_str)
151+
bitfield_value = self._extract_bitfield_val_from_byte(value_byte, bitfield_msb, bitfield_lsb)
152+
print("\t%s"%name, "now HHet to", self._h(bitfield_value)) # check that this is called when we know the old value
153+
# SINGLE BIT W/ NAME
154+
else:
155+
group = list(group_iterator)
156+
bitfield_name = bitfield_def
157+
bitfield_value = bool(group[0][1])
158+
print("\t%s is now zzet to %s"%(bitfield_name, bitfield_value))
159+
160+
def _bitwise_diff(self, old_value, new_value):
161+
if old_value is None:
162+
old_value = 0
163+
changed_bits = old_value ^ new_value
164+
changes = []
165+
for shift in range(7, -1, -1):
166+
if changed_bits >>shift & 0b1:
167+
new_bit_value = (new_value & 1<<shift) >> shift
168+
changes.append((shift, new_bit_value))
169+
return changes
170+
171+
172+
def _extract_bitfield_val_from_byte(self, value_byte, msb, lsb):
173+
"""Extract the value of bitfield from a byte using a returned match object"""
174+
# determine the mask width exponent from [3:0]-> 3-(0+1) = 2
175+
bitfield_width_exponent = msb-lsb+1
176+
# (2^2)-1 =>> (2**2)-1 = 4-1 =>> 3 -> 0b11 or 2^3 -1 = 8-1 = 7 -> 0b111
177+
bitfield_mask = (2**bitfield_width_exponent)-1
178+
bitfield_mask <<= lsb
179+
bitfield_value = (value_byte & bitfield_mask) >>lsb
180+
181+
return bitfield_value
182+
158183
def _reg_known(self, b0):
159184
return b0 in self.banks_dict[self.current_bank].keys()
160185

161186
def _reg_name(self, b0):
162187
return self.banks_dict[self.current_bank][b0]["name"]
163188

164-
def _group_diffs(self, bitwise_diffs, register_def):
189+
def _group_bitwise_diffs_by_bitfield_def(self, bitwise_diffs, register_def):
165190
bitfield_def = lambda x: register_def[x[0]]
166191
return itertools.groupby(bitwise_diffs, bitfield_def)
167192

168-
def _bitfield_value(self, m, byte):
169-
170-
match_groups = m.groups()
171-
172-
bitfield_name = match_groups[0]
173-
bitfield_msb = int(match_groups[1])
174-
bitfield_lsb = int(match_groups[2])
175-
176-
bitfield_width = bitfield_msb-bitfield_lsb+1
177-
bitfield_mask = (2**bitfield_width)-1
178-
bitfield_mask <<= bitfield_lsb
179-
bitfield_value = (byte & bitfield_mask) >>bitfield_lsb
180-
181-
return (bitfield_name, bitfield_value)
182-
183193
def _h(self, num):
184194
return "0x%s" % format(num, "02X")
185195

186196
def _b(self, num):
187-
return "0b%s %s" % (format(num >> 4, "04b"), format((num & 0b1111), "04b"))
197+
return "0b %s %s" % (format(num >> 4, "04b"), format((num & 0b1111), "04b"))
188198
# return format(num, "#010b")
189199

190200
def parse_csv_bank(self, filename, bank_number=0):

‎register_map_v1.json

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -377,6 +377,21 @@
377377
{},
378378

379379
{
380+
"1": {
381+
"name": "GYRO_SMPLRT_DIV",
382+
"rw": "R/W",
383+
"fields": [
384+
"GYRO_SMPLRT_DIV[7:0]",
385+
"GYRO_SMPLRT_DIV[7:0]",
386+
"GYRO_SMPLRT_DIV[7:0]",
387+
"GYRO_SMPLRT_DIV[7:0]",
388+
389+
"GYRO_SMPLRT_DIV[7:0]",
390+
"GYRO_SMPLRT_DIV[7:0]",
391+
"GYRO_SMPLRT_DIV[7:0]",
392+
"GYRO_SMPLRT_DIV[7:0]"
393+
]
394+
},
380395
"1": {
381396
"name": "GYRO_CONFIG_1",
382397
"rw": "R",
@@ -543,6 +558,20 @@
543558
"I2C_SLV4_DO[7:0]"
544559
]
545560
},
561+
"23":{
562+
"name": "I2C_SLV4_DI",
563+
"rw" : "R/W",
564+
"fields" : [
565+
"I2C_SLV4_DI[7:0]",
566+
"I2C_SLV4_DI[7:0]",
567+
"I2C_SLV4_DI[7:0]",
568+
"I2C_SLV4_DI[7:0]",
569+
"I2C_SLV4_DI[7:0]",
570+
"I2C_SLV4_DI[7:0]",
571+
"I2C_SLV4_DI[7:0]",
572+
"I2C_SLV4_DI[7:0]"
573+
]
574+
},
546575
"127": {
547576
"name": "BANK",
548577
"rw": "R/W",

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