diff --git a/.bazelrc b/.bazelrc
new file mode 100644
index 0000000000..5247b2f494
--- /dev/null
+++ b/.bazelrc
@@ -0,0 +1,5 @@
+build --action_env=PYTHON_BIN_PATH=/usr/bin/python3
+build --action_env=BAZEL_CXXOPTS=-std=c++17
+build --cxxopt=-std=c++17
+build --copt=-Wno-sign-compare
+build --copt=-Wno-comment
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
new file mode 100644
index 0000000000..251278c4c2
--- /dev/null
+++ b/CONTRIBUTING.md
@@ -0,0 +1,37 @@
+# How to Contribute
+
+We'd love to accept your patches and contributions to this project. There are
+just a few small guidelines you need to follow.
+
+## Contributor License Agreement
+
+Contributions to this project must be accompanied by a Contributor License
+Agreement (CLA). You (or your employer) retain the copyright to your
+contribution; this simply gives us permission to use and redistribute your
+contributions as part of the project. Head over to
+ to see your current agreements on file or
+to sign a new one.
+
+You generally only need to submit a CLA once, so if you've already submitted one
+(even if it was for a different project), you probably don't need to do it
+again.
+
+## Code style
+
+When writing code contributions to the project, please make sure to follow the
+style guides:
+The [Google C++ Style Guide](https://google.github.io/styleguide/cppguide.html)
+and the
+[Google Python Style Guide](https://google.github.io/styleguide/pyguide.html).
+
+## Code reviews
+
+All submissions, including submissions by project members, require review. We
+use GitHub pull requests for this purpose. Consult
+[GitHub Help](https://help.github.com/articles/about-pull-requests/) for more
+information on using pull requests.
+
+## Community Guidelines
+
+This project follows
+[Google's Open Source Community Guidelines](https://opensource.google/conduct/).
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000000..d645695673
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,202 @@
+
+ Apache License
+ Version 2.0, January 2004
+ http://www.apache.org/licenses/
+
+ TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+ 1. Definitions.
+
+ "License" shall mean the terms and conditions for use, reproduction,
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+ "Contribution" shall mean any work of authorship, including
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+ "Contributor" shall mean Licensor and any individual or Legal Entity
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+ the conditions stated in this License.
+
+ 5. Submission of Contributions. Unless You explicitly state otherwise,
+ any Contribution intentionally submitted for inclusion in the Work
+ by You to the Licensor shall be under the terms and conditions of
+ this License, without any additional terms or conditions.
+ Notwithstanding the above, nothing herein shall supersede or modify
+ the terms of any separate license agreement you may have executed
+ with Licensor regarding such Contributions.
+
+ 6. Trademarks. This License does not grant permission to use the trade
+ names, trademarks, service marks, or product names of the Licensor,
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+
+ 7. Disclaimer of Warranty. Unless required by applicable law or
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+ Contributor provides its Contributions) on an "AS IS" BASIS,
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+ 8. Limitation of Liability. In no event and under no legal theory,
+ whether in tort (including negligence), contract, or otherwise,
+ unless required by applicable law (such as deliberate and grossly
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+ 9. Accepting Warranty or Additional Liability. While redistributing
+ the Work or Derivative Works thereof, You may choose to offer,
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+ or other liability obligations and/or rights consistent with this
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+ on Your own behalf and on Your sole responsibility, not on behalf
+ of any other Contributor, and only if You agree to indemnify,
+ defend, and hold each Contributor harmless for any liability
+ incurred by, or claims asserted against, such Contributor by reason
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+
+ APPENDIX: How to apply the Apache License to your work.
+
+ To apply the Apache License to your work, attach the following
+ boilerplate notice, with the fields enclosed by brackets "[]"
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+ Copyright [yyyy] [name of copyright owner]
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
diff --git a/README.md b/README.md
new file mode 100644
index 0000000000..411a0a2cce
--- /dev/null
+++ b/README.md
@@ -0,0 +1,8 @@
+# XLS: Accelerated HW Synthesis
+
+NOTE This is not an officially supported Google product.
+
+The XLS (Accelerator Synthesis) toolchain aims to enable the rapid development
+of hardware IP via "software style" methodology. XLS is a High Level Synthesis
+(HLS) toolchain which produces synthesizable designs from flexible, high-level
+descriptions of functionality.
diff --git a/WORKSPACE b/WORKSPACE
new file mode 100644
index 0000000000..5794807078
--- /dev/null
+++ b/WORKSPACE
@@ -0,0 +1,7 @@
+workspace(name = "com_google_xls")
+
+load("//dependency_support:load_external.bzl", "load_external_repositories")
+load_external_repositories()
+
+load("//dependency_support:initialize_external.bzl", "initialize_external_repositories")
+initialize_external_repositories()
diff --git a/dependency_support/BUILD.bazel b/dependency_support/BUILD.bazel
new file mode 100644
index 0000000000..4ef7cb54f8
--- /dev/null
+++ b/dependency_support/BUILD.bazel
@@ -0,0 +1,15 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Needed to make this a package.
diff --git a/dependency_support/automake_substitution.bzl b/dependency_support/automake_substitution.bzl
new file mode 100644
index 0000000000..29d0145399
--- /dev/null
+++ b/dependency_support/automake_substitution.bzl
@@ -0,0 +1,33 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Provides helper that replaces @VARIABLE_NAME@ occurences with values, as
+specified by a provided map."""
+
+def automake_substitution(name, src, out, substitutions = {}):
+ """Replaces @VARIABLE_NAME@ occurences with values.
+
+ Note: The current implementation does not allow slashes in variable
+ values."""
+
+ substitution_pipe = " ".join([
+ "| sed 's/@%s@/%s/g'" % (variable_name, substitutions[variable_name])
+ for variable_name in substitutions.keys()
+ ])
+ native.genrule(
+ name = name,
+ srcs = [src],
+ outs = [out],
+ cmd = "cat $(location :%s) %s > $@" % (src, substitution_pipe),
+ )
diff --git a/dependency_support/com_icarus_iverilog/BUILD b/dependency_support/com_icarus_iverilog/BUILD
new file mode 100644
index 0000000000..937bf34b2a
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/BUILD
@@ -0,0 +1,23 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["restricted"]) # GPLv2
+
+exports_files([
+ "hello.v",
+ "hello_verilog_test.sh",
+ "hello_vpi.c",
+ "iverilog.sh",
+ "vvp.sh",
+])
diff --git a/dependency_support/com_icarus_iverilog/build-plugins.bzl b/dependency_support/com_icarus_iverilog/build-plugins.bzl
new file mode 100644
index 0000000000..302236adad
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/build-plugins.bzl
@@ -0,0 +1,62 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""BUILD helpers for using iverilog.
+"""
+
+def iverilog_compile(srcs, flags = ""):
+ """Compiles the first .v files given in srcs into a .vvp file.
+ Passes the flags to iverilog.
+ """
+ vvp_file = srcs[0] + "vp" # Changes .v to .vvp
+ native.genrule(
+ name = "gen_" + vvp_file,
+ srcs = srcs,
+ outs = [vvp_file],
+ cmd = (
+ "$(location @com_icarus_iverilog//:iverilog) " +
+ flags + " " +
+ "-o $@ " +
+ "$(location " + srcs[0] + ")"
+ ),
+ tools = ["@com_icarus_iverilog//:iverilog"],
+ )
+
+ # Creates a dummy test which will force the .vvp file production.
+ native.sh_test(
+ name = "force_on_test_build_" + vvp_file,
+ srcs = ["@com_google_xls//dependency_support/com_icarus_iverilog:dummy.sh"],
+ data = [vvp_file],
+ )
+
+def vpi_binary(name, srcs, **kwargs):
+ """Creates a .vpi file with the given name from the given sources.
+ All the extra arguments are passed directly to cc_binary.
+ """
+ so_name = name + ".so"
+ native.cc_binary(
+ name = so_name,
+ srcs = srcs,
+ linkshared = 1,
+ **kwargs
+ )
+
+ native.genrule(
+ name = "gen_" + name,
+ srcs = [so_name],
+ outs = [name],
+ cmd = "cp $< $@",
+ output_to_bindir = 1,
+ executable = 1,
+ )
diff --git a/dependency_support/com_icarus_iverilog/bundled.BUILD.bazel b/dependency_support/com_icarus_iverilog/bundled.BUILD.bazel
new file mode 100644
index 0000000000..336856916b
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/bundled.BUILD.bazel
@@ -0,0 +1,916 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description:
+# Icarus Verilog is a Verilog simulation and synthesis tool.
+# Use :iverilog and :vvp targets in your genrules.
+
+load("@com_google_xls//dependency_support/com_icarus_iverilog:build-plugins.bzl", "vpi_binary", "iverilog_compile")
+load("@com_google_xls//dependency_support:copy.bzl", "copy", "touch")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+load("@com_google_xls//dependency_support/flex:flex.bzl", "genlex")
+load("@com_google_xls//dependency_support/org_gnu_bison:bison.bzl", "genyacc")
+
+# The only two exported labels are iverilog and vvp. They are enough
+# to run simple simulations.
+package(
+ default_visibility = ["//visibility:private"],
+ features = [
+ "-layering_check",
+ "-parse_headers",
+ ],
+)
+
+licenses(["restricted"]) # GPLv2
+
+exports_files([
+ "LICENSE",
+ "build-plugins",
+])
+
+# This wrapper around iverilog compiler is to be used by
+# simulations. A typical genrule will look similar to gen_hello.vvp
+# below.
+sh_binary(
+ name = "iverilog",
+ srcs = ["@com_google_xls//dependency_support/com_icarus_iverilog:iverilog.sh"],
+ data = [
+ "iverilog-bin",
+ "ivl",
+ "ivlpp",
+ "vvp.conf",
+ "vvp.tgt",
+ ],
+ output_licenses = ["unencumbered"],
+ visibility = ["//visibility:public"],
+)
+
+genrule(
+ name = "vvp_conf",
+ srcs = ["tgt-vvp/vvp.conf.in"],
+ outs = ["vvp.conf"],
+ cmd = "echo 'flag:VVP_EXECUTABLE=/unused' | cat $(location :tgt-vvp/vvp.conf.in) - > $@",
+)
+
+# This wrapper around vvp simulator is to be used by simulations. A
+# typical genrule will look similar to run_hello below.
+sh_binary(
+ name = "vvp",
+ srcs = ["@com_google_xls//dependency_support/com_icarus_iverilog:vvp.sh"],
+ data = [
+ "system.vpi",
+ "v2005_math.vpi",
+ "va_math.vpi",
+ "vhdl_table.vpi",
+ "vpi_debug.vpi",
+ "vvp-bin",
+ ],
+ output_licenses = ["unencumbered"],
+ visibility = ["//visibility:public"],
+)
+
+# API for writing VPI extensions.
+cc_library(
+ name = "vpi_user",
+ srcs = ["_pli_types.h"],
+ hdrs = ["vpi_user.h"],
+ visibility = ["//visibility:public"],
+)
+
+cc_library(
+ name = "ivl-misc",
+ srcs = [
+ "libmisc/LineInfo.cc",
+ "libmisc/StringHeap.cc",
+ ],
+ hdrs = [
+ "libmisc/LineInfo.h",
+ "libmisc/StringHeap.h",
+ ],
+)
+
+# A Bazel bug requires full enumeration of symbols to retain. The list comes
+# from ivl.def.
+ivl_def = [
+ "ivl_branch_island",
+ "ivl_branch_terminal",
+ "ivl_design_const",
+ "ivl_design_consts",
+ "ivl_design_discipline",
+ "ivl_design_disciplines",
+ "ivl_design_flag",
+ "ivl_design_process",
+ "ivl_design_root",
+ "ivl_design_roots",
+ "ivl_design_time_precision",
+ "ivl_const_bits",
+ "ivl_const_delay",
+ "ivl_const_real",
+ "ivl_const_signed",
+ "ivl_const_type",
+ "ivl_const_width",
+ "ivl_discipline_domain",
+ "ivl_discipline_flow",
+ "ivl_discipline_name",
+ "ivl_discipline_potential",
+ "ivl_event_any",
+ "ivl_event_basename",
+ "ivl_event_name",
+ "ivl_event_nany",
+ "ivl_event_neg",
+ "ivl_event_nneg",
+ "ivl_event_npos",
+ "ivl_event_pos",
+ "ivl_event_scope",
+ "ivl_expr_type",
+ "ivl_expr_bits",
+ "ivl_expr_branch",
+ "ivl_expr_def",
+ "ivl_expr_delay_val",
+ "ivl_expr_dvalue",
+ "ivl_expr_event",
+ "ivl_expr_file",
+ "ivl_expr_lineno",
+ "ivl_expr_name",
+ "ivl_expr_nature",
+ "ivl_expr_opcode",
+ "ivl_expr_oper1",
+ "ivl_expr_oper2",
+ "ivl_expr_oper3",
+ "ivl_expr_parameter",
+ "ivl_expr_parm",
+ "ivl_expr_parms",
+ "ivl_expr_repeat",
+ "ivl_expr_scope",
+ "ivl_expr_signal",
+ "ivl_expr_signed",
+ "ivl_expr_string",
+ "ivl_expr_uvalue",
+ "ivl_expr_value",
+ "ivl_expr_width",
+ "ivl_file_table_index",
+ "ivl_file_table_item",
+ "ivl_file_table_size",
+ "ivl_island_flag_set",
+ "ivl_island_flag_test",
+ "ivl_logic_attr",
+ "ivl_logic_attr_cnt",
+ "ivl_logic_attr_val",
+ "ivl_logic_basename",
+ "ivl_logic_delay",
+ "ivl_logic_drive0",
+ "ivl_logic_drive1",
+ "ivl_logic_name",
+ "ivl_logic_pin",
+ "ivl_logic_pins",
+ "ivl_logic_scope",
+ "ivl_logic_type",
+ "ivl_logic_udp",
+ "ivl_logic_width",
+ "ivl_lpm_array",
+ "ivl_lpm_aset_value",
+ "ivl_lpm_async_clr",
+ "ivl_lpm_async_set",
+ "ivl_lpm_base",
+ "ivl_lpm_basename",
+ "ivl_lpm_clk",
+ "ivl_lpm_data",
+ "ivl_lpm_datab",
+ "ivl_lpm_define",
+ "ivl_lpm_delay",
+ "ivl_lpm_enable",
+ "ivl_lpm_file",
+ "ivl_lpm_lineno",
+ "ivl_lpm_name",
+ "ivl_lpm_q",
+ "ivl_lpm_scope",
+ "ivl_lpm_select",
+ "ivl_lpm_selects",
+ "ivl_lpm_signed",
+ "ivl_lpm_size",
+ "ivl_lpm_sset_value",
+ "ivl_lpm_string",
+ "ivl_lpm_sync_clr",
+ "ivl_lpm_sync_set",
+ "ivl_lpm_trigger",
+ "ivl_lpm_type",
+ "ivl_lpm_width",
+ "ivl_lval_idx",
+ "ivl_lval_mux",
+ "ivl_lval_part_off",
+ "ivl_lval_sig",
+ "ivl_lval_width",
+ "ivl_nature_name",
+ "ivl_nexus_get_private",
+ "ivl_nexus_name",
+ "ivl_nexus_ptrs",
+ "ivl_nexus_ptr",
+ "ivl_nexus_set_private",
+ "ivl_nexus_ptr_branch",
+ "ivl_nexus_ptr_con",
+ "ivl_nexus_ptr_drive0",
+ "ivl_nexus_ptr_drive1",
+ "ivl_nexus_ptr_pin",
+ "ivl_nexus_ptr_lpm",
+ "ivl_nexus_ptr_log",
+ "ivl_nexus_ptr_sig",
+ "ivl_nexus_ptr_switch",
+ "ivl_parameter_basename",
+ "ivl_parameter_expr",
+ "ivl_parameter_file",
+ "ivl_parameter_lineno",
+ "ivl_path_condit",
+ "ivl_path_delay",
+ "ivl_path_is_condit",
+ "ivl_path_scope",
+ "ivl_path_source",
+ "ivl_path_source_negedge",
+ "ivl_path_source_posedge",
+ "ivl_scope_attr_cnt",
+ "ivl_scope_attr_val",
+ "ivl_scope_basename",
+ "ivl_scope_children",
+ "ivl_scope_def",
+ "ivl_scope_def_file",
+ "ivl_scope_def_lineno",
+ "ivl_scope_event",
+ "ivl_scope_events",
+ "ivl_scope_file",
+ "ivl_scope_is_auto",
+ "ivl_scope_is_cell",
+ "ivl_scope_lineno",
+ "ivl_scope_logs",
+ "ivl_scope_log",
+ "ivl_scope_lpms",
+ "ivl_scope_lpm",
+ "ivl_scope_name",
+ "ivl_scope_param",
+ "ivl_scope_params",
+ "ivl_scope_parent",
+ "ivl_scope_port",
+ "ivl_scope_ports",
+ "ivl_scope_sigs",
+ "ivl_scope_sig",
+ "ivl_scope_switch",
+ "ivl_scope_switches",
+ "ivl_scope_time_precision",
+ "ivl_scope_time_units",
+ "ivl_scope_type",
+ "ivl_scope_tname",
+ "ivl_signal_array_addr_swapped",
+ "ivl_signal_array_base",
+ "ivl_signal_array_count",
+ "ivl_signal_attr",
+ "ivl_signal_attr_cnt",
+ "ivl_signal_attr_val",
+ "ivl_signal_basename",
+ "ivl_signal_data_type",
+ "ivl_signal_dimensions",
+ "ivl_signal_discipline",
+ "ivl_signal_file",
+ "ivl_signal_integer",
+ "ivl_signal_lineno",
+ "ivl_signal_local",
+ "ivl_signal_lsb",
+ "ivl_signal_msb",
+ "ivl_signal_name",
+ "ivl_signal_nex",
+ "ivl_signal_npath",
+ "ivl_signal_path",
+ "ivl_signal_port",
+ "ivl_signal_signed",
+ "ivl_signal_type",
+ "ivl_signal_width",
+ "ivl_path_delay",
+ "ivl_path_source",
+ "ivl_process_analog",
+ "ivl_process_attr_cnt",
+ "ivl_process_attr_val",
+ "ivl_process_file",
+ "ivl_process_lineno",
+ "ivl_process_scope",
+ "ivl_process_stmt",
+ "ivl_process_type",
+ "ivl_statement_type",
+ "ivl_stmt_block_count",
+ "ivl_stmt_block_scope",
+ "ivl_stmt_block_stmt",
+ "ivl_stmt_call",
+ "ivl_stmt_case_count",
+ "ivl_stmt_case_expr",
+ "ivl_stmt_case_stmt",
+ "ivl_stmt_cond_expr",
+ "ivl_stmt_cond_false",
+ "ivl_stmt_cond_true",
+ "ivl_stmt_delay_expr",
+ "ivl_stmt_delay_val",
+ "ivl_stmt_events",
+ "ivl_stmt_file",
+ "ivl_stmt_lineno",
+ "ivl_stmt_lexp",
+ "ivl_stmt_lval",
+ "ivl_stmt_lvals",
+ "ivl_stmt_lwidth",
+ "ivl_stmt_name",
+ "ivl_stmt_nevent",
+ "ivl_stmt_parm",
+ "ivl_stmt_parm_count",
+ "ivl_stmt_rval",
+ "ivl_stmt_sub_stmt",
+ "ivl_switch_a",
+ "ivl_switch_b",
+ "ivl_switch_basename",
+ "ivl_switch_enable",
+ "ivl_switch_file",
+ "ivl_switch_island",
+ "ivl_switch_lineno",
+ "ivl_switch_offset",
+ "ivl_switch_part",
+ "ivl_switch_scope",
+ "ivl_switch_type",
+ "ivl_switch_width",
+ "ivl_udp_init",
+ "ivl_udp_name",
+ "ivl_udp_nin",
+ "ivl_udp_row",
+ "ivl_udp_rows",
+ "ivl_udp_sequ",
+]
+
+cc_binary(
+ name = "ivl",
+ srcs = glob(
+ ["*.cc", "*.h"],
+ exclude = ["elab_anet.cc"],
+ ) + [
+ "syn-rules.cc",
+ "lexor.cc",
+ "lexor_keyword.cc",
+ "parse.cc",
+ "parse.h",
+ "config.h",
+ ],
+ copts = [
+ "-Wno-strict-aliasing",
+ "-Wno-unused-but-set-variable",
+ "-Wno-unused-variable",
+ ],
+ # Do not sort: dot last.
+ includes = [
+ "libmisc",
+ ".",
+ ],
+ linkopts = [
+ "-ldl",
+ "-Wl,-u," + ",-u,".join(ivl_def),
+ "-Wl,--export-dynamic",
+ "-Wl,-no-pie",
+ ],
+ deps = [
+ "ivl-misc",
+ ":shared_headers",
+ ],
+)
+
+genlex(
+ name = "lexor",
+ src = "lexor.lex",
+ out = "lexor.cc",
+)
+
+genyacc(
+ name = "parse_y",
+ src = "parse.y",
+ header_out = "parse.h",
+ prefix = "VL",
+ source_out = "parse.cc",
+)
+
+genyacc(
+ name = "syn-rules_y",
+ src = "syn-rules.y",
+ header_out = "syn-rules.h",
+ prefix = "syn_",
+ source_out = "syn-rules.cc",
+)
+
+cc_library(
+ name = "shared_headers",
+ hdrs = [
+ "config.h",
+ "ivl_alloc.h",
+ "ivl_target.h",
+ "ivl_target_priv.h",
+ "version_base.h",
+ "version_tag.h",
+ "sv_vpi_user.h",
+ ],
+ includes = [
+ ".",
+ ],
+ deps = [
+ ":vpi_user",
+ ],
+)
+
+cc_binary(
+ name = "iverilog-bin",
+ srcs = [
+ "driver/cflexor.c",
+ "driver/cfparse.c",
+ "driver/cfparse.h",
+ ] + glob([
+ "driver/*.h",
+ "driver/*.c",
+ ]),
+ copts = [
+ "-D_GNU_SOURCE",
+ "-std=c11",
+ "-fcommon",
+ "-Wno-format-truncation",
+ ],
+ # Do not sort: dot last.
+ includes = [
+ "driver",
+ "libmisc",
+ ".",
+ ],
+ deps = [":shared_headers"],
+ visibility = ["//visibility:public"],
+)
+
+genlex(
+ name = "cflexor",
+ src = "driver/cflexor.lex",
+ out = "driver/cflexor.c",
+)
+
+genyacc(
+ name = "cfparse_y",
+ src = "driver/cfparse.y",
+ header_out = "driver/cfparse.h",
+ prefix = "cf",
+ source_out = "driver/cfparse.c",
+)
+
+# A Bazel bug requires full enumeration of symbols to retain. The list comes
+# from vvp.def.
+vvp_def = [
+ "vpi_chk_error",
+ "vpi_control",
+ "vpi_flush",
+ "vpi_fopen",
+ "vpi_free_object",
+ "vpi_get",
+ "vpi_get_delays",
+ "vpi_get_file",
+ "vpi_get_str",
+ "vpi_get_time",
+ "vpi_get_userdata",
+ "vpi_get_value",
+ "vpi_get_vlog_info",
+ "vpi_handle",
+ "vpi_handle_by_index",
+ "vpi_handle_by_name",
+ "vpi_iterate",
+ "vpi_mcd_close",
+ "vpi_mcd_flush",
+ "vpi_mcd_name",
+ "vpi_mcd_open",
+ "vpi_mcd_printf",
+ "vpi_mcd_vprintf",
+ "vpi_printf",
+ "vpi_put_delays",
+ "vpi_put_userdata",
+ "vpi_put_value",
+ "vpi_register_cb",
+ "vpi_register_systf",
+ "vpi_remove_cb",
+ "vpi_scan",
+ "vpi_sim_control",
+ "vpi_sim_vcontrol",
+ "vpi_vprintf",
+ "vpip_format_strength",
+ "vpip_set_return_value",
+ "vpip_calc_clog2",
+]
+
+cc_binary(
+ name = "vvp-bin",
+ srcs = glob([
+ "vvp/*.cc",
+ "vvp/*.h",
+ ]) + [
+ "vvp_gen/config.h",
+ "vvp_gen/lexor.cc",
+ "vvp_gen/parse.h",
+ "vvp_gen/parse.cc",
+ "vvp_gen/tables.cc",
+ ],
+ copts = [
+ "-O2", # Optimized binary regardless of configuration.
+ "-Wno-unused-variable",
+ "-Wno-implicit-fallthrough",
+ ],
+ # Do not sort: dot last.
+ includes = [
+ "vvp_gen",
+ "vvp",
+ ".",
+ ],
+ linkopts = [
+ "-ldl",
+ "-Wl,-u," + ",-u,".join(vvp_def),
+ "-Wl,--export-dynamic",
+ ],
+ deps = [
+ ":shared_headers",
+ ":vpi_user",
+ "@dk_thrysoee_libedit//:pretend_to_be_gnu_readline_system",
+ "@net_invisible_island_ncurses//:ncurses",
+ ],
+ visibility = ["//visibility:public"],
+)
+
+genyacc(
+ name = "vvp_parse_y",
+ src = "vvp/parse.y",
+ header_out = "vvp_gen/parse.h",
+ source_out = "vvp_gen/parse.cc",
+)
+
+genlex(
+ name = "vvp_flexor",
+ src = "vvp/lexor.lex",
+ out = "vvp_gen/lexor.cc",
+)
+
+cc_binary(
+ name = "draw_tt",
+ srcs = ["vvp/draw_tt.c"],
+)
+
+genrule(
+ name = "gen_tables",
+ outs = ["vvp_gen/tables.cc"],
+ cmd = "$(location draw_tt) > $@",
+ tools = ["draw_tt"],
+)
+
+cc_binary(
+ name = "ivlpp",
+ srcs = [
+ "ivlpp_lex/lexor.c",
+ "ivlpp/globals.h",
+ "ivlpp/main.c",
+ ],
+ copts = ["-Wno-unused-variable"],
+ # Do not sort: dot last.
+ includes = [
+ "ivlpp",
+ ".",
+ ],
+ deps = [
+ ":shared_headers",
+ ],
+)
+
+genlex(
+ name = "ivlpp_lexor",
+ src = "ivlpp/lexor.lex",
+ out = "ivlpp_lex/lexor.c",
+)
+
+vpi_binary(
+ name = "system.vpi",
+ srcs = glob(["vpi/*.h"]) + [
+ "config.h",
+ "vpi/fastlz.c",
+ "vpi/fstapi.c",
+ "vpi/lxt2_write.c",
+ "vpi/lxt_write.c",
+ "vpi/lz4.c",
+ "vpi/mt19937int.c",
+ "vpi/sdf_lexor.c",
+ "vpi/sdf_parse.c",
+ "vpi/sdf_parse.h",
+ "vpi/stringheap.c",
+ "vpi/sys_convert.c",
+ "vpi/sys_countdrivers.c",
+ "vpi/sys_darray.c",
+ "vpi/sys_deposit.c",
+ "vpi/sys_display.c",
+ "vpi/sys_fileio.c",
+ "vpi/sys_finish.c",
+ "vpi/sys_fst.c",
+ "vpi/sys_icarus.c",
+ "vpi/sys_lxt.c",
+ "vpi/sys_lxt2.c",
+ "vpi/sys_plusargs.c",
+ "vpi/sys_priv.c",
+ "vpi/sys_queue.c",
+ "vpi/sys_random.c",
+ "vpi/sys_random_mti.c",
+ "vpi/sys_readmem.c",
+ "vpi/sys_readmem_lex.c",
+ "vpi/sys_scanf.c",
+ "vpi/sys_sdf.c",
+ "vpi/sys_table.c",
+ "vpi/sys_time.c",
+ "vpi/sys_vcd.c",
+ "vpi/sys_vcdoff.c",
+ "vpi/table_mod.c",
+ "vpi/table_mod_lexor.c",
+ "vpi/table_mod_parse.c",
+ "vpi/table_mod_parse.h",
+ "vpi/vams_simparam.c",
+ "vpi/vcd_priv.c",
+ "vpi/vcd_priv2.cc",
+ "vpi/vpi_config.h",
+ ],
+ # Optimized binary regardless of configuration.
+ copts = [
+ "$(STACK_FRAME_UNLIMITED)",
+ "-O2",
+ ],
+ linkopts = [
+ "-lpthread",
+ ],
+ includes = [
+ ".",
+ "vpi",
+ ],
+ deps = [
+ ":shared_headers",
+ ":vpi_user",
+ "@org_sourceware_bzip2//:bzip2",
+ "@zlib//:zlib",
+ ],
+)
+
+genyacc(
+ name = "table_mod_parse_y",
+ src = "vpi/table_mod_parse.y",
+ header_out = "vpi/table_mod_parse.h",
+ prefix = "tblmod",
+ source_out = "vpi/table_mod_parse.c",
+)
+
+genlex(
+ name = "table_mod_lexor_lex",
+ src = "vpi/table_mod_lexor.lex",
+ out = "vpi/table_mod_lexor.c",
+)
+
+genyacc(
+ name = "vpi_sdfparse_y",
+ src = "vpi/sdf_parse.y",
+ header_out = "vpi/sdf_parse.h",
+ prefix = "sdf",
+ source_out = "vpi/sdf_parse.c",
+)
+
+genlex(
+ name = "vpi_sdf_lexor",
+ src = "vpi/sdf_lexor.lex",
+ out = "vpi/sdf_lexor.c",
+)
+
+genlex(
+ name = "vpi_sys_readmem_lex",
+ src = "vpi/sys_readmem_lex.lex",
+ out = "vpi/sys_readmem_lex.c",
+)
+
+vpi_binary(
+ name = "va_math.vpi",
+ srcs = [
+ "vpi/va_math.c",
+ "vpi/vpi_config.h",
+ ],
+ copts = ["-O2"], # Optimized binary regardless of configuration.
+ includes = [
+ ".",
+ "vpi",
+ ],
+ deps = [
+ ":shared_headers",
+ ":vpi_user",
+ ],
+)
+
+vpi_binary(
+ name = "v2005_math.vpi",
+ srcs = [
+ "vpi/sys_clog2.c",
+ "vpi/v2005_math.c",
+ "vpi/vpi_config.h",
+ ],
+ copts = ["-O2"], # Optimized binary regardless of configuration.
+ includes = [
+ ".",
+ "vpi",
+ ],
+ deps = [
+ ":vpi_user",
+ ":shared_headers",
+ ],
+)
+
+vpi_binary(
+ name = "vhdl_table.vpi",
+ srcs = [
+ "vpi/vhdl_table.c",
+ "vpi/vpi_config.h",
+ ],
+ copts = ["-O2"],
+ includes = [
+ ".",
+ "vpi",
+ ],
+ deps = [
+ ":shared_headers",
+ ":vpi_user",
+ ],
+)
+
+vpi_binary(
+ name = "vpi_debug.vpi",
+ srcs = [
+ "vpi/vpi_debug.c",
+ ],
+ copts = ["-O2"],
+ includes = [
+ ".",
+ "vpi",
+ ],
+ deps = [
+ ":vpi_user",
+ ],
+)
+
+vpi_binary(
+ name = "vvp.tgt",
+ srcs = [
+ "tgt-vvp/draw_class.c",
+ "tgt-vvp/draw_delay.c",
+ "tgt-vvp/draw_enum.c",
+ "tgt-vvp/draw_mux.c",
+ "tgt-vvp/draw_net_input.c",
+ "tgt-vvp/draw_substitute.c",
+ "tgt-vvp/draw_switch.c",
+ "tgt-vvp/draw_ufunc.c",
+ "tgt-vvp/draw_vpi.c",
+ "tgt-vvp/eval_bool.c",
+ "tgt-vvp/eval_condit.c",
+ "tgt-vvp/eval_expr.c",
+ "tgt-vvp/eval_object.c",
+ "tgt-vvp/eval_real.c",
+ "tgt-vvp/eval_string.c",
+ "tgt-vvp/eval_vec4.c",
+ "tgt-vvp/modpath.c",
+ "tgt-vvp/stmt_assign.c",
+ "tgt-vvp/vector.c",
+ "tgt-vvp/vvp.c",
+ "tgt-vvp/vvp_config.h",
+ "tgt-vvp/vvp_priv.h",
+ "tgt-vvp/vvp_process.c",
+ "tgt-vvp/vvp_scope.c",
+ ],
+ copts = [
+ "-Wno-implicit-function-declaration",
+ "-Wno-int-conversion",
+ "-Wno-unused-but-set-variable",
+ "-Wno-unused-variable",
+ "-std=c11",
+ ],
+ includes = [
+ ".",
+ "tgt-vvp",
+ ],
+ deps = [
+ ":shared_headers",
+ ],
+)
+
+genrule(
+ name = "_pli_types_h",
+ srcs = ["_pli_types.h.in"],
+ outs = ["_pli_types.h"],
+ cmd = "cat $(location :_pli_types.h.in) | sed 's/# undef HAVE_INTTYPES_H/# define HAVE_INTTYPES_H 1/' > $@",
+)
+
+genrule(
+ name = "lexor_keyword_cc",
+ srcs = ["lexor_keyword.gperf"],
+ tools = ["@org_gnu_gperf//:gperf"],
+ outs = ["lexor_keyword.cc"],
+ cmd = "$(location @org_gnu_gperf//:gperf) -o -i 7 -C -k 1-4,6,9,$$ -H keyword_hash -N check_identifier -t $(location :lexor_keyword.gperf) > $@",
+ message = "Generating perfect hash function from $(SRCS)",
+)
+
+genrule(
+ name = "vhdlpp_lexor_keyword_cc",
+ srcs = ["vhdlpp/lexor_keyword.gperf"],
+ tools = ["@org_gnu_gperf//:gperf"],
+ outs = ["vhdlpp_lexor_keyword.cc"],
+ cmd = "$(location @org_gnu_gperf//:gperf) -o -i 7 --ignore-case -C -k 1-4,6,9,$$ -H keyword_hash -N check_identifier -t $(location :vhdlpp/lexor_keyword.gperf) > $@",
+ message = "Generating perfect hash function from $(SRCS)",
+)
+
+# In the following genrules we do an extremely crude approximation of a
+# configuration step -- workable now given the limited set of
+# platforms/environments we intend to target.
+
+HAVE_CONFIG_SUFFIXES = 'TIMES|IOSFWD|GETOPT_H|INTTYPES_H|DLFCN_H|LIBREADLINE|LIBZ|LIBBZ2|LROUND|SYS_WAIT_H|ALLOCA_H|FSEEKO|LIBPTHREAD|REALPATH'
+HAVE_CONFIG_RE = "HAVE_(%s)" % HAVE_CONFIG_SUFFIXES
+
+DEFS = ['HAVE_IOSFWD', 'HAVE_DLFCN_H', 'HAVE_GETOPT_H', 'HAVE_LIBREADLINE', 'HAVE_READLINE_READLINE_H', 'HAVE_LIBHISTORY', 'HAVE_READLINE_HISTORY_H', 'HAVE_INTTYPES_H', 'HAVE_LROUND', 'HAVE_LLROUND', 'HAVE_NAN', 'UINT64_T_AND_ULONG_SAME', 'HAVE_SYS_RESOURCE_H', 'LINUX']
+
+pseudo_configure(
+ name = "tgt_vvp__vvp_config_h",
+ src = "tgt-vvp/vvp_config.h.in",
+ out = "tgt-vvp/vvp_config.h",
+ defs = ['HAVE_STDINT_H', 'HAVE_INTTYPES_H', '_LARGEFILE_SOURCE'],
+ mappings = {},
+)
+
+pseudo_configure(
+ name = "config_h",
+ src = "config.h.in",
+ out = "config.h",
+ defs = ['HAVE_TIMES', 'HAVE_IOSFWD', 'HAVE_GETOPT_H', 'HAVE_INTTYPES_H', 'HAVE_DLFCN_H', 'HAVE_LIBREADLINE', 'HAVE_LIBZ', 'HAVE_LIBBZ2', 'HAVE_LROUND', 'HAVE_SYS_WAIT_H', 'HAVE_ALLOCA_H', 'HAVE_FSEEKO', 'HAVE_LIBPTHREAD', 'HAVE_REALPATH'],
+ mappings = {},
+)
+
+genrule(
+ name = "vpi__vpi_config_h",
+ srcs = ["vpi/vpi_config.h.in"],
+ outs = ["vpi/vpi_config.h"],
+ cmd = "perl -p -e 's/# undef (\w+)/#define $$1 1/' $< > $@",
+ message = "Configuring vpi/vpi_config.h.in",
+)
+
+pseudo_configure(
+ name = "vvp_gen__vvp_config_h",
+ src = "vvp/config.h.in",
+ out = "vvp_gen/config.h",
+ defs = DEFS,
+ mappings = {'SIZEOF_UNSIGNED_LONG_LONG': '8', 'SIZEOF_UNSIGNED_LONG': '8', 'SIZEOF_UNSIGNED': '4', 'USE_READLINE': '', 'USE_HISTORY': '', 'MODULE_DIR': '"."', '__STDC_FORMAT_MACROS': '', 'TIME_FMT_O': '"lo"', 'TIME_FMT_U': '"lu"', 'TIME_FMT_X': '"lx"', 'UL_AND_TIME64_SAME': '', 'i64round': 'lround', 'nan(x)': '(NAN)', 'INFINITY': 'HUGE_VAL', 'LU': '""', 'TU': '""'},
+)
+
+touch(
+ name = "version_tag_h",
+ out = "version_tag.h",
+ contents = dict(VERSION_TAG = '"v10_3"'),
+)
+
+# Trivial integration tests to confirm iverilog is minimally functional.
+copy(
+ name = "hello_v",
+ src = "@com_google_xls//dependency_support/com_icarus_iverilog:hello.v",
+ out = "hello.v",
+)
+
+iverilog_compile(
+ srcs = ["hello.v"],
+)
+
+vpi_binary(
+ name = "hello.vpi",
+ srcs = ["@com_google_xls//dependency_support/com_icarus_iverilog:hello_vpi.c"],
+ deps = [":vpi_user"],
+)
+
+genrule(
+ name = "run_hello",
+ srcs = ["hello.vvp"],
+ outs = ["hello.out"],
+ cmd = (
+ "$(location :vvp) " +
+ "-M$$(dirname $(location :hello.vpi)) " +
+ "-mhello $< > $@ "
+ ),
+ tools = [
+ ":hello.vpi",
+ ":vvp",
+ ],
+)
+
+sh_test(
+ name = "hello_verilog_test",
+ srcs = ["@com_google_xls//dependency_support/com_icarus_iverilog:hello_verilog_test.sh"],
+ data = [":hello.out"],
+ args = ["$(location :hello.out)"],
+)
diff --git a/dependency_support/com_icarus_iverilog/dummy.sh b/dependency_support/com_icarus_iverilog/dummy.sh
new file mode 100644
index 0000000000..a9bf588e2f
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/dummy.sh
@@ -0,0 +1 @@
+#!/bin/bash
diff --git a/dependency_support/com_icarus_iverilog/hello.v b/dependency_support/com_icarus_iverilog/hello.v
new file mode 100644
index 0000000000..293fc49453
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/hello.v
@@ -0,0 +1,29 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+// Verilog test helper file.
+
+module hello;
+
+integer val;
+
+initial begin
+ val = 41;
+ $increment(val);
+ $display("$increment returns val=%d", val);
+ $finish();
+end
+
+endmodule
diff --git a/dependency_support/com_icarus_iverilog/hello_verilog_test.sh b/dependency_support/com_icarus_iverilog/hello_verilog_test.sh
new file mode 100755
index 0000000000..8f4cc8d816
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/hello_verilog_test.sh
@@ -0,0 +1,19 @@
+#!/bin/bash
+#
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+set -eu
+
+exec grep 42 $1
diff --git a/dependency_support/com_icarus_iverilog/hello_vpi.c b/dependency_support/com_icarus_iverilog/hello_vpi.c
new file mode 100644
index 0000000000..5ac3765b51
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/hello_vpi.c
@@ -0,0 +1,60 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Based on http://en.wikipedia.org/wiki/Verilog_Procedural_Interface.
+//
+// Simple VPI plug-in to test the toolchain.
+
+#include "vpi_user.h"
+
+// Implements the increment system task
+static PLI_INT32 increment(PLI_BYTE8 *userdata) {
+ // Obtains a handle to the argument list
+ vpiHandle systfref = vpi_handle(vpiSysTfCall, NULL);
+ vpiHandle args_iter = vpi_iterate(vpiArgument, systfref);
+
+ // Grabs the value of the first argument
+ vpiHandle argh = vpi_scan(args_iter);
+ struct t_vpi_value argval;
+ argval.format = vpiIntVal;
+ vpi_get_value(argh, &argval);
+
+ int value = argval.value.integer;
+ vpi_printf("Input %d\n", value);
+
+ // Increments the value and puts it back as first argument
+ argval.value.integer = value + 1;
+ vpi_put_value(argh, &argval, NULL, vpiNoDelay);
+
+ // Cleans up and returns.
+ vpi_free_object(args_iter);
+ return 0;
+}
+
+// Registers the $increment task with the system.
+static void registerIncrementTask() {
+ s_vpi_systf_data task;
+ task.type = vpiSysTask;
+ task.tfname = "$increment";
+ task.calltf = increment;
+ task.compiletf = 0;
+
+ vpi_register_systf(&task);
+}
+
+// Registers the new system task here.
+void (*vlog_startup_routines[]) () = {
+ registerIncrementTask,
+ 0
+};
diff --git a/dependency_support/com_icarus_iverilog/iverilog.sh b/dependency_support/com_icarus_iverilog/iverilog.sh
new file mode 100755
index 0000000000..2365f98900
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/iverilog.sh
@@ -0,0 +1,28 @@
+#!/bin/bash
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Wrapper around iverilog binary. Adds the path to the dependencies to
+# the command line of iverilog.
+
+set -eu
+
+dir=$(dirname $(find . -name iverilog-bin | head -n 1))
+
+if [[ ! -d "$dir" ]]; then
+ echo "Unable to find dependencies (looking under $dir)." 1>&2
+ exit 1
+fi
+
+exec "$dir/iverilog-bin" -B"$dir" -DIVERILOG "$@"
diff --git a/dependency_support/com_icarus_iverilog/vvp.sh b/dependency_support/com_icarus_iverilog/vvp.sh
new file mode 100755
index 0000000000..f1d3e3873d
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/vvp.sh
@@ -0,0 +1,28 @@
+#!/bin/bash
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Wrapper around vvp binary. Adds the path to the dependencies to
+# the command line of vvp.
+
+set -eu
+
+dir=$(dirname $(find . -name vvp-bin | head -n 1))
+
+if [[ ! -d "$dir" ]]; then
+ echo "Unable to find dependencies (looking under $dir)." 1>&2
+ exit 1
+fi
+
+exec "$dir/vvp-bin" -M"$dir" "$@"
diff --git a/dependency_support/com_icarus_iverilog/workspace.bzl b/dependency_support/com_icarus_iverilog/workspace.bzl
new file mode 100644
index 0000000000..78640956f4
--- /dev/null
+++ b/dependency_support/com_icarus_iverilog/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the libedit library, used by iverilog (it poses as GNU readline)."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "com_icarus_iverilog",
+ urls = [
+ "https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz",
+ ],
+ strip_prefix = "iverilog-10_3",
+ sha256 = "4b884261645a73b37467242d6ae69264fdde2e7c4c15b245d902531efaaeb234",
+ build_file = Label("//dependency_support:com_icarus_iverilog/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/copy.bzl b/dependency_support/copy.bzl
new file mode 100644
index 0000000000..7aea96774c
--- /dev/null
+++ b/dependency_support/copy.bzl
@@ -0,0 +1,45 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Provides a utility macro that copies a file."""
+
+def copy(name, src, out):
+ native.genrule(
+ name = name,
+ srcs = [src],
+ outs = [out],
+ cmd = "cp $(SRCS) $@",
+ message = "Copying $(SRCS)",
+ )
+
+def touch(name, out, contents = None):
+ """Produces a genrule to creates a file, with optional #define contents.
+
+ Args:
+ name: Name to use for the genrule.
+ out: Path for the output file.
+ contents: Optional mapping that will be materialized as
+ `#define $KEY $VALUE` in the output file.
+ """
+ lines = []
+ if contents:
+ for k, v in contents.items():
+ lines.append("#define %s %s" % (k, v))
+ contents = "\n".join(lines)
+ native.genrule(
+ name = name,
+ outs = [out],
+ cmd = "echo " + repr(contents) + " > $@",
+ message = "Touch $@",
+ )
diff --git a/dependency_support/dk_thrysoee_libedit/BUILD b/dependency_support/dk_thrysoee_libedit/BUILD
new file mode 100644
index 0000000000..0d2a44b9df
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/BUILD
@@ -0,0 +1,20 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["notice"]) # BSD
+
+exports_files([
+ "readline_example.cc",
+ "readline_test.cc",
+])
diff --git a/dependency_support/dk_thrysoee_libedit/build_defs.bzl b/dependency_support/dk_thrysoee_libedit/build_defs.bzl
new file mode 100644
index 0000000000..a335f9407a
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/build_defs.bzl
@@ -0,0 +1,46 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Utilities for building libedit."""
+
+def _generated_headers(names):
+ """Transforms names into their generated equivalent."""
+ return [":src/%s.h" % name for name in names]
+
+def _makelist(name, srcs, flag):
+ """Runs makelist over a set of inputs to generate a header file."""
+ native.genrule(
+ name = "%s_makelist" % name,
+ srcs = srcs,
+ outs = ["src/%s.h" % name],
+ tools = ["src/makelist"],
+ cmd = "sh $(location src/makelist) %s $(SRCS) > $@" % flag,
+ )
+
+# The base files for makelist calls.
+_inputs = ["common", "emacs", "vi"]
+
+# The headers generated directly from inputs.
+_input_headers = _generated_headers(_inputs)
+
+# The full set of headers generated, used for srcs.
+makelist_headers = _input_headers + _generated_headers(["fcns", "func", "help"])
+
+def makelist_genrules():
+ """Runs all necessary makelist calls."""
+ for name in _inputs:
+ _makelist(name, ["src/%s.c" % name], "-h")
+ _makelist("fcns", _input_headers, "-fh")
+ _makelist("func", _input_headers, "-fc")
+ _makelist("help", ["src/%s.c" % name for name in _inputs], "-bh")
diff --git a/dependency_support/dk_thrysoee_libedit/bundled.BUILD.bazel b/dependency_support/dk_thrysoee_libedit/bundled.BUILD.bazel
new file mode 100644
index 0000000000..ecdfa2d5e2
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/bundled.BUILD.bazel
@@ -0,0 +1,158 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description:
+# Line editor library.
+#
+# Use the "pretend_to_be_gnu_readline" libraries if your client wants to use
+# readline-like APIs for libedit. Use "native" libraries if your client wants
+# to use native libedit APIs.
+
+# Provides headers for edit_impl.
+load(
+ "@com_google_xls//dependency_support/dk_thrysoee_libedit:build_defs.bzl",
+ "makelist_genrules",
+ "makelist_headers",
+)
+load("@com_google_xls//dependency_support:copy.bzl", "copy")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+licenses(["notice"]) # BSD
+
+exports_files(["LICENSE"])
+
+GNU_READLINE_IMITATION_HEADERS = [
+ "include/readline/history.h",
+ "include/readline/readline.h",
+]
+
+# Provides the readline-like interface.
+# #include
+cc_library(
+ name = "pretend_to_be_gnu_readline_system",
+ hdrs = GNU_READLINE_IMITATION_HEADERS,
+ includes = ["include"],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":edit_impl",
+ ],
+)
+
+# Provides the readline-like interface.
+# #include
+cc_library(
+ name = "pretend_to_be_gnu_readline_system_toplevel",
+ hdrs = GNU_READLINE_IMITATION_HEADERS,
+ includes = ["include/readline"],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":edit_impl",
+ ],
+)
+
+# Provides the libedit interface.
+# #include
+# #include
+cc_library(
+ name = "native_system",
+ hdrs = [
+ "src/editline/readline.h",
+ "src/histedit.h",
+ ],
+ includes = ["src"],
+ visibility = ["//visibility:public"],
+ deps = [":edit_impl"],
+)
+
+makelist_genrules()
+
+# The common target for libedit. Singular to avoid recompilation of files
+# across the multiple #include approaches.
+cc_library(
+ name = "edit_impl",
+ srcs = glob(
+ [
+ "src/*.c",
+ "src/*.h",
+ ],
+ ) + [
+ # Generated file is not found by glob.
+ "src/config.h",
+ ] + makelist_headers,
+ hdrs = [
+ "src/editline/readline.h",
+ # Used as includes; otherwise, these cause compiler errors.
+ "src/history.c",
+ "src/tokenizer.c",
+ ],
+ copts = [
+ "-Wno-implicit-function-declaration", # strlcpy is defined but not included
+ "-Wno-unused-result",
+ "-Wno-pointer-sign",
+ ],
+ defines = ["HAVE_GETPW_R_POSIX"],
+ features = ["-parse_headers"],
+ includes = ["src"],
+ deps = [
+ "@net_invisible_island_ncurses//:ncurses",
+ ],
+)
+
+# A tiny example binary.
+cc_binary(
+ name = "readline_example",
+ srcs = ["@com_google_xls//dependency_support/dk_thrysoee_libedit:readline_example.cc"],
+ deps = [
+ ":pretend_to_be_gnu_readline_system_toplevel",
+ ],
+)
+
+# Simple test to verify compilation.
+cc_test(
+ name = "readline_test",
+ size = "small",
+ srcs = ["@com_google_xls//dependency_support/dk_thrysoee_libedit:readline_test.cc"],
+ deps = [
+ ":pretend_to_be_gnu_readline_system",
+ "@com_google_absl//absl/strings",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+forwarding_header_contents = """
+// libedit combines the functionality of GNU's readline.h and history.h in one
+// header, so this file is just a stub.
+
+#ifndef DK_THRYSOEE_LIBEDIT_READLINE_H
+#define DK_THRYSOEE_LIBEDIT_READLINE_H
+
+#include "editline/readline.h"
+
+#endif // DK_THRYSOEE_LIBEDIT_READLINE_H
+"""
+[genrule(
+ name = "%s_h" % name,
+ outs = ["include/readline/%s.h" % name],
+ cmd = "cat > $@ << 'BAZEL_EOF'\n" + forwarding_header_contents.replace('$', '$$') + "\nBAZEL_EOF",
+) for name in ["history", "readline"]]
+
+pseudo_configure(
+ name = "config_h",
+ src = "config.h.in",
+ out = "src/config.h",
+ defs = ['HAVE_CURSES_H', 'HAVE_DIRENT_H', 'HAVE_DLFCN_H', 'HAVE_ENDPWENT', 'HAVE_FCNTL_H', 'HAVE_FORK', 'HAVE_GETLINE', 'HAVE_INTTYPES_H', 'HAVE_ISASCII', 'HAVE_LIBNCURSES', 'HAVE_LIMITS_H', 'HAVE_MALLOC_H', 'HAVE_MEMCHR', 'HAVE_MEMORY_H', 'HAVE_MEMSET', 'HAVE_NCURSES_H', 'HAVE_REGCOMP', 'HAVE_RE_COMP', 'HAVE_SECURE_GETENV', 'HAVE_STDINT_H', 'HAVE_STDLIB_H', 'HAVE_STRCASECMP', 'HAVE_STRCHR', 'HAVE_STRCSPN', 'HAVE_STRDUP', 'HAVE_STRERROR', 'HAVE_STRINGS_H', 'HAVE_STRING_H', 'HAVE_STRLCAT', 'HAVE_STRRCHR', 'HAVE_STRSTR', 'HAVE_STRTOL', 'HAVE_SYS_CDEFS_H', 'HAVE_SYS_IOCTL_H', 'HAVE_SYS_PARAM_H', 'HAVE_SYS_STAT_H', 'HAVE_SYS_TYPES_H', 'HAVE_SYS_WAIT_H', 'HAVE_TERMCAP_H', 'HAVE_TERM_H', 'HAVE_UNISTD_H', 'HAVE_U_INT32_T', 'HAVE_VFORK', 'HAVE_WCSDUP', 'HAVE_WORKING_FORK', 'HAVE_WORKING_VFORK', 'LSTAT_FOLLOWS_SLASHED_SYMLINK', 'STDC_HEADERS', '_ALL_SOURCE', '_GNU_SOURCE', '_POSIX_PTHREAD_SEMANTICS', '_TANDEM_SOURCE', '__EXTENSIONS__'],
+ mappings = {'HAVE_STRLCPY': '0', 'LT_OBJDIR': '".libs"', 'PACKAGE': '"libedit-20180525"', 'PACKAGE_BUGREPORT': '""', 'PACKAGE_NAME': '"libedit"', 'PACKAGE_STRING': '"libedit 3.1"', 'PACKAGE_TARNAME': '"libedit-20180525"', 'PACKAGE_URL': '""', 'PACKAGE_VERSION': '"3.1"', 'RETSIGTYPE': 'void', 'VERSION': '"3.1"', 'SCCSID': '', 'lint': ''},
+)
+
+
diff --git a/dependency_support/dk_thrysoee_libedit/readline_example.cc b/dependency_support/dk_thrysoee_libedit/readline_example.cc
new file mode 100644
index 0000000000..e0a6a8c92b
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/readline_example.cc
@@ -0,0 +1,27 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include
+
+#include
+
+int main(int argc, char** argv) {
+ for (;;) {
+ char* result = readline("Test> ");
+ if (result == nullptr) break;
+ fprintf(stdout, "Result: %s\\n", result);
+ add_history(result);
+ }
+ return 0;
+}
diff --git a/dependency_support/dk_thrysoee_libedit/readline_test.cc b/dependency_support/dk_thrysoee_libedit/readline_test.cc
new file mode 100644
index 0000000000..541a758bdf
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/readline_test.cc
@@ -0,0 +1,99 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include
+
+#include
+
+#include
+#include
+
+#include "absl/strings/substitute.h"
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+using ::testing::Eq;
+using ::testing::Ne;
+using ::testing::StrEq;
+using ::testing::Test;
+
+namespace {
+
+std::string HomeDirectory() {
+ const char* home = getenv("HOME");
+ return home == nullptr ? "" : home;
+}
+
+} // namespace
+
+class ReadlineTest : public Test {
+ protected:
+ void TestTilde(const char* input, const std::string& expected) {
+ auto actual = tilde_expand(const_cast(input));
+ EXPECT_THAT(actual, Eq(expected));
+ free(actual);
+ }
+};
+
+TEST_F(ReadlineTest, ReadLine) {
+ // Create a new input for the purpose of this test
+ int pipefds[2];
+ ASSERT_THAT(pipe2(pipefds, 0), Eq(0));
+
+ FILE *in = fdopen(pipefds[0], "rb");
+ ASSERT_THAT(in, Ne(nullptr));
+ rl_instream = in;
+
+ ASSERT_THAT(write(pipefds[1], "foo\\n", 4), Eq(4));
+ ASSERT_THAT(close(pipefds[1]), Eq(0));
+
+ // Test 1: Read one line.
+ {
+ char* s = readline("test> ");
+ EXPECT_THAT(s, Ne(nullptr));
+ EXPECT_THAT(s, StrEq("foo"));
+ free(s);
+ }
+
+ // Test 2: Since we closed the stream after one line, no more lines are read.
+ {
+ char* s = readline("test> ");
+ EXPECT_THAT(s, Eq(nullptr));
+ }
+
+ ASSERT_THAT(fclose(in), Eq(0));
+}
+
+TEST_F(ReadlineTest, TildeMinimal) {
+ // tilde_expand always appends a /.
+ TestTilde("~", absl::Substitute("$0/", HomeDirectory()));
+}
+
+TEST_F(ReadlineTest, TildeSlash) {
+ TestTilde("~/", absl::Substitute("$0/", HomeDirectory()));
+}
+
+TEST_F(ReadlineTest, TildeSlashPath) {
+ TestTilde("~/foo/bar",
+ absl::Substitute("$0/foo/bar", HomeDirectory()));
+}
+
+TEST_F(ReadlineTest, TildeUnchanged) {
+ TestTilde("foo/bar", "foo/bar");
+}
+
+TEST_F(ReadlineTest, TildeInvalid) {
+ auto val = "~invalid-user-that-does-not-exist/";
+ TestTilde(val, val);
+}
diff --git a/dependency_support/dk_thrysoee_libedit/workspace.bzl b/dependency_support/dk_thrysoee_libedit/workspace.bzl
new file mode 100644
index 0000000000..c87910240c
--- /dev/null
+++ b/dependency_support/dk_thrysoee_libedit/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the libedit library, used by iverilog (it poses as GNU readline)."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "dk_thrysoee_libedit",
+ urls = [
+ "https://www.thrysoee.dk/editline/libedit-20191231-3.1.tar.gz",
+ ],
+ strip_prefix = "libedit-20191231-3.1",
+ sha256 = "dbb82cb7e116a5f8025d35ef5b4f7d4a3cdd0a3909a146a39112095a2d229071",
+ build_file = Label("//dependency_support:dk_thrysoee_libedit/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/edu_berkeley_abc/bundled.BUILD.bazel b/dependency_support/edu_berkeley_abc/bundled.BUILD.bazel
new file mode 100644
index 0000000000..41d35cbcb9
--- /dev/null
+++ b/dependency_support/edu_berkeley_abc/bundled.BUILD.bazel
@@ -0,0 +1,1179 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# ABC: System for Sequential Synthesis and Verification by Berkeley Logic
+# Synthesis and Verification Group.
+
+licenses(["notice"])
+
+exports_files(["LICENSE"])
+
+cc_binary(
+ name = "abc",
+ srcs = ["src/base/main/main.c"],
+ includes = ["src/"],
+ deps = [":abc-lib"],
+)
+
+cc_library(
+ name = "abc-lib",
+ srcs = glob(["src/**/*.h"]) + [
+ # this list is generated by calling "make cmake_info" and incorporating the files
+ # between the SEPARATOR_SRC blocks
+ "src/base/abc/abcAig.c",
+ "src/base/abc/abcBarBuf.c",
+ "src/base/abc/abcBlifMv.c",
+ "src/base/abc/abcCheck.c",
+ "src/base/abc/abcDfs.c",
+ "src/base/abc/abcFanio.c",
+ "src/base/abc/abcFanOrder.c",
+ "src/base/abc/abcFunc.c",
+ "src/base/abc/abcHie.c",
+ "src/base/abc/abcHieCec.c",
+ "src/base/abc/abcHieGia.c",
+ "src/base/abc/abcHieNew.c",
+ "src/base/abc/abcLatch.c",
+ "src/base/abc/abcLib.c",
+ "src/base/abc/abcMinBase.c",
+ "src/base/abc/abcNames.c",
+ "src/base/abc/abcNetlist.c",
+ "src/base/abc/abcNtk.c",
+ "src/base/abc/abcObj.c",
+ "src/base/abc/abcRefs.c",
+ "src/base/abc/abcShow.c",
+ "src/base/abc/abcSop.c",
+ "src/base/abc/abcUtil.c",
+ "src/base/abci/abc.c",
+ "src/base/abci/abcAttach.c",
+ "src/base/abci/abcAuto.c",
+ "src/base/abci/abcBalance.c",
+ "src/base/abci/abcBidec.c",
+ "src/base/abci/abcBm.c",
+ "src/base/abci/abcBmc.c",
+ "src/base/abci/abcCas.c",
+ "src/base/abci/abcCascade.c",
+ "src/base/abci/abcCollapse.c",
+ "src/base/abci/abcCut.c",
+ "src/base/abci/abcDar.c",
+ "src/base/abci/abcDebug.c",
+ "src/base/abci/abcDec.c",
+ "src/base/abci/abcDetect.c",
+ "src/base/abci/abcDress.c",
+ "src/base/abci/abcDress2.c",
+ "src/base/abci/abcDress3.c",
+ "src/base/abci/abcDsd.c",
+ "src/base/abci/abcEco.c",
+ "src/base/abci/abcExact.c",
+ "src/base/abci/abcExtract.c",
+ "src/base/abci/abcFraig.c",
+ "src/base/abci/abcFx.c",
+ "src/base/abci/abcFxu.c",
+ "src/base/abci/abcGen.c",
+ "src/base/abci/abcHaig.c",
+ "src/base/abci/abcIf.c",
+ "src/base/abci/abcIfif.c",
+ "src/base/abci/abcIfMux.c",
+ "src/base/abci/abcIvy.c",
+ "src/base/abci/abcLog.c",
+ "src/base/abci/abcLut.c",
+ "src/base/abci/abcLutmin.c",
+ "src/base/abci/abcMap.c",
+ "src/base/abci/abcMerge.c",
+ "src/base/abci/abcMfs.c",
+ "src/base/abci/abcMini.c",
+ "src/base/abci/abcMiter.c",
+ "src/base/abci/abcMulti.c",
+ "src/base/abci/abcNtbdd.c",
+ "src/base/abci/abcNpn.c",
+ "src/base/abci/abcNpnSave.c",
+ "src/base/abci/abcOdc.c",
+ "src/base/abci/abcOrder.c",
+ "src/base/abci/abcPart.c",
+ "src/base/abci/abcPrint.c",
+ "src/base/abci/abcProve.c",
+ "src/base/abci/abcQbf.c",
+ "src/base/abci/abcQuant.c",
+ "src/base/abci/abcRec3.c",
+ "src/base/abci/abcReconv.c",
+ "src/base/abci/abcReach.c",
+ "src/base/abci/abcRefactor.c",
+ "src/base/abci/abcRenode.c",
+ "src/base/abci/abcReorder.c",
+ "src/base/abci/abcRestruct.c",
+ "src/base/abci/abcResub.c",
+ "src/base/abci/abcRewrite.c",
+ "src/base/abci/abcRpo.c",
+ "src/base/abci/abcRr.c",
+ "src/base/abci/abcRunGen.c",
+ "src/base/abci/abcSat.c",
+ "src/base/abci/abcSaucy.c",
+ "src/base/abci/abcScorr.c",
+ "src/base/abci/abcSense.c",
+ "src/base/abci/abcSpeedup.c",
+ "src/base/abci/abcStrash.c",
+ "src/base/abci/abcSweep.c",
+ "src/base/abci/abcSymm.c",
+ "src/base/abci/abcTim.c",
+ "src/base/abci/abcTiming.c",
+ "src/base/abci/abcUnate.c",
+ "src/base/abci/abcUnreach.c",
+ "src/base/abci/abcVerify.c",
+ "src/base/abci/abcXsim.c",
+ "src/base/cmd/cmd.c",
+ "src/base/cmd/cmdAlias.c",
+ "src/base/cmd/cmdApi.c",
+ "src/base/cmd/cmdAuto.c",
+ "src/base/cmd/cmdFlag.c",
+ "src/base/cmd/cmdHist.c",
+ "src/base/cmd/cmdLoad.c",
+ "src/base/cmd/cmdPlugin.c",
+ "src/base/cmd/cmdStarter.c",
+ "src/base/cmd/cmdUtils.c",
+ "src/base/io/io.c",
+ "src/base/io/ioJson.c",
+ "src/base/io/ioReadAiger.c",
+ "src/base/io/ioReadBaf.c",
+ "src/base/io/ioReadBblif.c",
+ "src/base/io/ioReadBench.c",
+ "src/base/io/ioReadBlif.c",
+ "src/base/io/ioReadBlifAig.c",
+ "src/base/io/ioReadBlifMv.c",
+ "src/base/io/ioReadDsd.c",
+ "src/base/io/ioReadEdif.c",
+ "src/base/io/ioReadEqn.c",
+ "src/base/io/ioReadPla.c",
+ "src/base/io/ioReadPlaMo.c",
+ "src/base/io/ioReadVerilog.c",
+ "src/base/io/ioUtil.c",
+ "src/base/io/ioWriteAiger.c",
+ "src/base/io/ioWriteBaf.c",
+ "src/base/io/ioWriteBblif.c",
+ "src/base/io/ioWriteBench.c",
+ "src/base/io/ioWriteBlif.c",
+ "src/base/io/ioWriteBlifMv.c",
+ "src/base/io/ioWriteBook.c",
+ "src/base/io/ioWriteCnf.c",
+ "src/base/io/ioWriteDot.c",
+ "src/base/io/ioWriteEqn.c",
+ "src/base/io/ioWriteGml.c",
+ "src/base/io/ioWriteList.c",
+ "src/base/io/ioWritePla.c",
+ "src/base/io/ioWriteVerilog.c",
+ "src/base/io/ioWriteSmv.c",
+ # removed from the library (as done in CMakeLists.txt in the abc distribution)
+ # "src/base/main/main.c",
+ "src/base/main/mainFrame.c",
+ "src/base/main/mainInit.c",
+ "src/base/main/mainLib.c",
+ "src/base/main/mainReal.c",
+ "src/base/main/libSupport.c",
+ "src/base/main/mainUtils.c",
+ "src/base/exor/exor.c",
+ "src/base/exor/exorBits.c",
+ "src/base/exor/exorCubes.c",
+ "src/base/exor/exorLink.c",
+ "src/base/exor/exorList.c",
+ "src/base/exor/exorUtil.c",
+ "src/base/ver/verCore.c",
+ "src/base/ver/verFormula.c",
+ "src/base/ver/verParse.c",
+ "src/base/ver/verStream.c",
+ "src/base/wlc/wlcAbs.c",
+ "src/base/wlc/wlcAbs2.c",
+ "src/base/wlc/wlcAbc.c",
+ "src/base/wlc/wlcPth.c",
+ "src/base/wlc/wlcBlast.c",
+ "src/base/wlc/wlcCom.c",
+ "src/base/wlc/wlcGraft.c",
+ "src/base/wlc/wlcJson.c",
+ "src/base/wlc/wlcMem.c",
+ "src/base/wlc/wlcNdr.c",
+ "src/base/wlc/wlcNtk.c",
+ "src/base/wlc/wlcReadSmt.c",
+ "src/base/wlc/wlcReadVer.c",
+ "src/base/wlc/wlcSim.c",
+ "src/base/wlc/wlcShow.c",
+ "src/base/wlc/wlcStdin.c",
+ "src/base/wlc/wlcUif.c",
+ "src/base/wlc/wlcWin.c",
+ "src/base/wlc/wlcWriteVer.c",
+ "src/base/wln/wln.c",
+ "src/base/wln/wlnMem.c",
+ "src/base/wln/wlnNdr.c",
+ "src/base/wln/wlnNtk.c",
+ "src/base/wln/wlnObj.c",
+ "src/base/wln/wlnRetime.c",
+ "src/base/wln/wlnWlc.c",
+ "src/base/wln/wlnWriteVer.c",
+ "src/base/acb/acbAbc.c",
+ "src/base/acb/acbAig.c",
+ "src/base/acb/acbCom.c",
+ "src/base/acb/acbFunc.c",
+ "src/base/acb/acbMfs.c",
+ "src/base/acb/acbPush.c",
+ "src/base/acb/acbSets.c",
+ "src/base/acb/acbTest.c",
+ "src/base/acb/acbUtil.c",
+ "src/base/bac/bacBlast.c",
+ "src/base/bac/bacBac.c",
+ "src/base/bac/bacCom.c",
+ "src/base/bac/bacLib.c",
+ "src/base/bac/bacNtk.c",
+ "src/base/bac/bacPrsBuild.c",
+ "src/base/bac/bacPrsTrans.c",
+ "src/base/bac/bacPtr.c",
+ "src/base/bac/bacPtrAbc.c",
+ "src/base/bac/bacReadBlif.c",
+ "src/base/bac/bacReadSmt.c",
+ "src/base/bac/bacReadVer.c",
+ "src/base/bac/bacWriteBlif.c",
+ "src/base/bac/bacWriteSmt.c",
+ "src/base/bac/bacWriteVer.c",
+ "src/base/cba/cbaBlast.c",
+ "src/base/cba/cbaCba.c",
+ "src/base/cba/cbaCom.c",
+ "src/base/cba/cbaNtk.c",
+ "src/base/cba/cbaReadBlif.c",
+ "src/base/cba/cbaReadVer.c",
+ "src/base/cba/cbaWriteBlif.c",
+ "src/base/cba/cbaWriteVer.c",
+ "src/base/pla/plaCom.c",
+ "src/base/pla/plaHash.c",
+ "src/base/pla/plaMan.c",
+ "src/base/pla/plaMerge.c",
+ "src/base/pla/plaSimple.c",
+ "src/base/pla/plaRead.c",
+ "src/base/pla/plaWrite.c",
+ "src/base/test/test.c",
+ "src/map/mapper/mapper.c",
+ "src/map/mapper/mapperCanon.c",
+ "src/map/mapper/mapperCore.c",
+ "src/map/mapper/mapperCreate.c",
+ "src/map/mapper/mapperCut.c",
+ "src/map/mapper/mapperCutUtils.c",
+ "src/map/mapper/mapperLib.c",
+ "src/map/mapper/mapperMatch.c",
+ "src/map/mapper/mapperRefs.c",
+ "src/map/mapper/mapperSuper.c",
+ "src/map/mapper/mapperSwitch.c",
+ "src/map/mapper/mapperTable.c",
+ "src/map/mapper/mapperTime.c",
+ "src/map/mapper/mapperTree.c",
+ "src/map/mapper/mapperTruth.c",
+ "src/map/mapper/mapperUtils.c",
+ "src/map/mapper/mapperVec.c",
+ "src/map/mio/mio.c",
+ "src/map/mio/mioApi.c",
+ "src/map/mio/mioFunc.c",
+ "src/map/mio/mioParse.c",
+ "src/map/mio/mioRead.c",
+ "src/map/mio/mioSop.c",
+ "src/map/mio/mioUtils.c",
+ "src/map/super/super.c",
+ "src/map/super/superAnd.c",
+ "src/map/super/superGate.c",
+ "src/map/if/ifCom.c",
+ "src/map/if/ifCache.c",
+ "src/map/if/ifCore.c",
+ "src/map/if/ifCut.c",
+ "src/map/if/ifData2.c",
+ "src/map/if/ifDec07.c",
+ "src/map/if/ifDec08.c",
+ "src/map/if/ifDec10.c",
+ "src/map/if/ifDec16.c",
+ "src/map/if/ifDec75.c",
+ "src/map/if/ifDelay.c",
+ "src/map/if/ifDsd.c",
+ "src/map/if/ifLibBox.c",
+ "src/map/if/ifLibLut.c",
+ "src/map/if/ifMan.c",
+ "src/map/if/ifMap.c",
+ "src/map/if/ifMatch2.c",
+ "src/map/if/ifReduce.c",
+ "src/map/if/ifSat.c",
+ "src/map/if/ifSelect.c",
+ "src/map/if/ifSeq.c",
+ "src/map/if/ifTest.c",
+ "src/map/if/ifTime.c",
+ "src/map/if/ifTruth.c",
+ "src/map/if/ifTune.c",
+ "src/map/if/ifUtil.c",
+ "src/map/amap/amapCore.c",
+ "src/map/amap/amapGraph.c",
+ "src/map/amap/amapLib.c",
+ "src/map/amap/amapLiberty.c",
+ "src/map/amap/amapMan.c",
+ "src/map/amap/amapMatch.c",
+ "src/map/amap/amapMerge.c",
+ "src/map/amap/amapOutput.c",
+ "src/map/amap/amapParse.c",
+ "src/map/amap/amapPerm.c",
+ "src/map/amap/amapRead.c",
+ "src/map/amap/amapRule.c",
+ "src/map/amap/amapUniq.c",
+ "src/map/cov/covBuild.c",
+ "src/map/cov/covCore.c",
+ "src/map/cov/covMan.c",
+ "src/map/cov/covMinEsop.c",
+ "src/map/cov/covMinMan.c",
+ "src/map/cov/covMinSop.c",
+ "src/map/cov/covMinUtil.c",
+ "src/map/scl/scl.c",
+ "src/map/scl/sclBuffer.c",
+ "src/map/scl/sclBufSize.c",
+ "src/map/scl/sclDnsize.c",
+ "src/map/scl/sclLiberty.c",
+ "src/map/scl/sclLibScl.c",
+ "src/map/scl/sclLibUtil.c",
+ "src/map/scl/sclLoad.c",
+ "src/map/scl/sclSize.c",
+ "src/map/scl/sclUpsize.c",
+ "src/map/scl/sclUtil.c",
+ "src/map/mpm/mpmAbc.c",
+ "src/map/mpm/mpmCore.c",
+ "src/map/mpm/mpmDsd.c",
+ "src/map/mpm/mpmGates.c",
+ "src/map/mpm/mpmLib.c",
+ "src/map/mpm/mpmMan.c",
+ "src/map/mpm/mpmMap.c",
+ "src/map/mpm/mpmMig.c",
+ "src/map/mpm/mpmPre.c",
+ "src/map/mpm/mpmTruth.c",
+ "src/map/mpm/mpmUtil.c",
+ "src/misc/extra/extraUtilBitMatrix.c",
+ "src/misc/extra/extraUtilCanon.c",
+ "src/misc/extra/extraUtilCfs.c",
+ "src/misc/extra/extraUtilCube.c",
+ "src/misc/extra/extraUtilDsd.c",
+ "src/misc/extra/extraUtilEnum.c",
+ "src/misc/extra/extraUtilFile.c",
+ "src/misc/extra/extraUtilGen.c",
+ "src/misc/extra/extraUtilMacc.c",
+ "src/misc/extra/extraUtilMaj.c",
+ "src/misc/extra/extraUtilMemory.c",
+ "src/misc/extra/extraUtilMisc.c",
+ "src/misc/extra/extraUtilMult.c",
+ "src/misc/extra/extraUtilPath.c",
+ "src/misc/extra/extraUtilPerm.c",
+ "src/misc/extra/extraUtilProgress.c",
+ "src/misc/extra/extraUtilReader.c",
+ "src/misc/extra/extraUtilSupp.c",
+ "src/misc/extra/extraUtilTruth.c",
+ "src/misc/extra/extraUtilUtil.c",
+ "src/misc/mvc/mvcApi.c",
+ "src/misc/mvc/mvcCompare.c",
+ "src/misc/mvc/mvcContain.c",
+ "src/misc/mvc/mvcCover.c",
+ "src/misc/mvc/mvcCube.c",
+ "src/misc/mvc/mvcDivide.c",
+ "src/misc/mvc/mvcDivisor.c",
+ "src/misc/mvc/mvcList.c",
+ "src/misc/mvc/mvcLits.c",
+ "src/misc/mvc/mvcMan.c",
+ "src/misc/mvc/mvcOpAlg.c",
+ "src/misc/mvc/mvcOpBool.c",
+ "src/misc/mvc/mvcPrint.c",
+ "src/misc/mvc/mvcSort.c",
+ "src/misc/mvc/mvcUtils.c",
+ "src/misc/st/st.c",
+ "src/misc/st/stmm.c",
+ "src/misc/util/utilBridge.c",
+ "src/misc/util/utilCex.c",
+ "src/misc/util/utilColor.c",
+ "src/misc/util/utilFile.c",
+ "src/misc/util/utilIsop.c",
+ "src/misc/util/utilNam.c",
+ "src/misc/util/utilSignal.c",
+ "src/misc/util/utilSort.c",
+ "src/misc/nm/nmApi.c",
+ "src/misc/nm/nmTable.c",
+ "src/misc/tim/timBox.c",
+ "src/misc/tim/timDump.c",
+ "src/misc/tim/timMan.c",
+ "src/misc/tim/timTime.c",
+ "src/misc/tim/timTrav.c",
+ "src/misc/bzlib/blocksort.c",
+ "src/misc/bzlib/bzlib.c",
+ "src/misc/bzlib/compress.c",
+ "src/misc/bzlib/crctable.c",
+ "src/misc/bzlib/decompress.c",
+ "src/misc/bzlib/huffman.c",
+ "src/misc/bzlib/randtable.c",
+ "src/misc/zlib/adler32.c",
+ "src/misc/zlib/compress_.c",
+ "src/misc/zlib/crc32.c",
+ "src/misc/zlib/deflate.c",
+ "src/misc/zlib/gzclose.c",
+ "src/misc/zlib/gzlib.c",
+ "src/misc/zlib/gzread.c",
+ "src/misc/zlib/gzwrite.c",
+ "src/misc/zlib/infback.c",
+ "src/misc/zlib/inffast.c",
+ "src/misc/zlib/inflate.c",
+ "src/misc/zlib/inftrees.c",
+ "src/misc/zlib/trees.c",
+ "src/misc/zlib/uncompr.c",
+ "src/misc/zlib/zutil.c",
+ "src/misc/mem/mem.c",
+ "src/misc/bar/bar.c",
+ "src/misc/bbl/bblif.c",
+ "src/misc/parse/parseEqn.c",
+ "src/misc/parse/parseStack.c",
+ "src/opt/cut/cutApi.c",
+ "src/opt/cut/cutCut.c",
+ "src/opt/cut/cutMan.c",
+ "src/opt/cut/cutMerge.c",
+ "src/opt/cut/cutNode.c",
+ "src/opt/cut/cutOracle.c",
+ "src/opt/cut/cutPre22.c",
+ "src/opt/cut/cutSeq.c",
+ "src/opt/cut/cutTruth.c",
+ "src/opt/fxu/fxu.c",
+ "src/opt/fxu/fxuCreate.c",
+ "src/opt/fxu/fxuHeapD.c",
+ "src/opt/fxu/fxuHeapS.c",
+ "src/opt/fxu/fxuList.c",
+ "src/opt/fxu/fxuMatrix.c",
+ "src/opt/fxu/fxuPair.c",
+ "src/opt/fxu/fxuPrint.c",
+ "src/opt/fxu/fxuReduce.c",
+ "src/opt/fxu/fxuSelect.c",
+ "src/opt/fxu/fxuSingle.c",
+ "src/opt/fxu/fxuUpdate.c",
+ "src/opt/fxch/Fxch.c",
+ "src/opt/fxch/FxchDiv.c",
+ "src/opt/fxch/FxchMan.c",
+ "src/opt/fxch/FxchSCHashTable.c",
+ "src/opt/rwr/rwrDec.c",
+ "src/opt/rwr/rwrEva.c",
+ "src/opt/rwr/rwrExp.c",
+ "src/opt/rwr/rwrLib.c",
+ "src/opt/rwr/rwrMan.c",
+ "src/opt/rwr/rwrPrint.c",
+ "src/opt/rwr/rwrUtil.c",
+ "src/opt/mfs/mfsCore.c",
+ "src/opt/mfs/mfsDiv.c",
+ "src/opt/mfs/mfsInter.c",
+ "src/opt/mfs/mfsMan.c",
+ "src/opt/mfs/mfsResub.c",
+ "src/opt/mfs/mfsSat.c",
+ "src/opt/mfs/mfsStrash.c",
+ "src/opt/mfs/mfsWin.c",
+ "src/opt/sim/simMan.c",
+ "src/opt/sim/simSeq.c",
+ "src/opt/sim/simSupp.c",
+ "src/opt/sim/simSwitch.c",
+ "src/opt/sim/simSym.c",
+ "src/opt/sim/simSymSat.c",
+ "src/opt/sim/simSymSim.c",
+ "src/opt/sim/simSymStr.c",
+ "src/opt/sim/simUtils.c",
+ "src/opt/ret/retArea.c",
+ "src/opt/ret/retCore.c",
+ "src/opt/ret/retDelay.c",
+ "src/opt/ret/retFlow.c",
+ "src/opt/ret/retIncrem.c",
+ "src/opt/ret/retInit.c",
+ "src/opt/ret/retLvalue.c",
+ "src/opt/fret/fretMain.c",
+ "src/opt/fret/fretFlow.c",
+ "src/opt/fret/fretInit.c",
+ "src/opt/fret/fretTime.c",
+ "src/opt/res/resCore.c",
+ "src/opt/res/resDivs.c",
+ "src/opt/res/resFilter.c",
+ "src/opt/res/resSat.c",
+ "src/opt/res/resSim.c",
+ "src/opt/res/resStrash.c",
+ "src/opt/res/resWin.c",
+ "src/opt/lpk/lpkCore.c",
+ "src/opt/lpk/lpkAbcDec.c",
+ "src/opt/lpk/lpkAbcMux.c",
+ "src/opt/lpk/lpkAbcDsd.c",
+ "src/opt/lpk/lpkAbcUtil.c",
+ "src/opt/lpk/lpkCut.c",
+ "src/opt/lpk/lpkMan.c",
+ "src/opt/lpk/lpkMap.c",
+ "src/opt/lpk/lpkMulti.c",
+ "src/opt/lpk/lpkMux.c",
+ "src/opt/lpk/lpkSets.c",
+ "src/opt/nwk/nwkAig.c",
+ "src/opt/nwk/nwkCheck.c",
+ "src/opt/nwk/nwkBidec.c",
+ "src/opt/nwk/nwkDfs.c",
+ "src/opt/nwk/nwkFanio.c",
+ "src/opt/nwk/nwkFlow.c",
+ "src/opt/nwk/nwkMan.c",
+ "src/opt/nwk/nwkMap.c",
+ "src/opt/nwk/nwkMerge.c",
+ "src/opt/nwk/nwkObj.c",
+ "src/opt/nwk/nwkSpeedup.c",
+ "src/opt/nwk/nwkStrash.c",
+ "src/opt/nwk/nwkTiming.c",
+ "src/opt/nwk/nwkUtil.c",
+ "src/opt/rwt/rwtDec.c",
+ "src/opt/rwt/rwtMan.c",
+ "src/opt/rwt/rwtUtil.c",
+ "src/opt/cgt/cgtAig.c",
+ "src/opt/cgt/cgtCore.c",
+ "src/opt/cgt/cgtDecide.c",
+ "src/opt/cgt/cgtMan.c",
+ "src/opt/cgt/cgtSat.c",
+ "src/opt/csw/cswCore.c",
+ "src/opt/csw/cswCut.c",
+ "src/opt/csw/cswMan.c",
+ "src/opt/csw/cswTable.c",
+ "src/opt/dar/darBalance.c",
+ "src/opt/dar/darCore.c",
+ "src/opt/dar/darCut.c",
+ "src/opt/dar/darData.c",
+ "src/opt/dar/darLib.c",
+ "src/opt/dar/darMan.c",
+ "src/opt/dar/darPrec.c",
+ "src/opt/dar/darRefact.c",
+ "src/opt/dar/darScript.c",
+ "src/opt/dau/dauCanon.c",
+ "src/opt/dau/dauCore.c",
+ "src/opt/dau/dauCount.c",
+ "src/opt/dau/dauDivs.c",
+ "src/opt/dau/dauDsd.c",
+ "src/opt/dau/dauEnum.c",
+ "src/opt/dau/dauGia.c",
+ "src/opt/dau/dauMerge.c",
+ "src/opt/dau/dauNonDsd.c",
+ "src/opt/dau/dauNpn.c",
+ "src/opt/dau/dauNpn2.c",
+ "src/opt/dau/dauTree.c",
+ "src/opt/dsc/dsc.c",
+ "src/opt/sfm/sfmArea.c",
+ "src/opt/sfm/sfmCnf.c",
+ "src/opt/sfm/sfmCore.c",
+ "src/opt/sfm/sfmDec.c",
+ "src/opt/sfm/sfmLib.c",
+ "src/opt/sfm/sfmNtk.c",
+ "src/opt/sfm/sfmSat.c",
+ "src/opt/sfm/sfmTim.c",
+ "src/opt/sfm/sfmMit.c",
+ "src/opt/sfm/sfmWin.c",
+ "src/opt/sbd/sbd.c",
+ "src/opt/sbd/sbdCnf.c",
+ "src/opt/sbd/sbdCore.c",
+ "src/opt/sbd/sbdCut.c",
+ "src/opt/sbd/sbdCut2.c",
+ "src/opt/sbd/sbdLut.c",
+ "src/opt/sbd/sbdPath.c",
+ "src/opt/sbd/sbdSat.c",
+ "src/opt/sbd/sbdWin.c",
+ "src/sat/bsat/satMem.c",
+ "src/sat/bsat/satInter.c",
+ "src/sat/bsat/satInterA.c",
+ "src/sat/bsat/satInterB.c",
+ "src/sat/bsat/satInterP.c",
+ "src/sat/bsat/satProof.c",
+ "src/sat/bsat/satSolver.c",
+ "src/sat/bsat/satSolver2.c",
+ "src/sat/bsat/satSolver2i.c",
+ "src/sat/bsat/satSolver3.c",
+ "src/sat/bsat/satStore.c",
+ "src/sat/bsat/satTrace.c",
+ "src/sat/bsat/satTruth.c",
+ "src/sat/bsat/satUtil.c",
+ "src/sat/xsat/xsatSolver.c",
+ "src/sat/xsat/xsatSolverAPI.c",
+ "src/sat/xsat/xsatCnfReader.c",
+ "src/sat/satoko/solver.c",
+ "src/sat/satoko/solver_api.c",
+ "src/sat/satoko/cnf_reader.c",
+ "src/sat/csat/csat_apis.c",
+ "src/sat/msat/msatActivity.c",
+ "src/sat/msat/msatClause.c",
+ "src/sat/msat/msatClauseVec.c",
+ "src/sat/msat/msatMem.c",
+ "src/sat/msat/msatOrderH.c",
+ "src/sat/msat/msatQueue.c",
+ "src/sat/msat/msatRead.c",
+ "src/sat/msat/msatSolverApi.c",
+ "src/sat/msat/msatSolverCore.c",
+ "src/sat/msat/msatSolverIo.c",
+ "src/sat/msat/msatSolverSearch.c",
+ "src/sat/msat/msatSort.c",
+ "src/sat/msat/msatVec.c",
+ "src/sat/cnf/cnfCore.c",
+ "src/sat/cnf/cnfCut.c",
+ "src/sat/cnf/cnfData.c",
+ "src/sat/cnf/cnfFast.c",
+ "src/sat/cnf/cnfMan.c",
+ "src/sat/cnf/cnfMap.c",
+ "src/sat/cnf/cnfPost.c",
+ "src/sat/cnf/cnfUtil.c",
+ "src/sat/cnf/cnfWrite.c",
+ "src/sat/bmc/bmcBCore.c",
+ "src/sat/bmc/bmcBmc.c",
+ "src/sat/bmc/bmcBmc2.c",
+ "src/sat/bmc/bmcBmc3.c",
+ "src/sat/bmc/bmcBmcAnd.c",
+ "src/sat/bmc/bmcBmci.c",
+ "src/sat/bmc/bmcBmcG.c",
+ "src/sat/bmc/bmcBmcS.c",
+ "src/sat/bmc/bmcCexCare.c",
+ "src/sat/bmc/bmcCexCut.c",
+ "src/sat/bmc/bmcCexDepth.c",
+ "src/sat/bmc/bmcCexMin1.c",
+ "src/sat/bmc/bmcCexMin2.c",
+ "src/sat/bmc/bmcCexTools.c",
+ "src/sat/bmc/bmcChain.c",
+ "src/sat/bmc/bmcClp.c",
+ "src/sat/bmc/bmcEco.c",
+ "src/sat/bmc/bmcExpand.c",
+ "src/sat/bmc/bmcFault.c",
+ "src/sat/bmc/bmcFx.c",
+ "src/sat/bmc/bmcGen.c",
+ "src/sat/bmc/bmcICheck.c",
+ "src/sat/bmc/bmcInse.c",
+ "src/sat/bmc/bmcLoad.c",
+ "src/sat/bmc/bmcMaj.c",
+ "src/sat/bmc/bmcMaj2.c",
+ "src/sat/bmc/bmcMaj3.c",
+ "src/sat/bmc/bmcMaxi.c",
+ "src/sat/bmc/bmcMesh.c",
+ "src/sat/bmc/bmcMesh2.c",
+ "src/sat/bmc/bmcMulti.c",
+ "src/sat/bmc/bmcUnroll.c",
+ "src/sat/glucose/AbcGlucose.cpp",
+ "src/sat/glucose/AbcGlucoseCmd.cpp",
+ "src/sat/glucose/Glucose.cpp",
+ "src/sat/glucose/Options.cpp",
+ "src/sat/glucose/SimpSolver.cpp",
+ "src/sat/glucose/System.cpp",
+ "src/bool/bdc/bdcCore.c",
+ "src/bool/bdc/bdcDec.c",
+ "src/bool/bdc/bdcSpfd.c",
+ "src/bool/bdc/bdcTable.c",
+ "src/bool/dec/decAbc.c",
+ "src/bool/dec/decFactor.c",
+ "src/bool/dec/decMan.c",
+ "src/bool/dec/decPrint.c",
+ "src/bool/dec/decUtil.c",
+ "src/bool/kit/kitAig.c",
+ "src/bool/kit/kitBdd.c",
+ "src/bool/kit/kitCloud.c",
+ "src/bool/kit/cloud.c",
+ "src/bool/kit/kitDsd.c",
+ "src/bool/kit/kitFactor.c",
+ "src/bool/kit/kitGraph.c",
+ "src/bool/kit/kitHop.c",
+ "src/bool/kit/kitIsop.c",
+ "src/bool/kit/kitPla.c",
+ "src/bool/kit/kitSop.c",
+ "src/bool/kit/kitTruth.c",
+ "src/bool/lucky/lucky.c",
+ "src/bool/lucky/luckyFast16.c",
+ "src/bool/lucky/luckyFast6.c",
+ "src/bool/lucky/luckyRead.c",
+ "src/bool/lucky/luckySimple.c",
+ "src/bool/lucky/luckySwapIJ.c",
+ "src/bool/lucky/luckySwap.c",
+ "src/bool/rsb/rsbDec6.c",
+ "src/bool/rsb/rsbMan.c",
+ "src/bool/rpo/rpo.c",
+ "src/proof/pdr/pdrCnf.c",
+ "src/proof/pdr/pdrCore.c",
+ "src/proof/pdr/pdrIncr.c",
+ "src/proof/pdr/pdrInv.c",
+ "src/proof/pdr/pdrMan.c",
+ "src/proof/pdr/pdrSat.c",
+ "src/proof/pdr/pdrTsim.c",
+ "src/proof/pdr/pdrTsim2.c",
+ "src/proof/pdr/pdrTsim3.c",
+ "src/proof/pdr/pdrUtil.c",
+ "src/proof/abs/absDup.c",
+ "src/proof/abs/absGla.c",
+ "src/proof/abs/absGlaOld.c",
+ "src/proof/abs/absIter.c",
+ "src/proof/abs/absOldCex.c",
+ "src/proof/abs/absOldRef.c",
+ "src/proof/abs/absOldSat.c",
+ "src/proof/abs/absOldSim.c",
+ "src/proof/abs/absOut.c",
+ "src/proof/abs/absPth.c",
+ "src/proof/abs/absRef.c",
+ "src/proof/abs/absRefSelect.c",
+ "src/proof/abs/absRpm.c",
+ "src/proof/abs/absRpmOld.c",
+ "src/proof/abs/absVta.c",
+ "src/proof/abs/absUtil.c",
+ "src/proof/live/liveness.c",
+ "src/proof/live/liveness_sim.c",
+ "src/proof/live/ltl_parser.c",
+ "src/proof/live/kliveness.c",
+ "src/proof/live/monotone.c",
+ "src/proof/live/disjunctiveMonotone.c",
+ "src/proof/live/arenaViolation.c",
+ "src/proof/live/kLiveConstraints.c",
+ "src/proof/live/combination.c",
+ "src/proof/ssc/sscClass.c",
+ "src/proof/ssc/sscCore.c",
+ "src/proof/ssc/sscSat.c",
+ "src/proof/ssc/sscSim.c",
+ "src/proof/ssc/sscUtil.c",
+ "src/proof/int/intCheck.c",
+ "src/proof/int/intContain.c",
+ "src/proof/int/intCore.c",
+ "src/proof/int/intCtrex.c",
+ "src/proof/int/intDup.c",
+ "src/proof/int/intFrames.c",
+ "src/proof/int/intInter.c",
+ "src/proof/int/intM114.c",
+ "src/proof/int/intMan.c",
+ "src/proof/int/intUtil.c",
+ "src/proof/cec/cecCec.c",
+ "src/proof/cec/cecChoice.c",
+ "src/proof/cec/cecClass.c",
+ "src/proof/cec/cecCore.c",
+ "src/proof/cec/cecCorr.c",
+ "src/proof/cec/cecIso.c",
+ "src/proof/cec/cecMan.c",
+ "src/proof/cec/cecPat.c",
+ "src/proof/cec/cecSat.c",
+ "src/proof/cec/cecSatG.c",
+ "src/proof/cec/cecSeq.c",
+ "src/proof/cec/cecSolve.c",
+ "src/proof/cec/cecSplit.c",
+ "src/proof/cec/cecSynth.c",
+ "src/proof/cec/cecSweep.c",
+ "src/proof/acec/acecCl.c",
+ "src/proof/acec/acecCore.c",
+ "src/proof/acec/acecCo.c",
+ "src/proof/acec/acecBo.c",
+ "src/proof/acec/acecRe.c",
+ "src/proof/acec/acecPa.c",
+ "src/proof/acec/acecPo.c",
+ "src/proof/acec/acecPool.c",
+ "src/proof/acec/acecCover.c",
+ "src/proof/acec/acecFadds.c",
+ "src/proof/acec/acecMult.c",
+ "src/proof/acec/acecNorm.c",
+ "src/proof/acec/acecOrder.c",
+ "src/proof/acec/acecPolyn.c",
+ "src/proof/acec/acecSt.c",
+ "src/proof/acec/acecTree.c",
+ "src/proof/acec/acecUtil.c",
+ "src/proof/acec/acec2Mult.c",
+ "src/proof/acec/acecXor.c",
+ "src/proof/dch/dchAig.c",
+ "src/proof/dch/dchChoice.c",
+ "src/proof/dch/dchClass.c",
+ "src/proof/dch/dchCnf.c",
+ "src/proof/dch/dchCore.c",
+ "src/proof/dch/dchMan.c",
+ "src/proof/dch/dchSat.c",
+ "src/proof/dch/dchSim.c",
+ "src/proof/dch/dchSimSat.c",
+ "src/proof/dch/dchSweep.c",
+ "src/proof/fraig/fraigApi.c",
+ "src/proof/fraig/fraigCanon.c",
+ "src/proof/fraig/fraigFanout.c",
+ "src/proof/fraig/fraigFeed.c",
+ "src/proof/fraig/fraigMan.c",
+ "src/proof/fraig/fraigMem.c",
+ "src/proof/fraig/fraigNode.c",
+ "src/proof/fraig/fraigPrime.c",
+ "src/proof/fraig/fraigSat.c",
+ "src/proof/fraig/fraigTable.c",
+ "src/proof/fraig/fraigUtil.c",
+ "src/proof/fraig/fraigVec.c",
+ "src/proof/fra/fraBmc.c",
+ "src/proof/fra/fraCec.c",
+ "src/proof/fra/fraClass.c",
+ "src/proof/fra/fraClau.c",
+ "src/proof/fra/fraClaus.c",
+ "src/proof/fra/fraCnf.c",
+ "src/proof/fra/fraCore.c",
+ "src/proof/fra/fraHot.c",
+ "src/proof/fra/fraImp.c",
+ "src/proof/fra/fraInd.c",
+ "src/proof/fra/fraIndVer.c",
+ "src/proof/fra/fraLcr.c",
+ "src/proof/fra/fraMan.c",
+ "src/proof/fra/fraPart.c",
+ "src/proof/fra/fraSat.c",
+ "src/proof/fra/fraSec.c",
+ "src/proof/fra/fraSim.c",
+ "src/proof/ssw/sswAig.c",
+ "src/proof/ssw/sswBmc.c",
+ "src/proof/ssw/sswClass.c",
+ "src/proof/ssw/sswCnf.c",
+ "src/proof/ssw/sswConstr.c",
+ "src/proof/ssw/sswCore.c",
+ "src/proof/ssw/sswDyn.c",
+ "src/proof/ssw/sswFilter.c",
+ "src/proof/ssw/sswIslands.c",
+ "src/proof/ssw/sswLcorr.c",
+ "src/proof/ssw/sswMan.c",
+ "src/proof/ssw/sswPart.c",
+ "src/proof/ssw/sswPairs.c",
+ "src/proof/ssw/sswRarity.c",
+ "src/proof/ssw/sswSat.c",
+ "src/proof/ssw/sswSemi.c",
+ "src/proof/ssw/sswSim.c",
+ "src/proof/ssw/sswSimSat.c",
+ "src/proof/ssw/sswSweep.c",
+ "src/proof/ssw/sswUnique.c",
+ "src/aig/aig/aigCheck.c",
+ "src/aig/aig/aigCanon.c",
+ "src/aig/aig/aigCuts.c",
+ "src/aig/aig/aigDfs.c",
+ "src/aig/aig/aigDup.c",
+ "src/aig/aig/aigFanout.c",
+ "src/aig/aig/aigFrames.c",
+ "src/aig/aig/aigInter.c",
+ "src/aig/aig/aigJust.c",
+ "src/aig/aig/aigMan.c",
+ "src/aig/aig/aigMem.c",
+ "src/aig/aig/aigMffc.c",
+ "src/aig/aig/aigObj.c",
+ "src/aig/aig/aigOper.c",
+ "src/aig/aig/aigOrder.c",
+ "src/aig/aig/aigPack.c",
+ "src/aig/aig/aigPart.c",
+ "src/aig/aig/aigPartReg.c",
+ "src/aig/aig/aigPartSat.c",
+ "src/aig/aig/aigRepr.c",
+ "src/aig/aig/aigRet.c",
+ "src/aig/aig/aigRetF.c",
+ "src/aig/aig/aigScl.c",
+ "src/aig/aig/aigShow.c",
+ "src/aig/aig/aigSplit.c",
+ "src/aig/aig/aigTable.c",
+ "src/aig/aig/aigTiming.c",
+ "src/aig/aig/aigTruth.c",
+ "src/aig/aig/aigTsim.c",
+ "src/aig/aig/aigUtil.c",
+ "src/aig/aig/aigWin.c",
+ "src/aig/saig/saigCone.c",
+ "src/aig/saig/saigConstr.c",
+ "src/aig/saig/saigConstr2.c",
+ "src/aig/saig/saigDual.c",
+ "src/aig/saig/saigDup.c",
+ "src/aig/saig/saigInd.c",
+ "src/aig/saig/saigIoa.c",
+ "src/aig/saig/saigIso.c",
+ "src/aig/saig/saigIsoFast.c",
+ "src/aig/saig/saigIsoSlow.c",
+ "src/aig/saig/saigMiter.c",
+ "src/aig/saig/saigOutDec.c",
+ "src/aig/saig/saigPhase.c",
+ "src/aig/saig/saigRetFwd.c",
+ "src/aig/saig/saigRetMin.c",
+ "src/aig/saig/saigRetStep.c",
+ "src/aig/saig/saigScl.c",
+ "src/aig/saig/saigSimFast.c",
+ "src/aig/saig/saigSimMv.c",
+ "src/aig/saig/saigSimSeq.c",
+ "src/aig/saig/saigStrSim.c",
+ "src/aig/saig/saigSwitch.c",
+ "src/aig/saig/saigSynch.c",
+ "src/aig/saig/saigTempor.c",
+ "src/aig/saig/saigTrans.c",
+ "src/aig/saig/saigWnd.c",
+ "src/aig/gia/giaAig.c",
+ "src/aig/gia/giaAgi.c",
+ "src/aig/gia/giaAiger.c",
+ "src/aig/gia/giaAigerExt.c",
+ "src/aig/gia/giaBalAig.c",
+ "src/aig/gia/giaBalLut.c",
+ "src/aig/gia/giaBalMap.c",
+ "src/aig/gia/giaBidec.c",
+ "src/aig/gia/giaCCof.c",
+ "src/aig/gia/giaCex.c",
+ "src/aig/gia/giaClp.c",
+ "src/aig/gia/giaCof.c",
+ "src/aig/gia/giaCone.c",
+ "src/aig/gia/giaCSatOld.c",
+ "src/aig/gia/giaCSat.c",
+ "src/aig/gia/giaCSat2.c",
+ "src/aig/gia/giaCTas.c",
+ "src/aig/gia/giaCut.c",
+ "src/aig/gia/giaDeep.c",
+ "src/aig/gia/giaDfs.c",
+ "src/aig/gia/giaDup.c",
+ "src/aig/gia/giaEdge.c",
+ "src/aig/gia/giaEmbed.c",
+ "src/aig/gia/giaEnable.c",
+ "src/aig/gia/giaEquiv.c",
+ "src/aig/gia/giaEra.c",
+ "src/aig/gia/giaEra2.c",
+ "src/aig/gia/giaEsop.c",
+ "src/aig/gia/giaExist.c",
+ "src/aig/gia/giaFalse.c",
+ "src/aig/gia/giaFanout.c",
+ "src/aig/gia/giaForce.c",
+ "src/aig/gia/giaFrames.c",
+ "src/aig/gia/giaFront.c",
+ "src/aig/gia/giaFx.c",
+ "src/aig/gia/giaGen.c",
+ "src/aig/gia/giaGig.c",
+ "src/aig/gia/giaGlitch.c",
+ "src/aig/gia/giaHash.c",
+ "src/aig/gia/giaIf.c",
+ "src/aig/gia/giaIff.c",
+ "src/aig/gia/giaIiff.c",
+ "src/aig/gia/giaIso.c",
+ "src/aig/gia/giaIso2.c",
+ "src/aig/gia/giaIso3.c",
+ "src/aig/gia/giaJf.c",
+ "src/aig/gia/giaKf.c",
+ "src/aig/gia/giaLf.c",
+ "src/aig/gia/giaMf.c",
+ "src/aig/gia/giaMan.c",
+ "src/aig/gia/giaMem.c",
+ "src/aig/gia/giaMfs.c",
+ "src/aig/gia/giaMini.c",
+ "src/aig/gia/giaMuxes.c",
+ "src/aig/gia/giaNf.c",
+ "src/aig/gia/giaOf.c",
+ "src/aig/gia/giaPack.c",
+ "src/aig/gia/giaPat.c",
+ "src/aig/gia/giaPf.c",
+ "src/aig/gia/giaQbf.c",
+ "src/aig/gia/giaResub.c",
+ "src/aig/gia/giaRetime.c",
+ "src/aig/gia/giaRex.c",
+ "src/aig/gia/giaSatEdge.c",
+ "src/aig/gia/giaSatLE.c",
+ "src/aig/gia/giaSatLut.c",
+ "src/aig/gia/giaSatMap.c",
+ "src/aig/gia/giaSatoko.c",
+ "src/aig/gia/giaSat3.c",
+ "src/aig/gia/giaScl.c",
+ "src/aig/gia/giaScript.c",
+ "src/aig/gia/giaShow.c",
+ "src/aig/gia/giaShrink.c",
+ "src/aig/gia/giaShrink6.c",
+ "src/aig/gia/giaShrink7.c",
+ "src/aig/gia/giaSim.c",
+ "src/aig/gia/giaSim2.c",
+ "src/aig/gia/giaSim4.c",
+ "src/aig/gia/giaSim5.c",
+ "src/aig/gia/giaSimBase.c",
+ "src/aig/gia/giaSort.c",
+ "src/aig/gia/giaSpeedup.c",
+ "src/aig/gia/giaSplit.c",
+ "src/aig/gia/giaStg.c",
+ "src/aig/gia/giaStr.c",
+ "src/aig/gia/giaSupMin.c",
+ "src/aig/gia/giaSupp.c",
+ "src/aig/gia/giaSweep.c",
+ "src/aig/gia/giaSweeper.c",
+ "src/aig/gia/giaSwitch.c",
+ "src/aig/gia/giaTim.c",
+ "src/aig/gia/giaTis.c",
+ "src/aig/gia/giaTruth.c",
+ "src/aig/gia/giaTsim.c",
+ "src/aig/gia/giaUnate.c",
+ "src/aig/gia/giaUtil.c",
+ "src/aig/ioa/ioaReadAig.c",
+ "src/aig/ioa/ioaWriteAig.c",
+ "src/aig/ioa/ioaUtil.c",
+ "src/aig/ivy/ivyBalance.c",
+ "src/aig/ivy/ivyCanon.c",
+ "src/aig/ivy/ivyCheck.c",
+ "src/aig/ivy/ivyCut.c",
+ "src/aig/ivy/ivyCutTrav.c",
+ "src/aig/ivy/ivyDfs.c",
+ "src/aig/ivy/ivyDsd.c",
+ "src/aig/ivy/ivyFanout.c",
+ "src/aig/ivy/ivyFastMap.c",
+ "src/aig/ivy/ivyFraig.c",
+ "src/aig/ivy/ivyHaig.c",
+ "src/aig/ivy/ivyMan.c",
+ "src/aig/ivy/ivyMem.c",
+ "src/aig/ivy/ivyMulti.c",
+ "src/aig/ivy/ivyObj.c",
+ "src/aig/ivy/ivyOper.c",
+ "src/aig/ivy/ivyResyn.c",
+ "src/aig/ivy/ivyRwr.c",
+ "src/aig/ivy/ivySeq.c",
+ "src/aig/ivy/ivyShow.c",
+ "src/aig/ivy/ivyTable.c",
+ "src/aig/ivy/ivyUtil.c",
+ "src/aig/hop/hopBalance.c",
+ "src/aig/hop/hopCheck.c",
+ "src/aig/hop/hopDfs.c",
+ "src/aig/hop/hopMan.c",
+ "src/aig/hop/hopMem.c",
+ "src/aig/hop/hopObj.c",
+ "src/aig/hop/hopOper.c",
+ "src/aig/hop/hopTable.c",
+ "src/aig/hop/hopTruth.c",
+ "src/aig/hop/hopUtil.c",
+ "src/bdd/cudd/cuddAPI.c",
+ "src/bdd/cudd/cuddAddAbs.c",
+ "src/bdd/cudd/cuddAddApply.c",
+ "src/bdd/cudd/cuddAddFind.c",
+ "src/bdd/cudd/cuddAddInv.c",
+ "src/bdd/cudd/cuddAddIte.c",
+ "src/bdd/cudd/cuddAddNeg.c",
+ "src/bdd/cudd/cuddAddWalsh.c",
+ "src/bdd/cudd/cuddAndAbs.c",
+ "src/bdd/cudd/cuddAnneal.c",
+ "src/bdd/cudd/cuddApa.c",
+ "src/bdd/cudd/cuddApprox.c",
+ "src/bdd/cudd/cuddBddAbs.c",
+ "src/bdd/cudd/cuddBddCorr.c",
+ "src/bdd/cudd/cuddBddIte.c",
+ "src/bdd/cudd/cuddBridge.c",
+ "src/bdd/cudd/cuddCache.c",
+ "src/bdd/cudd/cuddCheck.c",
+ "src/bdd/cudd/cuddClip.c",
+ "src/bdd/cudd/cuddCof.c",
+ "src/bdd/cudd/cuddCompose.c",
+ "src/bdd/cudd/cuddDecomp.c",
+ "src/bdd/cudd/cuddEssent.c",
+ "src/bdd/cudd/cuddExact.c",
+ "src/bdd/cudd/cuddExport.c",
+ "src/bdd/cudd/cuddGenCof.c",
+ "src/bdd/cudd/cuddGenetic.c",
+ "src/bdd/cudd/cuddGroup.c",
+ "src/bdd/cudd/cuddHarwell.c",
+ "src/bdd/cudd/cuddInit.c",
+ "src/bdd/cudd/cuddInteract.c",
+ "src/bdd/cudd/cuddLCache.c",
+ "src/bdd/cudd/cuddLevelQ.c",
+ "src/bdd/cudd/cuddLinear.c",
+ "src/bdd/cudd/cuddLiteral.c",
+ "src/bdd/cudd/cuddMatMult.c",
+ "src/bdd/cudd/cuddPriority.c",
+ "src/bdd/cudd/cuddRead.c",
+ "src/bdd/cudd/cuddRef.c",
+ "src/bdd/cudd/cuddReorder.c",
+ "src/bdd/cudd/cuddSat.c",
+ "src/bdd/cudd/cuddSign.c",
+ "src/bdd/cudd/cuddSolve.c",
+ "src/bdd/cudd/cuddSplit.c",
+ "src/bdd/cudd/cuddSubsetHB.c",
+ "src/bdd/cudd/cuddSubsetSP.c",
+ "src/bdd/cudd/cuddSymmetry.c",
+ "src/bdd/cudd/cuddTable.c",
+ "src/bdd/cudd/cuddUtil.c",
+ "src/bdd/cudd/cuddWindow.c",
+ "src/bdd/cudd/cuddZddCount.c",
+ "src/bdd/cudd/cuddZddFuncs.c",
+ "src/bdd/cudd/cuddZddGroup.c",
+ "src/bdd/cudd/cuddZddIsop.c",
+ "src/bdd/cudd/cuddZddLin.c",
+ "src/bdd/cudd/cuddZddMisc.c",
+ "src/bdd/cudd/cuddZddPort.c",
+ "src/bdd/cudd/cuddZddReord.c",
+ "src/bdd/cudd/cuddZddSetop.c",
+ "src/bdd/cudd/cuddZddSymm.c",
+ "src/bdd/cudd/cuddZddUtil.c",
+ "src/bdd/extrab/extraBddAuto.c",
+ "src/bdd/extrab/extraBddCas.c",
+ "src/bdd/extrab/extraBddImage.c",
+ "src/bdd/extrab/extraBddKmap.c",
+ "src/bdd/extrab/extraBddMaxMin.c",
+ "src/bdd/extrab/extraBddMisc.c",
+ "src/bdd/extrab/extraBddSet.c",
+ "src/bdd/extrab/extraBddSymm.c",
+ "src/bdd/extrab/extraBddThresh.c",
+ "src/bdd/extrab/extraBddTime.c",
+ "src/bdd/extrab/extraBddUnate.c",
+ "src/bdd/dsd/dsdApi.c",
+ "src/bdd/dsd/dsdCheck.c",
+ "src/bdd/dsd/dsdLocal.c",
+ "src/bdd/dsd/dsdMan.c",
+ "src/bdd/dsd/dsdProc.c",
+ "src/bdd/dsd/dsdTree.c",
+ "src/bdd/epd/epd.c",
+ "src/bdd/mtr/mtrBasic.c",
+ "src/bdd/mtr/mtrGroup.c",
+ "src/bdd/reo/reoApi.c",
+ "src/bdd/reo/reoCore.c",
+ "src/bdd/reo/reoProfile.c",
+ "src/bdd/reo/reoShuffle.c",
+ "src/bdd/reo/reoSift.c",
+ "src/bdd/reo/reoSwap.c",
+ "src/bdd/reo/reoTransfer.c",
+ "src/bdd/reo/reoUnits.c",
+ "src/bdd/cas/casCore.c",
+ "src/bdd/cas/casDec.c",
+ "src/bdd/bbr/bbrCex.c",
+ "src/bdd/bbr/bbrImage.c",
+ "src/bdd/bbr/bbrNtbdd.c",
+ "src/bdd/bbr/bbrReach.c",
+ "src/bdd/llb/llb1Cluster.c",
+ "src/bdd/llb/llb1Constr.c",
+ "src/bdd/llb/llb1Core.c",
+ "src/bdd/llb/llb1Group.c",
+ "src/bdd/llb/llb1Hint.c",
+ "src/bdd/llb/llb1Man.c",
+ "src/bdd/llb/llb1Matrix.c",
+ "src/bdd/llb/llb1Pivot.c",
+ "src/bdd/llb/llb1Reach.c",
+ "src/bdd/llb/llb1Sched.c",
+ "src/bdd/llb/llb2Bad.c",
+ "src/bdd/llb/llb2Core.c",
+ "src/bdd/llb/llb2Driver.c",
+ "src/bdd/llb/llb2Dump.c",
+ "src/bdd/llb/llb2Flow.c",
+ "src/bdd/llb/llb2Image.c",
+ "src/bdd/llb/llb3Image.c",
+ "src/bdd/llb/llb3Nonlin.c",
+ "src/bdd/llb/llb4Cex.c",
+ "src/bdd/llb/llb4Image.c",
+ "src/bdd/llb/llb4Nonlin.c",
+ "src/bdd/llb/llb4Sweep.c",
+
+ ],
+ hdrs = [
+ "src/misc/util/abc_global.h",
+ ],
+ copts = [
+ "-O2",
+ "-Wno-format-overflow",
+ "-Wno-nonnull",
+ "-Wno-sign-compare",
+ "-Wno-strict-aliasing",
+ "-Wno-unused-but-set-variable",
+ "-Wno-unused-function",
+ "-Wno-unused-variable",
+ "-Wno-write-strings",
+ "-Wno-sometimes-uninitialized", # This is possibly concerning.
+ "-Wno-unknown-warning-option", # Clang and GCC warn differently.
+ ],
+ defines = [
+ "LIN64",
+ "SIZEOF_VOID_P=8",
+ "SIZEOF_LONG=8",
+ "SIZEOF_INT=4",
+ "ABC_USE_CUDD=1",
+ "ABC_USE_PTHREADS",
+ "ABC_USE_READLINE",
+ "_DEFAULT_SOURCE",
+ ],
+ includes = ["src/"],
+ linkopts = ["-ldl", "-lpthread"],
+ linkstatic = True,
+ textual_hdrs = glob(
+ [
+ "src/base/abci/abciUnfold2.c",
+ "src/base/abci/abcDarUnfold2.c",
+ "src/aig/saig/saigUnfold2.c",
+ ],
+ ),
+ deps = [
+ "@dk_thrysoee_libedit//:pretend_to_be_gnu_readline_system",
+ ],
+)
diff --git a/dependency_support/edu_berkeley_abc/workspace.bzl b/dependency_support/edu_berkeley_abc/workspace.bzl
new file mode 100644
index 0000000000..0f169ece13
--- /dev/null
+++ b/dependency_support/edu_berkeley_abc/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the ABC system for sequential synthesis and verification, used by yosys."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "edu_berkeley_abc",
+ urls = [
+ "https://github.com/berkeley-abc/abc/archive/a918e2dab1f951eb7e869f07b57f648b9a583561.zip",
+ ],
+ strip_prefix = "abc-a918e2dab1f951eb7e869f07b57f648b9a583561",
+ sha256 = "e2cb19f5c6a41cd059d749beb066afdc7759a2c6da822a975a73cfcd014ea3e6",
+ build_file = Label("//dependency_support:edu_berkeley_abc/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/flex/BUILD b/dependency_support/flex/BUILD
new file mode 100644
index 0000000000..a8547aa717
--- /dev/null
+++ b/dependency_support/flex/BUILD
@@ -0,0 +1,19 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["notice"]) # BSD
+
+exports_files([
+ "wc_test.sh",
+])
diff --git a/dependency_support/flex/bundled.BUILD.bazel b/dependency_support/flex/bundled.BUILD.bazel
new file mode 100644
index 0000000000..ccdd528636
--- /dev/null
+++ b/dependency_support/flex/bundled.BUILD.bazel
@@ -0,0 +1,159 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# !!! DO NOT DEPEND ON THIS PACKAGE DIRECTLY !!!
+# This package exists only to support the genlex rule, and all users should use
+# that if possible rather than using the binary directly through a genrule.
+
+package(default_visibility = ["//visibility:private"])
+
+load("@com_google_xls//dependency_support:copy.bzl", "copy")
+load("@com_google_xls//dependency_support/flex:flex.bzl", "genlex")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+licenses(["notice"]) # BSD
+
+exports_files(["LICENSE"])
+
+VERSION = "2.6.4"
+
+# Generate the skel.c file. The generated file is included in the Flex
+# distribution, but we have local patches that require regeneration. This
+# follows the command at line 94 of src/Makefile.am.
+genrule(
+ name = "skel_c",
+ srcs = [
+ "src/flex.skl",
+ "src/mkskel.sh",
+ "src/flexint.h",
+ "src/tables_shared.h",
+ "src/tables_shared.c",
+ ],
+ outs = ["src/skel.c"],
+ cmd = ("$(location src/mkskel.sh) `dirname $(location src/flex.skl)` " +
+ "$(location @org_gnu_m4//:m4) " + VERSION + " > $@"),
+ tools = [
+ "@org_gnu_m4//:m4",
+ ],
+)
+
+# Generate the stage1scan.c file. This follows the non-ENABLE_BOOTSTRAP command
+# at line 102 of src/Makefile.am.
+genrule(
+ name = "stage1scan",
+ srcs = ["src/scan.c"],
+ outs = ["src/stage1scan.c"],
+ cmd = """sed 's|^\\(#line .*\\)"'$$(basename $< | sed 's|[][\\\\.*]|\\\\&|g')'"|\\1"$@"|g' $< > $@""",
+)
+
+# These need to be a separate rule, as cc_binary does not support textual_hdrs,
+# and many of these headers are not standalone.
+cc_library(
+ name = "flex_internal_headers",
+ textual_hdrs = [
+ "src/config.h",
+ "src/flexdef.h",
+ "src/flexint.h",
+ "src/gettext.h",
+ "src/options.h",
+ "src/parse.h",
+ "src/scanopt.h",
+ "src/tables.h",
+ "src/tables_shared.h",
+ "src/version.h",
+ ],
+)
+
+# Allows users to '#include ' correctly in their own code.
+cc_library(
+ name = "FlexLexer",
+ hdrs = ["src/FlexLexer.h"],
+ includes = ["src"],
+ visibility = ["//visibility:public"],
+)
+
+exports_files(
+ ["src/FlexLexer.h"],
+ visibility = ["//dependency_support/flex/v2_5_35:__pkg__"],
+)
+
+# The "flex" binary. This should only be used through genlex rules, not with
+# genrules.
+cc_binary(
+ name = "flex",
+ srcs = [
+ "src/buf.c",
+ "src/ccl.c",
+ "src/dfa.c",
+ "src/ecs.c",
+ "src/filter.c",
+ "src/gen.c",
+ "src/main.c",
+ "src/misc.c",
+ "src/nfa.c",
+ "src/options.c",
+ "src/parse.c",
+ "src/regex.c",
+ "src/scanflags.c",
+ "src/scanopt.c",
+ "src/skel.c",
+ "src/stage1scan.c",
+ "src/sym.c",
+ "src/tables.c",
+ "src/tables_shared.c",
+ "src/tblcmp.c",
+ "src/yylex.c",
+ ],
+ includes = ["src"],
+ copts = [
+ "-DHAVE_CONFIG_H",
+ "-DLOCALEDIR='\"" + "this_LOCALEDIR_does_not_exist" + "\"'",
+ "-Wno-format-truncation",
+ "-Wno-misleading-indentation",
+ "-Wno-pointer-sign",
+ "-Wno-stringop-truncation",
+ ],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":flex_internal_headers",
+ ],
+)
+
+pseudo_configure(
+ name = "config_h",
+ src = "src/config.h.in",
+ out = "src/config.h",
+ defs = ['ENABLE_NLS', 'HAVE_ALLOCA', 'HAVE_ALLOCA_H', 'HAVE_DCGETTEXT', 'HAVE_DLFCN_H', 'HAVE_DUP2', 'HAVE_FORK', 'HAVE_GETTEXT', 'HAVE_INTTYPES_H', 'HAVE_LIBINTL_H', 'HAVE_LIBM', 'HAVE_LIMITS_H', 'HAVE_LOCALE_H', 'HAVE_MALLOC', 'HAVE_MALLOC_H', 'HAVE_MEMORY_H', 'HAVE_MEMSET', 'HAVE_NETINET_IN_H', 'HAVE_POW', 'HAVE_PTHREAD_H', 'HAVE_REALLOC', 'HAVE_REGCOMP', 'HAVE_REGEX_H', 'HAVE_SETLOCALE', 'HAVE_STDBOOL_H', 'HAVE_STDINT_H', 'HAVE_STDLIB_H', 'HAVE_STRCASECMP', 'HAVE_STRCHR', 'HAVE_STRDUP', 'HAVE_STRINGS_H', 'HAVE_STRING_H', 'HAVE_STRTOL', 'HAVE_SYS_STAT_H', 'HAVE_SYS_TYPES_H', 'HAVE_SYS_WAIT_H', 'HAVE_UNISTD_H', 'HAVE_VFORK', 'HAVE_WORKING_FORK', 'HAVE_WORKING_VFORK', 'HAVE__BOOL', 'STDC_HEADERS'],
+ mappings = {'LT_OBJDIR': '".libs"', 'M4': '"M4_environment_variable_must_be_set"', 'PACKAGE': '"flex"', 'PACKAGE_BUGREPORT': '"NA"', 'PACKAGE_NAME': '"the fast lexical analyser generator"', 'PACKAGE_STRING': '"the fast lexical analyser generator 2.6.4"', 'PACKAGE_TARNAME': '"flex"', 'PACKAGE_URL': '""', 'PACKAGE_VERSION': '"2.6.4"', 'VERSION': '"2.6.4"'},
+)
+
+genlex(
+ name = "wc_l",
+ src = "examples/fastwc/wc4.l",
+ out = "wc.c",
+)
+
+cc_binary(
+ name = "wc",
+ srcs = ["wc.c"],
+)
+
+sh_test(
+ name = "wc_test",
+ srcs = ["@com_google_xls//dependency_support/flex:wc_test.sh"],
+ args = ["$(location :wc)"],
+ data = [
+ ":wc",
+ ],
+)
diff --git a/dependency_support/flex/flex.bzl b/dependency_support/flex/flex.bzl
new file mode 100644
index 0000000000..311cdb9955
--- /dev/null
+++ b/dependency_support/flex/flex.bzl
@@ -0,0 +1,135 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Build rule for generating C or C++ sources with Flex.
+
+IMPORTANT: we _strongly recommend_ that you include a unique and project-
+specific `%option prefix="myproject"` directive in your scanner spec to avoid
+very hard-to-debug symbol name conflict problems if two scanners are linked
+into the same dynamically-linked executable. Consider using ANTLR for new
+projects.
+
+By default, flex includes the definition of a static function `yyunput` in its
+output. If you never use the lex `unput` function in your lex rules, however,
+`yyunput` will never be called. This causes problems building the output file,
+as llvm issues warnings about static functions that are never called. To avoid
+this problem, use `%option nounput` in the declarations section if your lex
+rules never use `unput`.
+
+Note that if you use the c++ mode of flex, you will need to include the
+boilerplate header `FlexLexer.h` file in any `cc_library` which includes the
+generated flex scanner directly. This is typically done by
+`#include ` with a declared BUILD dependency on
+`@flex//:FlexLexer`.
+
+Flex invokes m4 behind the scenes to generate the output scanner. As such,
+all genlex rules have an implicit dependency on `@org_gnu_m4//:m4`. Note
+also that certain M4 control sequences (notably exactly the strings `"[["` and
+`"]]"`) are not correctly handled by flex as a result.
+
+Examples
+--------
+
+This is a simple example.
+```
+genlex(
+ name = "html_lex_lex",
+ src = "html.lex",
+ out = "html_lexer.c",
+)
+```
+
+This example uses a `.tab.hh` file.
+```
+genlex(
+ name = "rules_l",
+ src = "rules.lex",
+ includes = [
+ "rules.tab.hh",
+ ],
+ out = "rules.yy.cc",
+)
+```
+"""
+
+def _genlex_impl(ctx):
+ """Implementation for genlex rule."""
+
+ # Compute the prefix, if not specified.
+ if ctx.attr.prefix:
+ prefix = ctx.attr.prefix
+ else:
+ prefix = ctx.file.src.basename.partition(".")[0]
+
+ # Construct the arguments.
+ args = ctx.actions.args()
+ args.add("-o", ctx.outputs.out)
+ outputs = [ctx.outputs.out]
+ if ctx.outputs.header_out:
+ args.add("--header-file=%s" % ctx.outputs.header_out.path)
+ outputs.append(ctx.outputs.header_out)
+ args.add("-P", prefix)
+ args.add_all(ctx.attr.lexopts)
+ args.add(ctx.file.src)
+
+ ctx.actions.run(
+ executable = ctx.executable._flex,
+ env = {
+ "M4": ctx.executable._m4.path,
+ },
+ arguments = [args],
+ inputs = ctx.files.src + ctx.files.includes,
+ tools = [ctx.executable._m4],
+ outputs = outputs,
+ mnemonic = "Flex",
+ progress_message = "Generating %s from %s" % (
+ ctx.outputs.out.short_path,
+ ctx.file.src.short_path,
+ ),
+ )
+
+genlex = rule(
+ implementation = _genlex_impl,
+ doc = "Generate C/C++-language sources from a lex file using Flex.",
+ attrs = {
+ "src": attr.label(
+ mandatory = True,
+ allow_single_file = [".l", ".ll", ".lex", ".lpp"],
+ doc = "The .lex source file for this rule",
+ ),
+ "includes": attr.label_list(
+ allow_files = True,
+ doc = "A list of headers that are included by the .lex file",
+ ),
+ "out": attr.output(mandatory = True, doc = "The generated source file"),
+ "header_out": attr.output(mandatory = False, doc = "The generated header file"),
+ "prefix": attr.string(
+ doc = "External symbol prefix for Flex. This string is " +
+ "passed to flex as the -P option, causing the resulting C " +
+ "file to define external functions named 'prefix'text, " +
+ "'prefix'in, etc. The default is the basename of the source" +
+ "file without the .lex extension.",
+ ),
+ "lexopts": attr.string_list(
+ doc = "A list of options to be added to the flex command line.",
+ ),
+ "_flex": attr.label(
+ default = "@flex//:flex",
+ executable = True,
+ cfg = "host",
+ ),
+ "_m4": attr.label(default = "@org_gnu_m4//:m4", executable = True, cfg = "host"),
+ },
+ output_to_genfiles = True,
+)
diff --git a/dependency_support/flex/wc_test.sh b/dependency_support/flex/wc_test.sh
new file mode 100755
index 0000000000..c321b6eb2b
--- /dev/null
+++ b/dependency_support/flex/wc_test.sh
@@ -0,0 +1,23 @@
+#!/bin/bash
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+RESULT=$(echo "ab cde f" | $1)
+
+if [ "$RESULT" == " 1 3 9" ]; then
+ echo "Success"
+else
+ >&2 echo "Encountered unexpected result $RESULT"
+ exit 1
+fi
diff --git a/dependency_support/flex/workspace.bzl b/dependency_support/flex/workspace.bzl
new file mode 100644
index 0000000000..c5f58b397d
--- /dev/null
+++ b/dependency_support/flex/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the Flex lexer generator, used by iverilog."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "flex",
+ urls = [
+ "https://github.com/westes/flex/files/981163/flex-2.6.4.tar.gz",
+ ],
+ strip_prefix = "flex-2.6.4",
+ sha256 = "e87aae032bf07c26f85ac0ed3250998c37621d95f8bd748b31f15b33c45ee995",
+ build_file = Label("//dependency_support:flex/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/initialize_external.bzl b/dependency_support/initialize_external.bzl
new file mode 100644
index 0000000000..4cdae79ec5
--- /dev/null
+++ b/dependency_support/initialize_external.bzl
@@ -0,0 +1,25 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Provides helper that initializes external repositories with third-party code."""
+
+load("@bazel_skylib//:workspace.bzl", "bazel_skylib_workspace")
+load("@com_google_protobuf//:protobuf_deps.bzl", "protobuf_deps")
+load("@pybind11_bazel//:python_configure.bzl", "python_configure")
+
+def initialize_external_repositories():
+ """Calls set-up methods for external repositories that require that."""
+ bazel_skylib_workspace()
+ protobuf_deps()
+ python_configure(name = "local_config_python")
diff --git a/dependency_support/llvm/BUILD b/dependency_support/llvm/BUILD
new file mode 100644
index 0000000000..dc4ef66fb3
--- /dev/null
+++ b/dependency_support/llvm/BUILD
@@ -0,0 +1,25 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+package(
+ licenses = ["notice"], # Apache 2.0
+)
+
+py_binary(
+ name = "expand_cmake_vars",
+ srcs = ["expand_cmake_vars.py"],
+ python_version = "PY3",
+ srcs_version = "PY3",
+ visibility = ["@llvm//:__subpackages__"],
+)
diff --git a/dependency_support/llvm/bundled.BUILD.bazel b/dependency_support/llvm/bundled.BUILD.bazel
new file mode 100644
index 0000000000..83719a0779
--- /dev/null
+++ b/dependency_support/llvm/bundled.BUILD.bazel
@@ -0,0 +1,4592 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Bazel BUILD file for LLVM.
+#
+# This BUILD file is auto-generated; do not edit!
+
+licenses(["notice"])
+
+exports_files(["LICENSE.TXT"])
+
+load(
+ "@com_google_xls//dependency_support/llvm:llvm.bzl",
+ "cmake_var_string",
+ "expand_cmake_vars",
+ "gentbl",
+ "llvm_all_cmake_vars",
+ "llvm_copts",
+ "llvm_defines",
+ "llvm_linkopts",
+ "llvm_support_platform_specific_srcs_glob",
+)
+load(
+ "@com_google_xls//dependency_support/llvm:common.bzl",
+ "template_rule",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+llvm_host_triple = "x86_64-unknown-linux_gnu"
+
+llvm_targets = [
+ "AArch64",
+ "AMDGPU",
+ "ARM",
+ "NVPTX",
+ "PowerPC",
+ "X86",
+]
+
+llvm_target_asm_parsers = llvm_targets
+
+llvm_target_asm_printers = llvm_targets
+
+llvm_target_disassemblers = llvm_targets
+
+# Performs CMake variable substitutions on configuration header files.
+expand_cmake_vars(
+ name = "config_gen",
+ src = "include/llvm/Config/config.h.cmake",
+ cmake_vars = llvm_all_cmake_vars,
+ dst = "include/llvm/Config/config.h",
+)
+
+expand_cmake_vars(
+ name = "llvm_config_gen",
+ src = "include/llvm/Config/llvm-config.h.cmake",
+ cmake_vars = llvm_all_cmake_vars,
+ dst = "include/llvm/Config/llvm-config.h",
+)
+
+expand_cmake_vars(
+ name = "abi_breaking_gen",
+ src = "include/llvm/Config/abi-breaking.h.cmake",
+ cmake_vars = llvm_all_cmake_vars,
+ dst = "include/llvm/Config/abi-breaking.h",
+)
+
+# Performs macro expansions on .def.in files
+template_rule(
+ name = "targets_def_gen",
+ src = "include/llvm/Config/Targets.def.in",
+ out = "include/llvm/Config/Targets.def",
+ substitutions = {
+ "@LLVM_ENUM_TARGETS@": "\n".join(
+ ["LLVM_TARGET({})".format(t) for t in llvm_targets],
+ ),
+ },
+)
+
+template_rule(
+ name = "asm_parsers_def_gen",
+ src = "include/llvm/Config/AsmParsers.def.in",
+ out = "include/llvm/Config/AsmParsers.def",
+ substitutions = {
+ "@LLVM_ENUM_ASM_PARSERS@": "\n".join(
+ ["LLVM_ASM_PARSER({})".format(t) for t in llvm_target_asm_parsers],
+ ),
+ },
+)
+
+template_rule(
+ name = "asm_printers_def_gen",
+ src = "include/llvm/Config/AsmPrinters.def.in",
+ out = "include/llvm/Config/AsmPrinters.def",
+ substitutions = {
+ "@LLVM_ENUM_ASM_PRINTERS@": "\n".join(
+ ["LLVM_ASM_PRINTER({})".format(t) for t in llvm_target_asm_printers],
+ ),
+ },
+)
+
+template_rule(
+ name = "disassemblers_def_gen",
+ src = "include/llvm/Config/Disassemblers.def.in",
+ out = "include/llvm/Config/Disassemblers.def",
+ substitutions = {
+ "@LLVM_ENUM_DISASSEMBLERS@": "\n".join(
+ ["LLVM_DISASSEMBLER({})".format(t) for t in llvm_target_disassemblers],
+ ),
+ },
+)
+
+# A common library that all LLVM targets depend on.
+# TODO(b/113996071): We need to glob all potentially #included files and stage
+# them here because LLVM's build files are not strict headers clean, and remote
+# build execution requires all inputs to be depended upon.
+cc_library(
+ name = "config",
+ hdrs = glob([
+ "**/*.h",
+ "**/*.def",
+ "**/*.inc.cpp",
+ ]) + [
+ "include/llvm/Config/AsmParsers.def",
+ "include/llvm/Config/AsmPrinters.def",
+ "include/llvm/Config/Disassemblers.def",
+ "include/llvm/Config/Targets.def",
+ "include/llvm/Config/config.h",
+ "include/llvm/Config/llvm-config.h",
+ "include/llvm/Config/abi-breaking.h",
+ ],
+ defines = llvm_defines,
+ includes = ["include"],
+)
+
+# A creator of an empty file include/llvm/Support/VCSRevision.h.
+# This is usually populated by the upstream build infrastructure, but in this
+# case we leave it blank. See upstream revision r300160.
+genrule(
+ name = "vcs_revision_gen",
+ srcs = [],
+ outs = ["include/llvm/Support/VCSRevision.h"],
+ cmd = "echo '' > \"$@\"",
+)
+
+# Rules that apply the LLVM tblgen tool.
+gentbl(
+ name = "attributes_gen",
+ tbl_outs = [("-gen-attrs", "include/llvm/IR/Attributes.inc")],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Attributes.td",
+ td_srcs = ["include/llvm/IR/Attributes.td"],
+)
+
+gentbl(
+ name = "instcombine_transforms_gen",
+ tbl_outs = [(
+ "-gen-searchable-tables",
+ "lib/Transforms/InstCombine/InstCombineTables.inc",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "lib/Transforms/InstCombine/InstCombineTables.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]) + ["include/llvm/TableGen/SearchableTable.td"],
+)
+
+gentbl(
+ name = "intrinsic_enums_gen",
+ tbl_outs = [("-gen-intrinsic-enums", "include/llvm/IR/IntrinsicEnums.inc")],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "aarch64_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=aarch64",
+ "include/llvm/IR/IntrinsicsAArch64.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "amdgcn_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=amdgcn",
+ "include/llvm/IR/IntrinsicsAMDGPU.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "arm_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=arm",
+ "include/llvm/IR/IntrinsicsARM.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "bpf_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=bpf",
+ "include/llvm/IR/IntrinsicsBPF.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "hexagon_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=hexagon",
+ "include/llvm/IR/IntrinsicsHexagon.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "mips_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=mips",
+ "include/llvm/IR/IntrinsicsMips.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "nvvm_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=nvvm",
+ "include/llvm/IR/IntrinsicsNVPTX.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "ppc_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=ppc",
+ "include/llvm/IR/IntrinsicsPowerPC.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "r600_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=r600",
+ "include/llvm/IR/IntrinsicsR600.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "riscv_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=riscv",
+ "include/llvm/IR/IntrinsicsRISCV.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "s390_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=s390",
+ "include/llvm/IR/IntrinsicsS390.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "wasm_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=wasm",
+ "include/llvm/IR/IntrinsicsWebAssembly.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "x86_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=x86",
+ "include/llvm/IR/IntrinsicsX86.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "xcore_enums_gen",
+ tbl_outs = [(
+ "-gen-intrinsic-enums -intrinsic-prefix=xcore",
+ "include/llvm/IR/IntrinsicsXCore.h",
+ )],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+gentbl(
+ name = "intrinsics_impl_gen",
+ tbl_outs = [("-gen-intrinsic-impl", "include/llvm/IR/IntrinsicImpl.inc")],
+ tblgen = ":llvm-tblgen",
+ td_file = "include/llvm/IR/Intrinsics.td",
+ td_srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ ]),
+)
+
+cc_library(
+ name = "utils_tablegen",
+ srcs = glob([
+ "utils/TableGen/GlobalISel/*.cpp",
+ ]),
+ hdrs = glob([
+ "utils/TableGen/GlobalISel/*.h",
+ ]),
+ deps = [
+ ":tablegen",
+ ],
+)
+
+# Binary targets used by Tensorflow.
+cc_binary(
+ name = "llvm-tblgen",
+ srcs = glob([
+ "utils/TableGen/*.cpp",
+ "utils/TableGen/*.h",
+ ]),
+ copts = llvm_copts,
+ linkopts = llvm_linkopts,
+ stamp = 0,
+ deps = [
+ ":config",
+ ":support",
+ ":tablegen",
+ ":utils_tablegen",
+ ],
+)
+
+cc_binary(
+ name = "FileCheck",
+ testonly = 1,
+ srcs = glob([
+ "utils/FileCheck/*.cpp",
+ "utils/FileCheck/*.h",
+ ]),
+ copts = llvm_copts,
+ linkopts = llvm_linkopts,
+ stamp = 0,
+ deps = [":support"],
+)
+
+llvm_target_list = [
+ {
+ "name": "AArch64",
+ "lower_name": "aarch64",
+ "short_name": "AArch64",
+ "tbl_outs": [
+ ("-gen-register-bank", "lib/Target/AArch64/AArch64GenRegisterBank.inc"),
+ ("-gen-register-info", "lib/Target/AArch64/AArch64GenRegisterInfo.inc"),
+ ("-gen-instr-info", "lib/Target/AArch64/AArch64GenInstrInfo.inc"),
+ ("-gen-emitter", "lib/Target/AArch64/AArch64GenMCCodeEmitter.inc"),
+ ("-gen-pseudo-lowering", "lib/Target/AArch64/AArch64GenMCPseudoLowering.inc"),
+ ("-gen-asm-writer", "lib/Target/AArch64/AArch64GenAsmWriter.inc"),
+ ("-gen-asm-writer -asmwriternum=1", "lib/Target/AArch64/AArch64GenAsmWriter1.inc"),
+ ("-gen-asm-matcher", "lib/Target/AArch64/AArch64GenAsmMatcher.inc"),
+ ("-gen-dag-isel", "lib/Target/AArch64/AArch64GenDAGISel.inc"),
+ ("-gen-fast-isel", "lib/Target/AArch64/AArch64GenFastISel.inc"),
+ ("-gen-global-isel", "lib/Target/AArch64/AArch64GenGlobalISel.inc"),
+ ("-gen-global-isel-combiner -combiners=AArch64PreLegalizerCombinerHelper", "lib/Target/AArch64/AArch64GenGICombiner.inc"),
+ ("-gen-callingconv", "lib/Target/AArch64/AArch64GenCallingConv.inc"),
+ ("-gen-subtarget", "lib/Target/AArch64/AArch64GenSubtargetInfo.inc"),
+ ("-gen-disassembler", "lib/Target/AArch64/AArch64GenDisassemblerTables.inc"),
+ ("-gen-searchable-tables", "lib/Target/AArch64/AArch64GenSystemOperands.inc"),
+ ],
+ },
+ {
+ "name": "AMDGPU",
+ "lower_name": "amdgpu",
+ "short_name": "AMDGPU",
+ "tbl_outs": [
+ ("-gen-register-bank", "lib/Target/AMDGPU/AMDGPUGenRegisterBank.inc"),
+ ("-gen-register-info", "lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc"),
+ ("-gen-instr-info", "lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc"),
+ ("-gen-dag-isel", "lib/Target/AMDGPU/AMDGPUGenDAGISel.inc"),
+ ("-gen-callingconv", "lib/Target/AMDGPU/AMDGPUGenCallingConv.inc"),
+ ("-gen-subtarget", "lib/Target/AMDGPU/AMDGPUGenSubtargetInfo.inc"),
+ ("-gen-emitter", "lib/Target/AMDGPU/AMDGPUGenMCCodeEmitter.inc"),
+ ("-gen-dfa-packetizer", "lib/Target/AMDGPU/AMDGPUGenDFAPacketizer.inc"),
+ ("-gen-asm-writer", "lib/Target/AMDGPU/AMDGPUGenAsmWriter.inc"),
+ ("-gen-asm-matcher", "lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc"),
+ ("-gen-disassembler", "lib/Target/AMDGPU/AMDGPUGenDisassemblerTables.inc"),
+ ("-gen-pseudo-lowering", "lib/Target/AMDGPU/AMDGPUGenMCPseudoLowering.inc"),
+ ("-gen-searchable-tables", "lib/Target/AMDGPU/AMDGPUGenSearchableTables.inc"),
+ ],
+ "tbl_deps": [
+ ":amdgpu_isel_target_gen",
+ ],
+ },
+ {
+ "name": "AMDGPU",
+ "lower_name": "amdgpu_r600",
+ "short_name": "R600",
+ "tbl_outs": [
+ ("-gen-asm-writer", "lib/Target/AMDGPU/R600GenAsmWriter.inc"),
+ ("-gen-callingconv", "lib/Target/AMDGPU/R600GenCallingConv.inc"),
+ ("-gen-dag-isel", "lib/Target/AMDGPU/R600GenDAGISel.inc"),
+ ("-gen-dfa-packetizer", "lib/Target/AMDGPU/R600GenDFAPacketizer.inc"),
+ ("-gen-instr-info", "lib/Target/AMDGPU/R600GenInstrInfo.inc"),
+ ("-gen-emitter", "lib/Target/AMDGPU/R600GenMCCodeEmitter.inc"),
+ ("-gen-register-info", "lib/Target/AMDGPU/R600GenRegisterInfo.inc"),
+ ("-gen-subtarget", "lib/Target/AMDGPU/R600GenSubtargetInfo.inc"),
+ ],
+ },
+ {
+ "name": "ARM",
+ "lower_name": "arm",
+ "short_name": "ARM",
+ "tbl_outs": [
+ ("-gen-register-bank", "lib/Target/ARM/ARMGenRegisterBank.inc"),
+ ("-gen-register-info", "lib/Target/ARM/ARMGenRegisterInfo.inc"),
+ ("-gen-searchable-tables", "lib/Target/ARM/ARMGenSystemRegister.inc"),
+ ("-gen-instr-info", "lib/Target/ARM/ARMGenInstrInfo.inc"),
+ ("-gen-emitter", "lib/Target/ARM/ARMGenMCCodeEmitter.inc"),
+ ("-gen-pseudo-lowering", "lib/Target/ARM/ARMGenMCPseudoLowering.inc"),
+ ("-gen-asm-writer", "lib/Target/ARM/ARMGenAsmWriter.inc"),
+ ("-gen-asm-matcher", "lib/Target/ARM/ARMGenAsmMatcher.inc"),
+ ("-gen-dag-isel", "lib/Target/ARM/ARMGenDAGISel.inc"),
+ ("-gen-fast-isel", "lib/Target/ARM/ARMGenFastISel.inc"),
+ ("-gen-global-isel", "lib/Target/ARM/ARMGenGlobalISel.inc"),
+ ("-gen-callingconv", "lib/Target/ARM/ARMGenCallingConv.inc"),
+ ("-gen-subtarget", "lib/Target/ARM/ARMGenSubtargetInfo.inc"),
+ ("-gen-disassembler", "lib/Target/ARM/ARMGenDisassemblerTables.inc"),
+ ],
+ },
+ {
+ "name": "NVPTX",
+ "lower_name": "nvptx",
+ "short_name": "NVPTX",
+ "tbl_outs": [
+ ("-gen-register-info", "lib/Target/NVPTX/NVPTXGenRegisterInfo.inc"),
+ ("-gen-instr-info", "lib/Target/NVPTX/NVPTXGenInstrInfo.inc"),
+ ("-gen-asm-writer", "lib/Target/NVPTX/NVPTXGenAsmWriter.inc"),
+ ("-gen-dag-isel", "lib/Target/NVPTX/NVPTXGenDAGISel.inc"),
+ ("-gen-subtarget", "lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc"),
+ ],
+ },
+ {
+ "name": "PowerPC",
+ "lower_name": "powerpc",
+ "short_name": "PPC",
+ "tbl_outs": [
+ ("-gen-asm-writer", "lib/Target/PowerPC/PPCGenAsmWriter.inc"),
+ ("-gen-asm-matcher", "lib/Target/PowerPC/PPCGenAsmMatcher.inc"),
+ ("-gen-emitter", "lib/Target/PowerPC/PPCGenMCCodeEmitter.inc"),
+ ("-gen-register-info", "lib/Target/PowerPC/PPCGenRegisterInfo.inc"),
+ ("-gen-instr-info", "lib/Target/PowerPC/PPCGenInstrInfo.inc"),
+ ("-gen-dag-isel", "lib/Target/PowerPC/PPCGenDAGISel.inc"),
+ ("-gen-fast-isel", "lib/Target/PowerPC/PPCGenFastISel.inc"),
+ ("-gen-callingconv", "lib/Target/PowerPC/PPCGenCallingConv.inc"),
+ ("-gen-subtarget", "lib/Target/PowerPC/PPCGenSubtargetInfo.inc"),
+ ("-gen-disassembler", "lib/Target/PowerPC/PPCGenDisassemblerTables.inc"),
+ ],
+ },
+ {
+ "name": "X86",
+ "lower_name": "x86",
+ "short_name": "X86",
+ "tbl_outs": [
+ ("-gen-register-bank", "lib/Target/X86/X86GenRegisterBank.inc"),
+ ("-gen-register-info", "lib/Target/X86/X86GenRegisterInfo.inc"),
+ ("-gen-disassembler", "lib/Target/X86/X86GenDisassemblerTables.inc"),
+ ("-gen-instr-info", "lib/Target/X86/X86GenInstrInfo.inc"),
+ ("-gen-asm-writer", "lib/Target/X86/X86GenAsmWriter.inc"),
+ ("-gen-asm-writer -asmwriternum=1", "lib/Target/X86/X86GenAsmWriter1.inc"),
+ ("-gen-asm-matcher", "lib/Target/X86/X86GenAsmMatcher.inc"),
+ ("-gen-dag-isel", "lib/Target/X86/X86GenDAGISel.inc"),
+ ("-gen-fast-isel", "lib/Target/X86/X86GenFastISel.inc"),
+ ("-gen-global-isel", "lib/Target/X86/X86GenGlobalISel.inc"),
+ ("-gen-callingconv", "lib/Target/X86/X86GenCallingConv.inc"),
+ ("-gen-subtarget", "lib/Target/X86/X86GenSubtargetInfo.inc"),
+ ("-gen-x86-EVEX2VEX-tables", "lib/Target/X86/X86GenEVEX2VEXTables.inc"),
+ ],
+ },
+]
+
+filegroup(
+ name = "common_target_td_sources",
+ srcs = glob([
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ "include/llvm/TableGen/*.td",
+ "include/llvm/Target/*.td",
+ "include/llvm/Target/GlobalISel/*.td",
+ ]),
+)
+
+gentbl(
+ name = "amdgpu_isel_target_gen",
+ tbl_outs = [
+ ("-gen-global-isel", "lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc"),
+ ("-gen-global-isel-combiner -combiners=AMDGPUPreLegalizerCombinerHelper", "lib/Target/AMDGPU/AMDGPUGenPreLegalizeGICombiner.inc"),
+ ("-gen-global-isel-combiner -combiners=AMDGPUPostLegalizerCombinerHelper", "lib/Target/AMDGPU/AMDGPUGenPostLegalizeGICombiner.inc"),
+ ],
+ tblgen = ":llvm-tblgen",
+ td_file = "lib/Target/AMDGPU/AMDGPUGISel.td",
+ td_srcs = [
+ ":common_target_td_sources",
+ ] + glob([
+ "lib/Target/AMDGPU/*.td",
+ ]),
+)
+
+[
+ gentbl(
+ name = target["lower_name"] + "_target_gen",
+ tbl_outs = target["tbl_outs"],
+ tblgen = ":llvm-tblgen",
+ td_file = ("lib/Target/" + target["name"] + "/" + target["short_name"] +
+ ".td"),
+ td_srcs = glob([
+ "lib/Target/" + target["name"] + "/*.td",
+ "include/llvm/CodeGen/*.td",
+ "include/llvm/IR/Intrinsics*.td",
+ "include/llvm/TableGen/*.td",
+ "include/llvm/Target/*.td",
+ "include/llvm/Target/GlobalISel/*.td",
+ ]),
+ deps = target.get("tbl_deps", []),
+ )
+ for target in llvm_target_list
+]
+
+# This target is used to provide *.def files to x86_code_gen.
+# Files with '.def' extension are not allowed in 'srcs' of 'cc_library' rule.
+cc_library(
+ name = "x86_defs",
+ hdrs = glob([
+ "lib/Target/X86/*.def",
+ ]),
+ visibility = ["//visibility:private"],
+)
+
+# This filegroup provides the docker build script in LLVM repo
+filegroup(
+ name = "docker",
+ srcs = glob([
+ "utils/docker/build_docker_image.sh",
+ ]),
+ visibility = ["//visibility:public"],
+)
+
+py_binary(
+ name = "lit",
+ srcs = ["utils/lit/lit.py"] + glob(["utils/lit/lit/**/*.py"]),
+)
+
+cc_binary(
+ name = "count",
+ srcs = ["utils/count/count.c"],
+)
+
+cc_binary(
+ name = "not",
+ srcs = ["utils/not/not.cpp"],
+ copts = llvm_copts,
+ linkopts = llvm_linkopts,
+ deps = [
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "all_targets",
+ deps = [
+ ":aarch64_code_gen",
+ ":amdgpu_code_gen",
+ ":arm_code_gen",
+ ":nvptx_code_gen",
+ ":powerpc_code_gen",
+ ":x86_code_gen",
+ ],
+)
+
+cc_library(
+ name = "aarch64_asm_parser",
+ srcs = glob([
+ "lib/Target/AArch64/AsmParser/*.c",
+ "lib/Target/AArch64/AsmParser/*.cpp",
+ "lib/Target/AArch64/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/AsmParser/*.h",
+ "include/llvm/Target/AArch64/AsmParser/*.def",
+ "include/llvm/Target/AArch64/AsmParser/*.inc",
+ "lib/Target/AArch64/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":aarch64_desc",
+ ":aarch64_info",
+ ":aarch64_utils",
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "aarch64_code_gen",
+ srcs = glob([
+ "lib/Target/AArch64/*.c",
+ "lib/Target/AArch64/*.cpp",
+ "lib/Target/AArch64/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/*.h",
+ "include/llvm/Target/AArch64/*.def",
+ "include/llvm/Target/AArch64/*.inc",
+ "lib/Target/AArch64/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":aarch64_desc",
+ ":aarch64_info",
+ ":aarch64_utils",
+ ":analysis",
+ ":asm_printer",
+ ":cf_guard",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":mc",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "aarch64_desc",
+ srcs = glob([
+ "lib/Target/AArch64/MCTargetDesc/*.c",
+ "lib/Target/AArch64/MCTargetDesc/*.cpp",
+ "lib/Target/AArch64/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/MCTargetDesc/*.h",
+ "include/llvm/Target/AArch64/MCTargetDesc/*.def",
+ "include/llvm/Target/AArch64/MCTargetDesc/*.inc",
+ "lib/Target/AArch64/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":aarch64_info",
+ ":aarch64_target_gen",
+ ":aarch64_utils",
+ ":attributes_gen",
+ ":binary_format",
+ ":config",
+ ":intrinsic_enums_gen",
+ ":intrinsics_impl_gen",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "aarch64_disassembler",
+ srcs = glob([
+ "lib/Target/AArch64/Disassembler/*.c",
+ "lib/Target/AArch64/Disassembler/*.cpp",
+ "lib/Target/AArch64/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/Disassembler/*.h",
+ "include/llvm/Target/AArch64/Disassembler/*.def",
+ "include/llvm/Target/AArch64/Disassembler/*.inc",
+ "lib/Target/AArch64/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":aarch64_desc",
+ ":aarch64_info",
+ ":aarch64_utils",
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "aarch64_info",
+ srcs = glob([
+ "lib/Target/AArch64/TargetInfo/*.c",
+ "lib/Target/AArch64/TargetInfo/*.cpp",
+ "lib/Target/AArch64/TargetInfo/*.inc",
+ "lib/Target/AArch64/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/TargetInfo/*.h",
+ "include/llvm/Target/AArch64/TargetInfo/*.def",
+ "include/llvm/Target/AArch64/TargetInfo/*.inc",
+ "lib/Target/AArch64/*.def",
+ "lib/Target/AArch64/AArch64*.h",
+ "lib/Target/AArch64/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":code_gen",
+ ":config",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "aarch64_utils",
+ srcs = glob([
+ "lib/Target/AArch64/Utils/*.c",
+ "lib/Target/AArch64/Utils/*.cpp",
+ "lib/Target/AArch64/Utils/*.inc",
+ "lib/Target/AArch64/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AArch64/Utils/*.h",
+ "include/llvm/Target/AArch64/Utils/*.def",
+ "include/llvm/Target/AArch64/Utils/*.inc",
+ "lib/Target/AArch64/Utils/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AArch64"],
+ deps = [
+ ":aarch64_target_gen",
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_asm_parser",
+ srcs = glob([
+ "lib/Target/AMDGPU/AsmParser/*.c",
+ "lib/Target/AMDGPU/AsmParser/*.cpp",
+ "lib/Target/AMDGPU/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/AsmParser/*.h",
+ "include/llvm/Target/AMDGPU/AsmParser/*.def",
+ "include/llvm/Target/AMDGPU/AsmParser/*.inc",
+ "lib/Target/AMDGPU/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_desc",
+ ":amdgpu_info",
+ ":amdgpu_utils",
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_code_gen",
+ srcs = glob([
+ "lib/Target/AMDGPU/*.c",
+ "lib/Target/AMDGPU/*.cpp",
+ "lib/Target/AMDGPU/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/*.h",
+ "include/llvm/Target/AMDGPU/*.def",
+ "include/llvm/Target/AMDGPU/*.inc",
+ "lib/Target/AMDGPU/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_desc",
+ ":amdgpu_info",
+ ":amdgpu_utils",
+ ":analysis",
+ ":asm_printer",
+ ":binary_format",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":ipo",
+ ":mc",
+ ":mir_parser",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ":vectorize",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_desc",
+ srcs = glob([
+ "lib/Target/AMDGPU/MCTargetDesc/*.c",
+ "lib/Target/AMDGPU/MCTargetDesc/*.cpp",
+ "lib/Target/AMDGPU/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/MCTargetDesc/*.h",
+ "include/llvm/Target/AMDGPU/MCTargetDesc/*.def",
+ "include/llvm/Target/AMDGPU/MCTargetDesc/*.inc",
+ "lib/Target/AMDGPU/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_info",
+ ":amdgpu_utils",
+ ":binary_format",
+ ":config",
+ ":core",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_disassembler",
+ srcs = glob([
+ "lib/Target/AMDGPU/Disassembler/*.c",
+ "lib/Target/AMDGPU/Disassembler/*.cpp",
+ "lib/Target/AMDGPU/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/Disassembler/*.h",
+ "include/llvm/Target/AMDGPU/Disassembler/*.def",
+ "include/llvm/Target/AMDGPU/Disassembler/*.inc",
+ "lib/Target/AMDGPU/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_desc",
+ ":amdgpu_info",
+ ":amdgpu_utils",
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_info",
+ srcs = glob([
+ "lib/Target/AMDGPU/TargetInfo/*.c",
+ "lib/Target/AMDGPU/TargetInfo/*.cpp",
+ "lib/Target/AMDGPU/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/TargetInfo/*.h",
+ "include/llvm/Target/AMDGPU/TargetInfo/*.def",
+ "include/llvm/Target/AMDGPU/TargetInfo/*.inc",
+ "lib/Target/AMDGPU/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_r600_target_gen",
+ ":amdgpu_target_gen",
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "amdgpu_utils",
+ srcs = glob([
+ "lib/Target/AMDGPU/Utils/*.c",
+ "lib/Target/AMDGPU/Utils/*.cpp",
+ "lib/Target/AMDGPU/Utils/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AMDGPU/Utils/*.h",
+ "include/llvm/Target/AMDGPU/Utils/*.def",
+ "include/llvm/Target/AMDGPU/Utils/*.inc",
+ "lib/Target/AMDGPU/Utils/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AMDGPU"],
+ deps = [
+ ":amdgpu_r600_target_gen",
+ ":amdgpu_target_gen",
+ ":binary_format",
+ ":config",
+ ":core",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arc_code_gen",
+ srcs = glob([
+ "lib/Target/ARC/*.c",
+ "lib/Target/ARC/*.cpp",
+ "lib/Target/ARC/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARC/*.h",
+ "include/llvm/Target/ARC/*.def",
+ "include/llvm/Target/ARC/*.inc",
+ "lib/Target/ARC/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARC"],
+ deps = [
+ ":analysis",
+ ":arc_desc",
+ ":arc_info",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "arc_desc",
+ srcs = glob([
+ "lib/Target/ARC/MCTargetDesc/*.c",
+ "lib/Target/ARC/MCTargetDesc/*.cpp",
+ "lib/Target/ARC/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARC/MCTargetDesc/*.h",
+ "include/llvm/Target/ARC/MCTargetDesc/*.def",
+ "include/llvm/Target/ARC/MCTargetDesc/*.inc",
+ "lib/Target/ARC/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARC"],
+ deps = [
+ ":arc_info",
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arc_disassembler",
+ srcs = glob([
+ "lib/Target/ARC/Disassembler/*.c",
+ "lib/Target/ARC/Disassembler/*.cpp",
+ "lib/Target/ARC/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARC/Disassembler/*.h",
+ "include/llvm/Target/ARC/Disassembler/*.def",
+ "include/llvm/Target/ARC/Disassembler/*.inc",
+ "lib/Target/ARC/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARC"],
+ deps = [
+ ":arc_info",
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arc_info",
+ srcs = glob([
+ "lib/Target/ARC/TargetInfo/*.c",
+ "lib/Target/ARC/TargetInfo/*.cpp",
+ "lib/Target/ARC/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARC/TargetInfo/*.h",
+ "include/llvm/Target/ARC/TargetInfo/*.def",
+ "include/llvm/Target/ARC/TargetInfo/*.inc",
+ "lib/Target/ARC/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARC"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arm_asm_parser",
+ srcs = glob([
+ "lib/Target/ARM/AsmParser/*.c",
+ "lib/Target/ARM/AsmParser/*.cpp",
+ "lib/Target/ARM/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/AsmParser/*.h",
+ "include/llvm/Target/ARM/AsmParser/*.def",
+ "include/llvm/Target/ARM/AsmParser/*.inc",
+ "lib/Target/ARM/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":arm_desc",
+ ":arm_info",
+ ":arm_utils",
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arm_code_gen",
+ srcs = glob([
+ "lib/Target/ARM/*.c",
+ "lib/Target/ARM/*.cpp",
+ "lib/Target/ARM/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/*.h",
+ "include/llvm/Target/ARM/*.def",
+ "include/llvm/Target/ARM/*.inc",
+ "lib/Target/ARM/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":analysis",
+ ":arm_desc",
+ ":arm_info",
+ ":arm_utils",
+ ":asm_printer",
+ ":cf_guard",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":mc",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "arm_desc",
+ srcs = glob([
+ "lib/Target/ARM/MCTargetDesc/*.c",
+ "lib/Target/ARM/MCTargetDesc/*.cpp",
+ "lib/Target/ARM/MCTargetDesc/*.inc",
+ "lib/Target/ARM/*.h",
+ "include/llvm/CodeGen/GlobalISel/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/MCTargetDesc/*.h",
+ "include/llvm/Target/ARM/MCTargetDesc/*.def",
+ "include/llvm/Target/ARM/MCTargetDesc/*.inc",
+ "lib/Target/ARM/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":arm_info",
+ ":arm_target_gen",
+ ":arm_utils",
+ ":attributes_gen",
+ ":binary_format",
+ ":config",
+ ":intrinsic_enums_gen",
+ ":intrinsics_impl_gen",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arm_disassembler",
+ srcs = glob([
+ "lib/Target/ARM/Disassembler/*.c",
+ "lib/Target/ARM/Disassembler/*.cpp",
+ "lib/Target/ARM/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/Disassembler/*.h",
+ "include/llvm/Target/ARM/Disassembler/*.def",
+ "include/llvm/Target/ARM/Disassembler/*.inc",
+ "lib/Target/ARM/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":arm_desc",
+ ":arm_info",
+ ":arm_utils",
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "arm_info",
+ srcs = glob([
+ "lib/Target/ARM/TargetInfo/*.c",
+ "lib/Target/ARM/TargetInfo/*.cpp",
+ "lib/Target/ARM/TargetInfo/*.inc",
+ "lib/Target/ARM/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/TargetInfo/*.h",
+ "include/llvm/Target/ARM/TargetInfo/*.def",
+ "include/llvm/Target/ARM/TargetInfo/*.inc",
+ "lib/Target/ARM/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":arm_target_gen",
+ ":config",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "arm_utils",
+ srcs = glob([
+ "lib/Target/ARM/Utils/*.c",
+ "lib/Target/ARM/Utils/*.cpp",
+ "lib/Target/ARM/Utils/*.inc",
+ "lib/Target/ARM/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/ARM/Utils/*.h",
+ "include/llvm/Target/ARM/Utils/*.def",
+ "include/llvm/Target/ARM/Utils/*.inc",
+ "lib/Target/ARM/Utils/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/ARM"],
+ deps = [
+ ":arm_target_gen",
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "avr_asm_parser",
+ srcs = glob([
+ "lib/Target/AVR/AsmParser/*.c",
+ "lib/Target/AVR/AsmParser/*.cpp",
+ "lib/Target/AVR/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AVR/AsmParser/*.h",
+ "include/llvm/Target/AVR/AsmParser/*.def",
+ "include/llvm/Target/AVR/AsmParser/*.inc",
+ "lib/Target/AVR/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AVR"],
+ deps = [
+ ":avr_desc",
+ ":avr_info",
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "avr_code_gen",
+ srcs = glob([
+ "lib/Target/AVR/*.c",
+ "lib/Target/AVR/*.cpp",
+ "lib/Target/AVR/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AVR/*.h",
+ "include/llvm/Target/AVR/*.def",
+ "include/llvm/Target/AVR/*.inc",
+ "lib/Target/AVR/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AVR"],
+ deps = [
+ ":asm_printer",
+ ":avr_desc",
+ ":avr_info",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "avr_desc",
+ srcs = glob([
+ "lib/Target/AVR/MCTargetDesc/*.c",
+ "lib/Target/AVR/MCTargetDesc/*.cpp",
+ "lib/Target/AVR/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AVR/MCTargetDesc/*.h",
+ "include/llvm/Target/AVR/MCTargetDesc/*.def",
+ "include/llvm/Target/AVR/MCTargetDesc/*.inc",
+ "lib/Target/AVR/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AVR"],
+ deps = [
+ ":avr_info",
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "avr_disassembler",
+ srcs = glob([
+ "lib/Target/AVR/Disassembler/*.c",
+ "lib/Target/AVR/Disassembler/*.cpp",
+ "lib/Target/AVR/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AVR/Disassembler/*.h",
+ "include/llvm/Target/AVR/Disassembler/*.def",
+ "include/llvm/Target/AVR/Disassembler/*.inc",
+ "lib/Target/AVR/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AVR"],
+ deps = [
+ ":avr_info",
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "avr_info",
+ srcs = glob([
+ "lib/Target/AVR/TargetInfo/*.c",
+ "lib/Target/AVR/TargetInfo/*.cpp",
+ "lib/Target/AVR/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/AVR/TargetInfo/*.h",
+ "include/llvm/Target/AVR/TargetInfo/*.def",
+ "include/llvm/Target/AVR/TargetInfo/*.inc",
+ "lib/Target/AVR/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/AVR"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "aggressive_inst_combine",
+ srcs = glob([
+ "lib/Transforms/AggressiveInstCombine/*.c",
+ "lib/Transforms/AggressiveInstCombine/*.cpp",
+ "lib/Transforms/AggressiveInstCombine/*.inc",
+ "lib/Transforms/AggressiveInstCombine/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/AggressiveInstCombine/*.h",
+ "include/llvm/Transforms/AggressiveInstCombine/*.def",
+ "include/llvm/Transforms/AggressiveInstCombine/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "analysis",
+ srcs = glob([
+ "lib/Analysis/*.c",
+ "lib/Analysis/*.cpp",
+ "lib/Analysis/*.inc",
+ "include/llvm/Transforms/Utils/Local.h",
+ "include/llvm/Transforms/Scalar.h",
+ "lib/Analysis/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Analysis/*.h",
+ "include/llvm/Analysis/*.def",
+ "include/llvm/Analysis/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":core",
+ ":object",
+ ":profile_data",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "asm_parser",
+ srcs = glob([
+ "lib/AsmParser/*.c",
+ "lib/AsmParser/*.cpp",
+ "lib/AsmParser/*.inc",
+ "lib/AsmParser/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/AsmParser/*.h",
+ "include/llvm/AsmParser/*.def",
+ "include/llvm/AsmParser/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "asm_printer",
+ srcs = glob([
+ "lib/CodeGen/AsmPrinter/*.c",
+ "lib/CodeGen/AsmPrinter/*.cpp",
+ "lib/CodeGen/AsmPrinter/*.inc",
+ "lib/CodeGen/AsmPrinter/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/CodeGen/AsmPrinter/*.h",
+ "include/llvm/CodeGen/AsmPrinter/*.def",
+ "include/llvm/CodeGen/AsmPrinter/*.inc",
+ "lib/CodeGen/AsmPrinter/*.def",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":binary_format",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":debug_info_code_view",
+ ":debug_info_dwarf",
+ ":debug_info_msf",
+ ":mc",
+ ":mc_parser",
+ ":remarks",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "bpf_asm_parser",
+ srcs = glob([
+ "lib/Target/BPF/AsmParser/*.c",
+ "lib/Target/BPF/AsmParser/*.cpp",
+ "lib/Target/BPF/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/BPF/AsmParser/*.h",
+ "include/llvm/Target/BPF/AsmParser/*.def",
+ "include/llvm/Target/BPF/AsmParser/*.inc",
+ "lib/Target/BPF/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/BPF"],
+ deps = [
+ ":bpf_desc",
+ ":bpf_info",
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bpf_code_gen",
+ srcs = glob([
+ "lib/Target/BPF/*.c",
+ "lib/Target/BPF/*.cpp",
+ "lib/Target/BPF/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/BPF/*.h",
+ "include/llvm/Target/BPF/*.def",
+ "include/llvm/Target/BPF/*.inc",
+ "lib/Target/BPF/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/BPF"],
+ deps = [
+ ":asm_printer",
+ ":bpf_desc",
+ ":bpf_info",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "bpf_desc",
+ srcs = glob([
+ "lib/Target/BPF/MCTargetDesc/*.c",
+ "lib/Target/BPF/MCTargetDesc/*.cpp",
+ "lib/Target/BPF/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/BPF/MCTargetDesc/*.h",
+ "include/llvm/Target/BPF/MCTargetDesc/*.def",
+ "include/llvm/Target/BPF/MCTargetDesc/*.inc",
+ "lib/Target/BPF/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/BPF"],
+ deps = [
+ ":bpf_info",
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bpf_disassembler",
+ srcs = glob([
+ "lib/Target/BPF/Disassembler/*.c",
+ "lib/Target/BPF/Disassembler/*.cpp",
+ "lib/Target/BPF/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/BPF/Disassembler/*.h",
+ "include/llvm/Target/BPF/Disassembler/*.def",
+ "include/llvm/Target/BPF/Disassembler/*.inc",
+ "lib/Target/BPF/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/BPF"],
+ deps = [
+ ":bpf_info",
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bpf_info",
+ srcs = glob([
+ "lib/Target/BPF/TargetInfo/*.c",
+ "lib/Target/BPF/TargetInfo/*.cpp",
+ "lib/Target/BPF/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/BPF/TargetInfo/*.h",
+ "include/llvm/Target/BPF/TargetInfo/*.def",
+ "include/llvm/Target/BPF/TargetInfo/*.inc",
+ "lib/Target/BPF/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/BPF"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "binary_format",
+ srcs = glob([
+ "lib/BinaryFormat/*.c",
+ "lib/BinaryFormat/*.cpp",
+ "lib/BinaryFormat/*.inc",
+ "lib/BinaryFormat/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/BinaryFormat/*.h",
+ "include/llvm/BinaryFormat/*.def",
+ "include/llvm/BinaryFormat/*.inc",
+ "include/llvm/BinaryFormat/ELFRelocs/*.def",
+ "include/llvm/BinaryFormat/WasmRelocs/*.def",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bit_reader",
+ srcs = glob([
+ "lib/Bitcode/Reader/*.c",
+ "lib/Bitcode/Reader/*.cpp",
+ "lib/Bitcode/Reader/*.inc",
+ "lib/Bitcode/Reader/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Bitcode/Reader/*.h",
+ "include/llvm/Bitcode/Reader/*.def",
+ "include/llvm/Bitcode/Reader/*.inc",
+ "include/llvm/Bitcode/BitstreamReader.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":bitstream_reader",
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bit_writer",
+ srcs = glob([
+ "lib/Bitcode/Writer/*.c",
+ "lib/Bitcode/Writer/*.cpp",
+ "lib/Bitcode/Writer/*.inc",
+ "lib/Bitcode/Writer/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Bitcode/Writer/*.h",
+ "include/llvm/Bitcode/Writer/*.def",
+ "include/llvm/Bitcode/Writer/*.inc",
+ "include/llvm/Bitcode/BitcodeWriter.h",
+ "include/llvm/Bitcode/BitcodeWriterPass.h",
+ "include/llvm/Bitcode/BitstreamWriter.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":mc",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "bitstream_reader",
+ srcs = glob([
+ "lib/Bitstream/Reader/*.c",
+ "lib/Bitstream/Reader/*.cpp",
+ "lib/Bitstream/Reader/*.inc",
+ "lib/Bitstream/Reader/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Bitstream/Reader/*.h",
+ "include/llvm/Bitstream/Reader/*.def",
+ "include/llvm/Bitstream/Reader/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "cf_guard",
+ srcs = glob([
+ "lib/Transforms/CFGuard/*.c",
+ "lib/Transforms/CFGuard/*.cpp",
+ "lib/Transforms/CFGuard/*.inc",
+ "lib/Transforms/CFGuard/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/CFGuard/*.h",
+ "include/llvm/Transforms/CFGuard/*.def",
+ "include/llvm/Transforms/CFGuard/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "code_gen",
+ srcs = glob([
+ "lib/CodeGen/*.c",
+ "lib/CodeGen/*.cpp",
+ "lib/CodeGen/*.inc",
+ "lib/CodeGen/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/CodeGen/*.h",
+ "include/llvm/CodeGen/*.def",
+ "include/llvm/CodeGen/*.inc",
+ "include/llvm/CodeGen/**/*.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":bit_reader",
+ ":bit_writer",
+ ":config",
+ ":core",
+ ":instrumentation",
+ ":mc",
+ ":profile_data",
+ ":scalar",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "core",
+ srcs = glob([
+ "lib/IR/*.c",
+ "lib/IR/*.cpp",
+ "lib/IR/*.inc",
+ "include/llvm/Analysis/*.h",
+ "include/llvm/Bitcode/BitcodeReader.h",
+ "include/llvm/Bitcode/BitCodes.h",
+ "include/llvm/Bitcode/LLVMBitCodes.h",
+ "include/llvm/CodeGen/MachineValueType.h",
+ "include/llvm/CodeGen/ValueTypes.h",
+ "lib/IR/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/IR/*.h",
+ "include/llvm/IR/*.def",
+ "include/llvm/IR/*.inc",
+ "include/llvm/*.h",
+ "include/llvm/Analysis/*.def",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":aarch64_enums_gen",
+ ":amdgcn_enums_gen",
+ ":arm_enums_gen",
+ ":attributes_gen",
+ ":binary_format",
+ ":bpf_enums_gen",
+ ":config",
+ ":hexagon_enums_gen",
+ ":intrinsic_enums_gen",
+ ":intrinsics_impl_gen",
+ ":mips_enums_gen",
+ ":nvvm_enums_gen",
+ ":ppc_enums_gen",
+ ":r600_enums_gen",
+ ":remarks",
+ ":riscv_enums_gen",
+ ":s390_enums_gen",
+ ":support",
+ ":wasm_enums_gen",
+ ":x86_enums_gen",
+ ":xcore_enums_gen",
+ ],
+)
+
+cc_library(
+ name = "coroutines",
+ srcs = glob([
+ "lib/Transforms/Coroutines/*.c",
+ "lib/Transforms/Coroutines/*.cpp",
+ "lib/Transforms/Coroutines/*.inc",
+ "lib/Transforms/Coroutines/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/Coroutines/*.h",
+ "include/llvm/Transforms/Coroutines/*.def",
+ "include/llvm/Transforms/Coroutines/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":ipo",
+ ":scalar",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "coverage",
+ srcs = glob([
+ "lib/ProfileData/Coverage/*.c",
+ "lib/ProfileData/Coverage/*.cpp",
+ "lib/ProfileData/Coverage/*.inc",
+ "lib/ProfileData/Coverage/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ProfileData/Coverage/*.h",
+ "include/llvm/ProfileData/Coverage/*.def",
+ "include/llvm/ProfileData/Coverage/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":object",
+ ":profile_data",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "dwarf_linker",
+ srcs = glob([
+ "lib/DWARFLinker/*.c",
+ "lib/DWARFLinker/*.cpp",
+ "lib/DWARFLinker/*.inc",
+ "lib/DWARFLinker/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DWARFLinker/*.h",
+ "include/llvm/DWARFLinker/*.def",
+ "include/llvm/DWARFLinker/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":debug_info_dwarf",
+ ":mc",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "debug_info_code_view",
+ srcs = glob([
+ "lib/DebugInfo/CodeView/*.c",
+ "lib/DebugInfo/CodeView/*.cpp",
+ "lib/DebugInfo/CodeView/*.inc",
+ "lib/DebugInfo/CodeView/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/CodeView/*.h",
+ "include/llvm/DebugInfo/CodeView/*.def",
+ "include/llvm/DebugInfo/CodeView/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":debug_info_msf",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "debug_info_dwarf",
+ srcs = glob([
+ "lib/DebugInfo/DWARF/*.c",
+ "lib/DebugInfo/DWARF/*.cpp",
+ "lib/DebugInfo/DWARF/*.inc",
+ "lib/DebugInfo/DWARF/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/DWARF/*.h",
+ "include/llvm/DebugInfo/DWARF/*.def",
+ "include/llvm/DebugInfo/DWARF/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":mc",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "debug_info_gsym",
+ srcs = glob([
+ "lib/DebugInfo/GSYM/*.c",
+ "lib/DebugInfo/GSYM/*.cpp",
+ "lib/DebugInfo/GSYM/*.inc",
+ "lib/DebugInfo/GSYM/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/GSYM/*.h",
+ "include/llvm/DebugInfo/GSYM/*.def",
+ "include/llvm/DebugInfo/GSYM/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":debug_info_dwarf",
+ ":mc",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "debug_info_msf",
+ srcs = glob([
+ "lib/DebugInfo/MSF/*.c",
+ "lib/DebugInfo/MSF/*.cpp",
+ "lib/DebugInfo/MSF/*.inc",
+ "lib/DebugInfo/MSF/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/MSF/*.h",
+ "include/llvm/DebugInfo/MSF/*.def",
+ "include/llvm/DebugInfo/MSF/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "debug_info_pdb",
+ srcs = glob([
+ "lib/DebugInfo/PDB/*.c",
+ "lib/DebugInfo/PDB/*.cpp",
+ "lib/DebugInfo/PDB/*.inc",
+ "lib/DebugInfo/PDB/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/PDB/*.h",
+ "include/llvm/DebugInfo/PDB/*.def",
+ "include/llvm/DebugInfo/PDB/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":debug_info_code_view",
+ ":debug_info_msf",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "demangle",
+ srcs = glob([
+ "lib/Demangle/*.c",
+ "lib/Demangle/*.cpp",
+ "lib/Demangle/*.inc",
+ "lib/Demangle/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Demangle/*.h",
+ "include/llvm/Demangle/*.def",
+ "include/llvm/Demangle/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [":config"],
+)
+
+cc_library(
+ name = "dlltool_driver",
+ srcs = glob([
+ "lib/ToolDrivers/llvm-dlltool/*.c",
+ "lib/ToolDrivers/llvm-dlltool/*.cpp",
+ "lib/ToolDrivers/llvm-dlltool/*.inc",
+ "lib/ToolDrivers/llvm-dlltool/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ToolDrivers/llvm-dlltool/*.h",
+ "include/llvm/ToolDrivers/llvm-dlltool/*.def",
+ "include/llvm/ToolDrivers/llvm-dlltool/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":object",
+ ":option",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "execution_engine",
+ srcs = glob([
+ "lib/ExecutionEngine/*.c",
+ "lib/ExecutionEngine/*.cpp",
+ "lib/ExecutionEngine/*.inc",
+ "lib/ExecutionEngine/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/*.h",
+ "include/llvm/ExecutionEngine/*.def",
+ "include/llvm/ExecutionEngine/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":mc",
+ ":object",
+ ":runtime_dyld",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "extensions",
+ srcs = glob([
+ "lib/Extensions/*.c",
+ "lib/Extensions/*.cpp",
+ "lib/Extensions/*.inc",
+ "lib/Extensions/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Extensions/*.h",
+ "include/llvm/Extensions/*.def",
+ "include/llvm/Extensions/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [":config"],
+)
+
+cc_library(
+ name = "frontend_open_mp",
+ srcs = glob([
+ "lib/Frontend/OpenMP/*.c",
+ "lib/Frontend/OpenMP/*.cpp",
+ "lib/Frontend/OpenMP/*.inc",
+ "lib/Frontend/OpenMP/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Frontend/OpenMP/*.h",
+ "include/llvm/Frontend/OpenMP/*.def",
+ "include/llvm/Frontend/OpenMP/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "fuzz_mutate",
+ srcs = glob([
+ "lib/FuzzMutate/*.c",
+ "lib/FuzzMutate/*.cpp",
+ "lib/FuzzMutate/*.inc",
+ "lib/FuzzMutate/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/FuzzMutate/*.h",
+ "include/llvm/FuzzMutate/*.def",
+ "include/llvm/FuzzMutate/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":bit_reader",
+ ":bit_writer",
+ ":config",
+ ":core",
+ ":scalar",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "global_i_sel",
+ srcs = glob([
+ "lib/CodeGen/GlobalISel/*.c",
+ "lib/CodeGen/GlobalISel/*.cpp",
+ "lib/CodeGen/GlobalISel/*.inc",
+ "lib/CodeGen/GlobalISel/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/CodeGen/GlobalISel/*.h",
+ "include/llvm/CodeGen/GlobalISel/*.def",
+ "include/llvm/CodeGen/GlobalISel/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "hexagon_asm_parser",
+ srcs = glob([
+ "lib/Target/Hexagon/AsmParser/*.c",
+ "lib/Target/Hexagon/AsmParser/*.cpp",
+ "lib/Target/Hexagon/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Hexagon/AsmParser/*.h",
+ "include/llvm/Target/Hexagon/AsmParser/*.def",
+ "include/llvm/Target/Hexagon/AsmParser/*.inc",
+ "lib/Target/Hexagon/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Hexagon"],
+ deps = [
+ ":config",
+ ":hexagon_desc",
+ ":hexagon_info",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "hexagon_code_gen",
+ srcs = glob([
+ "lib/Target/Hexagon/*.c",
+ "lib/Target/Hexagon/*.cpp",
+ "lib/Target/Hexagon/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Hexagon/*.h",
+ "include/llvm/Target/Hexagon/*.def",
+ "include/llvm/Target/Hexagon/*.inc",
+ "lib/Target/Hexagon/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Hexagon"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":hexagon_asm_parser",
+ ":hexagon_desc",
+ ":hexagon_info",
+ ":ipo",
+ ":mc",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "hexagon_desc",
+ srcs = glob([
+ "lib/Target/Hexagon/MCTargetDesc/*.c",
+ "lib/Target/Hexagon/MCTargetDesc/*.cpp",
+ "lib/Target/Hexagon/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Hexagon/MCTargetDesc/*.h",
+ "include/llvm/Target/Hexagon/MCTargetDesc/*.def",
+ "include/llvm/Target/Hexagon/MCTargetDesc/*.inc",
+ "lib/Target/Hexagon/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Hexagon"],
+ deps = [
+ ":config",
+ ":hexagon_info",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "hexagon_disassembler",
+ srcs = glob([
+ "lib/Target/Hexagon/Disassembler/*.c",
+ "lib/Target/Hexagon/Disassembler/*.cpp",
+ "lib/Target/Hexagon/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Hexagon/Disassembler/*.h",
+ "include/llvm/Target/Hexagon/Disassembler/*.def",
+ "include/llvm/Target/Hexagon/Disassembler/*.inc",
+ "lib/Target/Hexagon/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Hexagon"],
+ deps = [
+ ":config",
+ ":hexagon_desc",
+ ":hexagon_info",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "hexagon_info",
+ srcs = glob([
+ "lib/Target/Hexagon/TargetInfo/*.c",
+ "lib/Target/Hexagon/TargetInfo/*.cpp",
+ "lib/Target/Hexagon/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Hexagon/TargetInfo/*.h",
+ "include/llvm/Target/Hexagon/TargetInfo/*.def",
+ "include/llvm/Target/Hexagon/TargetInfo/*.inc",
+ "lib/Target/Hexagon/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Hexagon"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "ipo",
+ srcs = glob([
+ "lib/Transforms/IPO/*.c",
+ "lib/Transforms/IPO/*.cpp",
+ "lib/Transforms/IPO/*.inc",
+ "include/llvm/Transforms/SampleProfile.h",
+ "include/llvm-c/Transforms/IPO.h",
+ "include/llvm-c/Transforms/PassManagerBuilder.h",
+ "lib/Transforms/IPO/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/IPO/*.h",
+ "include/llvm/Transforms/IPO/*.def",
+ "include/llvm/Transforms/IPO/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":aggressive_inst_combine",
+ ":analysis",
+ ":bit_reader",
+ ":bit_writer",
+ ":config",
+ ":core",
+ ":frontend_open_mp",
+ ":inst_combine",
+ ":instrumentation",
+ ":ir_reader",
+ ":linker",
+ ":object",
+ ":profile_data",
+ ":scalar",
+ ":support",
+ ":transform_utils",
+ ":vectorize",
+ ],
+)
+
+cc_library(
+ name = "ir_reader",
+ srcs = glob([
+ "lib/IRReader/*.c",
+ "lib/IRReader/*.cpp",
+ "lib/IRReader/*.inc",
+ "lib/IRReader/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/IRReader/*.h",
+ "include/llvm/IRReader/*.def",
+ "include/llvm/IRReader/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":asm_parser",
+ ":bit_reader",
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "inst_combine",
+ srcs = glob([
+ "lib/Transforms/InstCombine/*.c",
+ "lib/Transforms/InstCombine/*.cpp",
+ "lib/Transforms/InstCombine/*.inc",
+ "lib/Transforms/InstCombine/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/InstCombine/*.h",
+ "include/llvm/Transforms/InstCombine/*.def",
+ "include/llvm/Transforms/InstCombine/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":instcombine_transforms_gen",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "instrumentation",
+ srcs = glob([
+ "lib/Transforms/Instrumentation/*.c",
+ "lib/Transforms/Instrumentation/*.cpp",
+ "lib/Transforms/Instrumentation/*.inc",
+ "lib/Transforms/Instrumentation/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/Instrumentation/*.h",
+ "include/llvm/Transforms/Instrumentation/*.def",
+ "include/llvm/Transforms/Instrumentation/*.inc",
+ "include/llvm/Transforms/GCOVProfiler.h",
+ "include/llvm/Transforms/Instrumentation.h",
+ "include/llvm/Transforms/InstrProfiling.h",
+ "include/llvm/Transforms/PGOInstrumentation.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":mc",
+ ":profile_data",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "interpreter",
+ srcs = glob([
+ "lib/ExecutionEngine/Interpreter/*.c",
+ "lib/ExecutionEngine/Interpreter/*.cpp",
+ "lib/ExecutionEngine/Interpreter/*.inc",
+ "lib/ExecutionEngine/Interpreter/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/Interpreter/*.h",
+ "include/llvm/ExecutionEngine/Interpreter/*.def",
+ "include/llvm/ExecutionEngine/Interpreter/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":code_gen",
+ ":config",
+ ":core",
+ ":execution_engine",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "jit_link",
+ srcs = glob([
+ "lib/ExecutionEngine/JITLink/*.c",
+ "lib/ExecutionEngine/JITLink/*.cpp",
+ "lib/ExecutionEngine/JITLink/*.inc",
+ "lib/ExecutionEngine/JITLink/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/JITLink/*.h",
+ "include/llvm/ExecutionEngine/JITLink/*.def",
+ "include/llvm/ExecutionEngine/JITLink/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "lto",
+ srcs = glob([
+ "lib/LTO/*.c",
+ "lib/LTO/*.cpp",
+ "lib/LTO/*.inc",
+ "lib/LTO/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/LTO/*.h",
+ "include/llvm/LTO/*.def",
+ "include/llvm/LTO/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":aggressive_inst_combine",
+ ":analysis",
+ ":binary_format",
+ ":bit_reader",
+ ":bit_writer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":extensions",
+ ":inst_combine",
+ ":ipo",
+ ":linker",
+ ":mc",
+ ":objc_arc",
+ ":object",
+ ":passes",
+ ":remarks",
+ ":scalar",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "lanai_asm_parser",
+ srcs = glob([
+ "lib/Target/Lanai/AsmParser/*.c",
+ "lib/Target/Lanai/AsmParser/*.cpp",
+ "lib/Target/Lanai/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Lanai/AsmParser/*.h",
+ "include/llvm/Target/Lanai/AsmParser/*.def",
+ "include/llvm/Target/Lanai/AsmParser/*.inc",
+ "lib/Target/Lanai/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Lanai"],
+ deps = [
+ ":config",
+ ":lanai_desc",
+ ":lanai_info",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "lanai_code_gen",
+ srcs = glob([
+ "lib/Target/Lanai/*.c",
+ "lib/Target/Lanai/*.cpp",
+ "lib/Target/Lanai/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Lanai/*.h",
+ "include/llvm/Target/Lanai/*.def",
+ "include/llvm/Target/Lanai/*.inc",
+ "lib/Target/Lanai/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Lanai"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":lanai_asm_parser",
+ ":lanai_desc",
+ ":lanai_info",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "lanai_desc",
+ srcs = glob([
+ "lib/Target/Lanai/MCTargetDesc/*.c",
+ "lib/Target/Lanai/MCTargetDesc/*.cpp",
+ "lib/Target/Lanai/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Lanai/MCTargetDesc/*.h",
+ "include/llvm/Target/Lanai/MCTargetDesc/*.def",
+ "include/llvm/Target/Lanai/MCTargetDesc/*.inc",
+ "lib/Target/Lanai/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Lanai"],
+ deps = [
+ ":config",
+ ":lanai_info",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "lanai_disassembler",
+ srcs = glob([
+ "lib/Target/Lanai/Disassembler/*.c",
+ "lib/Target/Lanai/Disassembler/*.cpp",
+ "lib/Target/Lanai/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Lanai/Disassembler/*.h",
+ "include/llvm/Target/Lanai/Disassembler/*.def",
+ "include/llvm/Target/Lanai/Disassembler/*.inc",
+ "lib/Target/Lanai/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Lanai"],
+ deps = [
+ ":config",
+ ":lanai_desc",
+ ":lanai_info",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "lanai_info",
+ srcs = glob([
+ "lib/Target/Lanai/TargetInfo/*.c",
+ "lib/Target/Lanai/TargetInfo/*.cpp",
+ "lib/Target/Lanai/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Lanai/TargetInfo/*.h",
+ "include/llvm/Target/Lanai/TargetInfo/*.def",
+ "include/llvm/Target/Lanai/TargetInfo/*.inc",
+ "lib/Target/Lanai/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Lanai"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "lib_driver",
+ srcs = glob([
+ "lib/ToolDrivers/llvm-lib/*.c",
+ "lib/ToolDrivers/llvm-lib/*.cpp",
+ "lib/ToolDrivers/llvm-lib/*.inc",
+ "lib/ToolDrivers/llvm-lib/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ToolDrivers/llvm-lib/*.h",
+ "include/llvm/ToolDrivers/llvm-lib/*.def",
+ "include/llvm/ToolDrivers/llvm-lib/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":bit_reader",
+ ":config",
+ ":object",
+ ":option",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "line_editor",
+ srcs = glob([
+ "lib/LineEditor/*.c",
+ "lib/LineEditor/*.cpp",
+ "lib/LineEditor/*.inc",
+ "lib/LineEditor/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/LineEditor/*.h",
+ "include/llvm/LineEditor/*.def",
+ "include/llvm/LineEditor/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "linker",
+ srcs = glob([
+ "lib/Linker/*.c",
+ "lib/Linker/*.cpp",
+ "lib/Linker/*.inc",
+ "lib/Linker/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Linker/*.h",
+ "include/llvm/Linker/*.def",
+ "include/llvm/Linker/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "mc",
+ srcs = glob([
+ "lib/MC/*.c",
+ "lib/MC/*.cpp",
+ "lib/MC/*.inc",
+ "lib/MC/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/MC/*.h",
+ "include/llvm/MC/*.def",
+ "include/llvm/MC/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":debug_info_code_view",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mca",
+ srcs = glob([
+ "lib/MCA/*.c",
+ "lib/MCA/*.cpp",
+ "lib/MCA/*.inc",
+ "lib/MCA/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/MCA/*.h",
+ "include/llvm/MCA/*.def",
+ "include/llvm/MCA/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mc_disassembler",
+ srcs = glob([
+ "lib/MC/MCDisassembler/*.c",
+ "lib/MC/MCDisassembler/*.cpp",
+ "lib/MC/MCDisassembler/*.inc",
+ "lib/MC/MCDisassembler/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/MC/MCDisassembler/*.h",
+ "include/llvm/MC/MCDisassembler/*.def",
+ "include/llvm/MC/MCDisassembler/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mcjit",
+ srcs = glob([
+ "lib/ExecutionEngine/MCJIT/*.c",
+ "lib/ExecutionEngine/MCJIT/*.cpp",
+ "lib/ExecutionEngine/MCJIT/*.inc",
+ "lib/ExecutionEngine/MCJIT/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/MCJIT/*.h",
+ "include/llvm/ExecutionEngine/MCJIT/*.def",
+ "include/llvm/ExecutionEngine/MCJIT/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":execution_engine",
+ ":object",
+ ":runtime_dyld",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "mc_parser",
+ srcs = glob([
+ "lib/MC/MCParser/*.c",
+ "lib/MC/MCParser/*.cpp",
+ "lib/MC/MCParser/*.inc",
+ "lib/MC/MCParser/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/MC/MCParser/*.h",
+ "include/llvm/MC/MCParser/*.def",
+ "include/llvm/MC/MCParser/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mir_parser",
+ srcs = glob([
+ "lib/CodeGen/MIRParser/*.c",
+ "lib/CodeGen/MIRParser/*.cpp",
+ "lib/CodeGen/MIRParser/*.inc",
+ "lib/CodeGen/MIRParser/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/CodeGen/MIRParser/*.h",
+ "include/llvm/CodeGen/MIRParser/*.def",
+ "include/llvm/CodeGen/MIRParser/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":asm_parser",
+ ":binary_format",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "msp430_asm_parser",
+ srcs = glob([
+ "lib/Target/MSP430/AsmParser/*.c",
+ "lib/Target/MSP430/AsmParser/*.cpp",
+ "lib/Target/MSP430/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/MSP430/AsmParser/*.h",
+ "include/llvm/Target/MSP430/AsmParser/*.def",
+ "include/llvm/Target/MSP430/AsmParser/*.inc",
+ "lib/Target/MSP430/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/MSP430"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":msp430_desc",
+ ":msp430_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "msp430_code_gen",
+ srcs = glob([
+ "lib/Target/MSP430/*.c",
+ "lib/Target/MSP430/*.cpp",
+ "lib/Target/MSP430/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/MSP430/*.h",
+ "include/llvm/Target/MSP430/*.def",
+ "include/llvm/Target/MSP430/*.inc",
+ "lib/Target/MSP430/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/MSP430"],
+ deps = [
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":msp430_desc",
+ ":msp430_info",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "msp430_desc",
+ srcs = glob([
+ "lib/Target/MSP430/MCTargetDesc/*.c",
+ "lib/Target/MSP430/MCTargetDesc/*.cpp",
+ "lib/Target/MSP430/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/MSP430/MCTargetDesc/*.h",
+ "include/llvm/Target/MSP430/MCTargetDesc/*.def",
+ "include/llvm/Target/MSP430/MCTargetDesc/*.inc",
+ "lib/Target/MSP430/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/MSP430"],
+ deps = [
+ ":config",
+ ":mc",
+ ":msp430_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "msp430_disassembler",
+ srcs = glob([
+ "lib/Target/MSP430/Disassembler/*.c",
+ "lib/Target/MSP430/Disassembler/*.cpp",
+ "lib/Target/MSP430/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/MSP430/Disassembler/*.h",
+ "include/llvm/Target/MSP430/Disassembler/*.def",
+ "include/llvm/Target/MSP430/Disassembler/*.inc",
+ "lib/Target/MSP430/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/MSP430"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":msp430_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "msp430_info",
+ srcs = glob([
+ "lib/Target/MSP430/TargetInfo/*.c",
+ "lib/Target/MSP430/TargetInfo/*.cpp",
+ "lib/Target/MSP430/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/MSP430/TargetInfo/*.h",
+ "include/llvm/Target/MSP430/TargetInfo/*.def",
+ "include/llvm/Target/MSP430/TargetInfo/*.inc",
+ "lib/Target/MSP430/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/MSP430"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mips_asm_parser",
+ srcs = glob([
+ "lib/Target/Mips/AsmParser/*.c",
+ "lib/Target/Mips/AsmParser/*.cpp",
+ "lib/Target/Mips/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Mips/AsmParser/*.h",
+ "include/llvm/Target/Mips/AsmParser/*.def",
+ "include/llvm/Target/Mips/AsmParser/*.inc",
+ "lib/Target/Mips/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Mips"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":mips_desc",
+ ":mips_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mips_code_gen",
+ srcs = glob([
+ "lib/Target/Mips/*.c",
+ "lib/Target/Mips/*.cpp",
+ "lib/Target/Mips/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Mips/*.h",
+ "include/llvm/Target/Mips/*.def",
+ "include/llvm/Target/Mips/*.inc",
+ "lib/Target/Mips/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Mips"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":mc",
+ ":mips_desc",
+ ":mips_info",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "mips_desc",
+ srcs = glob([
+ "lib/Target/Mips/MCTargetDesc/*.c",
+ "lib/Target/Mips/MCTargetDesc/*.cpp",
+ "lib/Target/Mips/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Mips/MCTargetDesc/*.h",
+ "include/llvm/Target/Mips/MCTargetDesc/*.def",
+ "include/llvm/Target/Mips/MCTargetDesc/*.inc",
+ "lib/Target/Mips/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Mips"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mips_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mips_disassembler",
+ srcs = glob([
+ "lib/Target/Mips/Disassembler/*.c",
+ "lib/Target/Mips/Disassembler/*.cpp",
+ "lib/Target/Mips/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Mips/Disassembler/*.h",
+ "include/llvm/Target/Mips/Disassembler/*.def",
+ "include/llvm/Target/Mips/Disassembler/*.inc",
+ "lib/Target/Mips/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Mips"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":mips_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "mips_info",
+ srcs = glob([
+ "lib/Target/Mips/TargetInfo/*.c",
+ "lib/Target/Mips/TargetInfo/*.cpp",
+ "lib/Target/Mips/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Mips/TargetInfo/*.h",
+ "include/llvm/Target/Mips/TargetInfo/*.def",
+ "include/llvm/Target/Mips/TargetInfo/*.inc",
+ "lib/Target/Mips/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Mips"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "nvptx_code_gen",
+ srcs = glob([
+ "lib/Target/NVPTX/*.c",
+ "lib/Target/NVPTX/*.cpp",
+ "lib/Target/NVPTX/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/NVPTX/*.h",
+ "include/llvm/Target/NVPTX/*.def",
+ "include/llvm/Target/NVPTX/*.inc",
+ "lib/Target/NVPTX/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/NVPTX"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":ipo",
+ ":mc",
+ ":nvptx_desc",
+ ":nvptx_info",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ":vectorize",
+ ],
+)
+
+cc_library(
+ name = "nvptx_desc",
+ srcs = glob([
+ "lib/Target/NVPTX/MCTargetDesc/*.c",
+ "lib/Target/NVPTX/MCTargetDesc/*.cpp",
+ "lib/Target/NVPTX/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/NVPTX/MCTargetDesc/*.h",
+ "include/llvm/Target/NVPTX/MCTargetDesc/*.def",
+ "include/llvm/Target/NVPTX/MCTargetDesc/*.inc",
+ "lib/Target/NVPTX/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/NVPTX"],
+ deps = [
+ "nvptx_target_gen",
+ ":config",
+ ":mc",
+ ":nvptx_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "nvptx_info",
+ srcs = glob([
+ "lib/Target/NVPTX/TargetInfo/*.c",
+ "lib/Target/NVPTX/TargetInfo/*.cpp",
+ "lib/Target/NVPTX/TargetInfo/*.inc",
+ "lib/Target/NVPTX/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/NVPTX/TargetInfo/*.h",
+ "include/llvm/Target/NVPTX/TargetInfo/*.def",
+ "include/llvm/Target/NVPTX/TargetInfo/*.inc",
+ "lib/Target/NVPTX/NVPTX.h",
+ "lib/Target/NVPTX/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/NVPTX"],
+ deps = [
+ "nvptx_target_gen",
+ ":attributes_gen",
+ ":config",
+ ":core",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "objc_arc",
+ srcs = glob([
+ "lib/Transforms/ObjCARC/*.c",
+ "lib/Transforms/ObjCARC/*.cpp",
+ "lib/Transforms/ObjCARC/*.inc",
+ "include/llvm/Transforms/ObjCARC.h",
+ "lib/Transforms/ObjCARC/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/ObjCARC/*.h",
+ "include/llvm/Transforms/ObjCARC/*.def",
+ "include/llvm/Transforms/ObjCARC/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "object",
+ srcs = glob([
+ "lib/Object/*.c",
+ "lib/Object/*.cpp",
+ "lib/Object/*.inc",
+ "lib/Object/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Object/*.h",
+ "include/llvm/Object/*.def",
+ "include/llvm/Object/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":bit_reader",
+ ":config",
+ ":core",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ":text_api",
+ ],
+)
+
+cc_library(
+ name = "object_yaml",
+ srcs = glob([
+ "lib/ObjectYAML/*.c",
+ "lib/ObjectYAML/*.cpp",
+ "lib/ObjectYAML/*.inc",
+ "lib/ObjectYAML/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ObjectYAML/*.h",
+ "include/llvm/ObjectYAML/*.def",
+ "include/llvm/ObjectYAML/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":debug_info_code_view",
+ ":mc",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "option",
+ srcs = glob([
+ "lib/Option/*.c",
+ "lib/Option/*.cpp",
+ "lib/Option/*.inc",
+ "lib/Option/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Option/*.h",
+ "include/llvm/Option/*.def",
+ "include/llvm/Option/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "orc_error",
+ srcs = glob([
+ "lib/ExecutionEngine/OrcError/*.c",
+ "lib/ExecutionEngine/OrcError/*.cpp",
+ "lib/ExecutionEngine/OrcError/*.inc",
+ "lib/ExecutionEngine/OrcError/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/OrcError/*.h",
+ "include/llvm/ExecutionEngine/OrcError/*.def",
+ "include/llvm/ExecutionEngine/OrcError/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "orc_jit",
+ srcs = glob([
+ "lib/ExecutionEngine/Orc/*.c",
+ "lib/ExecutionEngine/Orc/*.cpp",
+ "lib/ExecutionEngine/Orc/*.inc",
+ "lib/ExecutionEngine/Orc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/Orc/*.h",
+ "include/llvm/ExecutionEngine/Orc/*.def",
+ "include/llvm/ExecutionEngine/Orc/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":execution_engine",
+ ":jit_link",
+ ":mc",
+ ":object",
+ ":orc_error",
+ ":passes",
+ ":runtime_dyld",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "passes",
+ srcs = glob([
+ "lib/Passes/*.c",
+ "lib/Passes/*.cpp",
+ "lib/Passes/*.inc",
+ "lib/Passes/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Passes/*.h",
+ "include/llvm/Passes/*.def",
+ "include/llvm/Passes/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":aggressive_inst_combine",
+ ":analysis",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":coroutines",
+ ":inst_combine",
+ ":instrumentation",
+ ":ipo",
+ ":scalar",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ":vectorize",
+ ],
+)
+
+cc_library(
+ name = "powerpc_asm_parser",
+ srcs = glob([
+ "lib/Target/PowerPC/AsmParser/*.c",
+ "lib/Target/PowerPC/AsmParser/*.cpp",
+ "lib/Target/PowerPC/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/PowerPC/AsmParser/*.h",
+ "include/llvm/Target/PowerPC/AsmParser/*.def",
+ "include/llvm/Target/PowerPC/AsmParser/*.inc",
+ "lib/Target/PowerPC/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/PowerPC"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":powerpc_desc",
+ ":powerpc_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "powerpc_code_gen",
+ srcs = glob([
+ "lib/Target/PowerPC/*.c",
+ "lib/Target/PowerPC/*.cpp",
+ "lib/Target/PowerPC/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/PowerPC/*.h",
+ "include/llvm/Target/PowerPC/*.def",
+ "include/llvm/Target/PowerPC/*.inc",
+ "lib/Target/PowerPC/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/PowerPC"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":powerpc_desc",
+ ":powerpc_info",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "powerpc_desc",
+ srcs = glob([
+ "lib/Target/PowerPC/MCTargetDesc/*.c",
+ "lib/Target/PowerPC/MCTargetDesc/*.cpp",
+ "lib/Target/PowerPC/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/PowerPC/MCTargetDesc/*.h",
+ "include/llvm/Target/PowerPC/MCTargetDesc/*.def",
+ "include/llvm/Target/PowerPC/MCTargetDesc/*.inc",
+ "lib/Target/PowerPC/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/PowerPC"],
+ deps = [
+ ":attributes_gen",
+ ":binary_format",
+ ":config",
+ ":intrinsic_enums_gen",
+ ":intrinsics_impl_gen",
+ ":mc",
+ ":powerpc_info",
+ ":powerpc_target_gen",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "powerpc_disassembler",
+ srcs = glob([
+ "lib/Target/PowerPC/Disassembler/*.c",
+ "lib/Target/PowerPC/Disassembler/*.cpp",
+ "lib/Target/PowerPC/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/PowerPC/Disassembler/*.h",
+ "include/llvm/Target/PowerPC/Disassembler/*.def",
+ "include/llvm/Target/PowerPC/Disassembler/*.inc",
+ "lib/Target/PowerPC/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/PowerPC"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":powerpc_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "powerpc_info",
+ srcs = glob([
+ "lib/Target/PowerPC/TargetInfo/*.c",
+ "lib/Target/PowerPC/TargetInfo/*.cpp",
+ "lib/Target/PowerPC/TargetInfo/*.inc",
+ "lib/Target/PowerPC/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/PowerPC/TargetInfo/*.h",
+ "include/llvm/Target/PowerPC/TargetInfo/*.def",
+ "include/llvm/Target/PowerPC/TargetInfo/*.inc",
+ "lib/Target/PowerPC/PPC*.h",
+ "lib/Target/PowerPC/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/PowerPC"],
+ deps = [
+ ":attributes_gen",
+ ":config",
+ ":core",
+ ":powerpc_target_gen",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "profile_data",
+ srcs = glob([
+ "lib/ProfileData/*.c",
+ "lib/ProfileData/*.cpp",
+ "lib/ProfileData/*.inc",
+ "lib/ProfileData/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ProfileData/*.h",
+ "include/llvm/ProfileData/*.def",
+ "include/llvm/ProfileData/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "riscv_asm_parser",
+ srcs = glob([
+ "lib/Target/RISCV/AsmParser/*.c",
+ "lib/Target/RISCV/AsmParser/*.cpp",
+ "lib/Target/RISCV/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/AsmParser/*.h",
+ "include/llvm/Target/RISCV/AsmParser/*.def",
+ "include/llvm/Target/RISCV/AsmParser/*.inc",
+ "lib/Target/RISCV/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":riscv_desc",
+ ":riscv_info",
+ ":riscv_utils",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "riscv_code_gen",
+ srcs = glob([
+ "lib/Target/RISCV/*.c",
+ "lib/Target/RISCV/*.cpp",
+ "lib/Target/RISCV/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/*.h",
+ "include/llvm/Target/RISCV/*.def",
+ "include/llvm/Target/RISCV/*.inc",
+ "lib/Target/RISCV/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":mc",
+ ":riscv_desc",
+ ":riscv_info",
+ ":riscv_utils",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "riscv_desc",
+ srcs = glob([
+ "lib/Target/RISCV/MCTargetDesc/*.c",
+ "lib/Target/RISCV/MCTargetDesc/*.cpp",
+ "lib/Target/RISCV/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/MCTargetDesc/*.h",
+ "include/llvm/Target/RISCV/MCTargetDesc/*.def",
+ "include/llvm/Target/RISCV/MCTargetDesc/*.inc",
+ "lib/Target/RISCV/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":config",
+ ":mc",
+ ":riscv_info",
+ ":riscv_utils",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "riscv_disassembler",
+ srcs = glob([
+ "lib/Target/RISCV/Disassembler/*.c",
+ "lib/Target/RISCV/Disassembler/*.cpp",
+ "lib/Target/RISCV/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/Disassembler/*.h",
+ "include/llvm/Target/RISCV/Disassembler/*.def",
+ "include/llvm/Target/RISCV/Disassembler/*.inc",
+ "lib/Target/RISCV/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":riscv_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "riscv_info",
+ srcs = glob([
+ "lib/Target/RISCV/TargetInfo/*.c",
+ "lib/Target/RISCV/TargetInfo/*.cpp",
+ "lib/Target/RISCV/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/TargetInfo/*.h",
+ "include/llvm/Target/RISCV/TargetInfo/*.def",
+ "include/llvm/Target/RISCV/TargetInfo/*.inc",
+ "lib/Target/RISCV/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "riscv_utils",
+ srcs = glob([
+ "lib/Target/RISCV/Utils/*.c",
+ "lib/Target/RISCV/Utils/*.cpp",
+ "lib/Target/RISCV/Utils/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/RISCV/Utils/*.h",
+ "include/llvm/Target/RISCV/Utils/*.def",
+ "include/llvm/Target/RISCV/Utils/*.inc",
+ "lib/Target/RISCV/Utils/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/RISCV"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "remarks",
+ srcs = glob([
+ "lib/Remarks/*.c",
+ "lib/Remarks/*.cpp",
+ "lib/Remarks/*.inc",
+ "lib/Remarks/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Remarks/*.h",
+ "include/llvm/Remarks/*.def",
+ "include/llvm/Remarks/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":bitstream_reader",
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "runtime_dyld",
+ srcs = glob([
+ "lib/ExecutionEngine/RuntimeDyld/*.c",
+ "lib/ExecutionEngine/RuntimeDyld/*.cpp",
+ "lib/ExecutionEngine/RuntimeDyld/*.inc",
+ "include/llvm/ExecutionEngine/JITSymbol.h",
+ "include/llvm/ExecutionEngine/RTDyldMemoryManager.h",
+ "lib/ExecutionEngine/RuntimeDyld/*.h",
+ "lib/ExecutionEngine/RuntimeDyld/Targets/*.h",
+ "lib/ExecutionEngine/RuntimeDyld/Targets/*.cpp",
+ "lib/ExecutionEngine/RuntimeDyld/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/ExecutionEngine/RuntimeDyld/*.h",
+ "include/llvm/ExecutionEngine/RuntimeDyld/*.def",
+ "include/llvm/ExecutionEngine/RuntimeDyld/*.inc",
+ "include/llvm/DebugInfo/DIContext.h",
+ "include/llvm/ExecutionEngine/RTDyldMemoryManager.h",
+ "include/llvm/ExecutionEngine/RuntimeDyld*.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "scalar",
+ srcs = glob([
+ "lib/Transforms/Scalar/*.c",
+ "lib/Transforms/Scalar/*.cpp",
+ "lib/Transforms/Scalar/*.inc",
+ "include/llvm-c/Transforms/Scalar.h",
+ "include/llvm/Transforms/Scalar.h",
+ "include/llvm/Target/TargetMachine.h",
+ "lib/Transforms/Scalar/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/Scalar/*.h",
+ "include/llvm/Transforms/Scalar/*.def",
+ "include/llvm/Transforms/Scalar/*.inc",
+ "include/llvm/Transforms/IPO.h",
+ "include/llvm/Transforms/IPO/SCCP.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":aggressive_inst_combine",
+ ":analysis",
+ ":config",
+ ":core",
+ ":inst_combine",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "selection_dag",
+ srcs = glob([
+ "lib/CodeGen/SelectionDAG/*.c",
+ "lib/CodeGen/SelectionDAG/*.cpp",
+ "lib/CodeGen/SelectionDAG/*.inc",
+ "lib/CodeGen/SelectionDAG/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/CodeGen/SelectionDAG/*.h",
+ "include/llvm/CodeGen/SelectionDAG/*.def",
+ "include/llvm/CodeGen/SelectionDAG/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "sparc_asm_parser",
+ srcs = glob([
+ "lib/Target/Sparc/AsmParser/*.c",
+ "lib/Target/Sparc/AsmParser/*.cpp",
+ "lib/Target/Sparc/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Sparc/AsmParser/*.h",
+ "include/llvm/Target/Sparc/AsmParser/*.def",
+ "include/llvm/Target/Sparc/AsmParser/*.inc",
+ "lib/Target/Sparc/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Sparc"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":sparc_desc",
+ ":sparc_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "sparc_code_gen",
+ srcs = glob([
+ "lib/Target/Sparc/*.c",
+ "lib/Target/Sparc/*.cpp",
+ "lib/Target/Sparc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Sparc/*.h",
+ "include/llvm/Target/Sparc/*.def",
+ "include/llvm/Target/Sparc/*.inc",
+ "lib/Target/Sparc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Sparc"],
+ deps = [
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":sparc_desc",
+ ":sparc_info",
+ ":support",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "sparc_desc",
+ srcs = glob([
+ "lib/Target/Sparc/MCTargetDesc/*.c",
+ "lib/Target/Sparc/MCTargetDesc/*.cpp",
+ "lib/Target/Sparc/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Sparc/MCTargetDesc/*.h",
+ "include/llvm/Target/Sparc/MCTargetDesc/*.def",
+ "include/llvm/Target/Sparc/MCTargetDesc/*.inc",
+ "lib/Target/Sparc/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Sparc"],
+ deps = [
+ ":config",
+ ":mc",
+ ":sparc_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "sparc_disassembler",
+ srcs = glob([
+ "lib/Target/Sparc/Disassembler/*.c",
+ "lib/Target/Sparc/Disassembler/*.cpp",
+ "lib/Target/Sparc/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Sparc/Disassembler/*.h",
+ "include/llvm/Target/Sparc/Disassembler/*.def",
+ "include/llvm/Target/Sparc/Disassembler/*.inc",
+ "lib/Target/Sparc/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Sparc"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":sparc_info",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "sparc_info",
+ srcs = glob([
+ "lib/Target/Sparc/TargetInfo/*.c",
+ "lib/Target/Sparc/TargetInfo/*.cpp",
+ "lib/Target/Sparc/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/Sparc/TargetInfo/*.h",
+ "include/llvm/Target/Sparc/TargetInfo/*.def",
+ "include/llvm/Target/Sparc/TargetInfo/*.inc",
+ "lib/Target/Sparc/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/Sparc"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "support",
+ srcs = glob([
+ "lib/Support/*.c",
+ "lib/Support/*.cpp",
+ "lib/Support/*.inc",
+ "include/llvm-c/*.h",
+ "include/llvm/CodeGen/MachineValueType.h",
+ "include/llvm/BinaryFormat/COFF.h",
+ "include/llvm/BinaryFormat/MachO.h",
+ "lib/Support/*.h",
+ ]) + llvm_support_platform_specific_srcs_glob(),
+ hdrs = glob([
+ "include/llvm/Support/*.h",
+ "include/llvm/Support/*.def",
+ "include/llvm/Support/*.inc",
+ "include/llvm/ADT/*.h",
+ "include/llvm/Support/ELFRelocs/*.def",
+ "include/llvm/Support/WasmRelocs/*.def",
+ ]) + [
+ "include/llvm/BinaryFormat/MachO.def",
+ "include/llvm/Support/VCSRevision.h",
+ ],
+ copts = llvm_copts,
+ linkopts = llvm_linkopts,
+ deps = [
+ ":config",
+ ":demangle",
+ "@zlib",
+ ],
+)
+
+cc_library(
+ name = "symbolize",
+ srcs = glob([
+ "lib/DebugInfo/Symbolize/*.c",
+ "lib/DebugInfo/Symbolize/*.cpp",
+ "lib/DebugInfo/Symbolize/*.inc",
+ "lib/DebugInfo/Symbolize/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/DebugInfo/Symbolize/*.h",
+ "include/llvm/DebugInfo/Symbolize/*.def",
+ "include/llvm/DebugInfo/Symbolize/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":debug_info_dwarf",
+ ":debug_info_pdb",
+ ":demangle",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "system_z_asm_parser",
+ srcs = glob([
+ "lib/Target/SystemZ/AsmParser/*.c",
+ "lib/Target/SystemZ/AsmParser/*.cpp",
+ "lib/Target/SystemZ/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/SystemZ/AsmParser/*.h",
+ "include/llvm/Target/SystemZ/AsmParser/*.def",
+ "include/llvm/Target/SystemZ/AsmParser/*.inc",
+ "lib/Target/SystemZ/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/SystemZ"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ":system_z_desc",
+ ":system_z_info",
+ ],
+)
+
+cc_library(
+ name = "system_z_code_gen",
+ srcs = glob([
+ "lib/Target/SystemZ/*.c",
+ "lib/Target/SystemZ/*.cpp",
+ "lib/Target/SystemZ/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/SystemZ/*.h",
+ "include/llvm/Target/SystemZ/*.def",
+ "include/llvm/Target/SystemZ/*.inc",
+ "lib/Target/SystemZ/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/SystemZ"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":system_z_desc",
+ ":system_z_info",
+ ":target",
+ ],
+)
+
+cc_library(
+ name = "system_z_desc",
+ srcs = glob([
+ "lib/Target/SystemZ/MCTargetDesc/*.c",
+ "lib/Target/SystemZ/MCTargetDesc/*.cpp",
+ "lib/Target/SystemZ/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/SystemZ/MCTargetDesc/*.h",
+ "include/llvm/Target/SystemZ/MCTargetDesc/*.def",
+ "include/llvm/Target/SystemZ/MCTargetDesc/*.inc",
+ "lib/Target/SystemZ/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/SystemZ"],
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ":system_z_info",
+ ],
+)
+
+cc_library(
+ name = "system_z_disassembler",
+ srcs = glob([
+ "lib/Target/SystemZ/Disassembler/*.c",
+ "lib/Target/SystemZ/Disassembler/*.cpp",
+ "lib/Target/SystemZ/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/SystemZ/Disassembler/*.h",
+ "include/llvm/Target/SystemZ/Disassembler/*.def",
+ "include/llvm/Target/SystemZ/Disassembler/*.inc",
+ "lib/Target/SystemZ/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/SystemZ"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ":system_z_desc",
+ ":system_z_info",
+ ],
+)
+
+cc_library(
+ name = "system_z_info",
+ srcs = glob([
+ "lib/Target/SystemZ/TargetInfo/*.c",
+ "lib/Target/SystemZ/TargetInfo/*.cpp",
+ "lib/Target/SystemZ/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/SystemZ/TargetInfo/*.h",
+ "include/llvm/Target/SystemZ/TargetInfo/*.def",
+ "include/llvm/Target/SystemZ/TargetInfo/*.inc",
+ "lib/Target/SystemZ/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/SystemZ"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "tablegen",
+ srcs = glob([
+ "lib/TableGen/*.c",
+ "lib/TableGen/*.cpp",
+ "lib/TableGen/*.inc",
+ "include/llvm/CodeGen/*.h",
+ "lib/TableGen/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/TableGen/*.h",
+ "include/llvm/TableGen/*.def",
+ "include/llvm/TableGen/*.inc",
+ "include/llvm/Target/*.def",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "target",
+ srcs = glob([
+ "lib/Target/*.c",
+ "lib/Target/*.cpp",
+ "lib/Target/*.inc",
+ "include/llvm/CodeGen/*.h",
+ "include/llvm-c/Initialization.h",
+ "include/llvm-c/Target.h",
+ "lib/Target/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/*.h",
+ "include/llvm/Target/*.def",
+ "include/llvm/Target/*.inc",
+ "include/llvm/CodeGen/*.def",
+ "include/llvm/CodeGen/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":mc",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "testing_support",
+ srcs = glob([
+ "lib/Testing/Support/*.c",
+ "lib/Testing/Support/*.cpp",
+ "lib/Testing/Support/*.inc",
+ "lib/Testing/Support/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Testing/Support/*.h",
+ "include/llvm/Testing/Support/*.def",
+ "include/llvm/Testing/Support/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "text_api",
+ srcs = glob([
+ "lib/TextAPI/*.c",
+ "lib/TextAPI/*.cpp",
+ "lib/TextAPI/*.inc",
+ "lib/TextAPI/ELF/*.cpp",
+ "lib/TextAPI/MachO/*.cpp",
+ "lib/TextAPI/MachO/*.h",
+ "lib/TextAPI/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/TextAPI/*.h",
+ "include/llvm/TextAPI/*.def",
+ "include/llvm/TextAPI/*.inc",
+ ]) + [
+ "include/llvm/TextAPI/ELF/TBEHandler.h",
+ "include/llvm/TextAPI/ELF/ELFStub.h",
+ "include/llvm/TextAPI/MachO/Architecture.def",
+ "include/llvm/TextAPI/MachO/PackedVersion.h",
+ "include/llvm/TextAPI/MachO/InterfaceFile.h",
+ "include/llvm/TextAPI/MachO/Symbol.h",
+ "include/llvm/TextAPI/MachO/ArchitectureSet.h",
+ "include/llvm/TextAPI/MachO/TextAPIWriter.h",
+ "include/llvm/TextAPI/MachO/TextAPIReader.h",
+ "include/llvm/TextAPI/MachO/Architecture.h",
+ ],
+ copts = llvm_copts,
+ deps = [
+ ":binary_format",
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "transform_utils",
+ srcs = glob([
+ "lib/Transforms/Utils/*.c",
+ "lib/Transforms/Utils/*.cpp",
+ "lib/Transforms/Utils/*.inc",
+ "include/llvm/Transforms/IPO.h",
+ "include/llvm/Transforms/Scalar.h",
+ "lib/Transforms/Utils/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/Utils/*.h",
+ "include/llvm/Transforms/Utils/*.def",
+ "include/llvm/Transforms/Utils/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "ve_code_gen",
+ srcs = glob([
+ "lib/Target/VE/*.c",
+ "lib/Target/VE/*.cpp",
+ "lib/Target/VE/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/VE/*.h",
+ "include/llvm/Target/VE/*.def",
+ "include/llvm/Target/VE/*.inc",
+ "lib/Target/VE/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/VE"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":ve_desc",
+ ":ve_info",
+ ],
+)
+
+cc_library(
+ name = "ve_desc",
+ srcs = glob([
+ "lib/Target/VE/MCTargetDesc/*.c",
+ "lib/Target/VE/MCTargetDesc/*.cpp",
+ "lib/Target/VE/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/VE/MCTargetDesc/*.h",
+ "include/llvm/Target/VE/MCTargetDesc/*.def",
+ "include/llvm/Target/VE/MCTargetDesc/*.inc",
+ "lib/Target/VE/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/VE"],
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ":ve_info",
+ ],
+)
+
+cc_library(
+ name = "ve_info",
+ srcs = glob([
+ "lib/Target/VE/TargetInfo/*.c",
+ "lib/Target/VE/TargetInfo/*.cpp",
+ "lib/Target/VE/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/VE/TargetInfo/*.h",
+ "include/llvm/Target/VE/TargetInfo/*.def",
+ "include/llvm/Target/VE/TargetInfo/*.inc",
+ "lib/Target/VE/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/VE"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "vectorize",
+ srcs = glob([
+ "lib/Transforms/Vectorize/*.c",
+ "lib/Transforms/Vectorize/*.cpp",
+ "lib/Transforms/Vectorize/*.inc",
+ "include/llvm-c/Transforms/Vectorize.h",
+ "lib/Transforms/Vectorize/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Transforms/Vectorize/*.h",
+ "include/llvm/Transforms/Vectorize/*.def",
+ "include/llvm/Transforms/Vectorize/*.inc",
+ "include/llvm/Transforms/Vectorize.h",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":analysis",
+ ":config",
+ ":core",
+ ":scalar",
+ ":support",
+ ":transform_utils",
+ ],
+)
+
+cc_library(
+ name = "web_assembly_asm_parser",
+ srcs = glob([
+ "lib/Target/WebAssembly/AsmParser/*.c",
+ "lib/Target/WebAssembly/AsmParser/*.cpp",
+ "lib/Target/WebAssembly/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/WebAssembly/AsmParser/*.h",
+ "include/llvm/Target/WebAssembly/AsmParser/*.def",
+ "include/llvm/Target/WebAssembly/AsmParser/*.inc",
+ "lib/Target/WebAssembly/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/WebAssembly"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ":web_assembly_info",
+ ],
+)
+
+cc_library(
+ name = "web_assembly_code_gen",
+ srcs = glob([
+ "lib/Target/WebAssembly/*.c",
+ "lib/Target/WebAssembly/*.cpp",
+ "lib/Target/WebAssembly/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/WebAssembly/*.h",
+ "include/llvm/Target/WebAssembly/*.def",
+ "include/llvm/Target/WebAssembly/*.inc",
+ "lib/Target/WebAssembly/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/WebAssembly"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":binary_format",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":scalar",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ":web_assembly_desc",
+ ":web_assembly_info",
+ ],
+)
+
+cc_library(
+ name = "web_assembly_desc",
+ srcs = glob([
+ "lib/Target/WebAssembly/MCTargetDesc/*.c",
+ "lib/Target/WebAssembly/MCTargetDesc/*.cpp",
+ "lib/Target/WebAssembly/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/WebAssembly/MCTargetDesc/*.h",
+ "include/llvm/Target/WebAssembly/MCTargetDesc/*.def",
+ "include/llvm/Target/WebAssembly/MCTargetDesc/*.inc",
+ "lib/Target/WebAssembly/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/WebAssembly"],
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ":web_assembly_info",
+ ],
+)
+
+cc_library(
+ name = "web_assembly_disassembler",
+ srcs = glob([
+ "lib/Target/WebAssembly/Disassembler/*.c",
+ "lib/Target/WebAssembly/Disassembler/*.cpp",
+ "lib/Target/WebAssembly/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/WebAssembly/Disassembler/*.h",
+ "include/llvm/Target/WebAssembly/Disassembler/*.def",
+ "include/llvm/Target/WebAssembly/Disassembler/*.inc",
+ "lib/Target/WebAssembly/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/WebAssembly"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ":web_assembly_desc",
+ ":web_assembly_info",
+ ],
+)
+
+cc_library(
+ name = "web_assembly_info",
+ srcs = glob([
+ "lib/Target/WebAssembly/TargetInfo/*.c",
+ "lib/Target/WebAssembly/TargetInfo/*.cpp",
+ "lib/Target/WebAssembly/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/WebAssembly/TargetInfo/*.h",
+ "include/llvm/Target/WebAssembly/TargetInfo/*.def",
+ "include/llvm/Target/WebAssembly/TargetInfo/*.inc",
+ "lib/Target/WebAssembly/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/WebAssembly"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "windows_manifest",
+ srcs = glob([
+ "lib/WindowsManifest/*.c",
+ "lib/WindowsManifest/*.cpp",
+ "lib/WindowsManifest/*.inc",
+ "lib/WindowsManifest/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/WindowsManifest/*.h",
+ "include/llvm/WindowsManifest/*.def",
+ "include/llvm/WindowsManifest/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "x86_asm_parser",
+ srcs = glob([
+ "lib/Target/X86/AsmParser/*.c",
+ "lib/Target/X86/AsmParser/*.cpp",
+ "lib/Target/X86/AsmParser/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/X86/AsmParser/*.h",
+ "include/llvm/Target/X86/AsmParser/*.def",
+ "include/llvm/Target/X86/AsmParser/*.inc",
+ "lib/Target/X86/AsmParser/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/X86"],
+ deps = [
+ ":config",
+ ":mc",
+ ":mc_parser",
+ ":support",
+ ":x86_desc",
+ ":x86_info",
+ ],
+)
+
+cc_library(
+ name = "x86_code_gen",
+ srcs = glob([
+ "lib/Target/X86/*.c",
+ "lib/Target/X86/*.cpp",
+ "lib/Target/X86/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/X86/*.h",
+ "include/llvm/Target/X86/*.def",
+ "include/llvm/Target/X86/*.inc",
+ "lib/Target/X86/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/X86"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":cf_guard",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":global_i_sel",
+ ":mc",
+ ":profile_data",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":x86_defs",
+ ":x86_desc",
+ ":x86_info",
+ ],
+)
+
+cc_library(
+ name = "x86_desc",
+ srcs = glob([
+ "lib/Target/X86/MCTargetDesc/*.c",
+ "lib/Target/X86/MCTargetDesc/*.cpp",
+ "lib/Target/X86/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/X86/MCTargetDesc/*.h",
+ "include/llvm/Target/X86/MCTargetDesc/*.def",
+ "include/llvm/Target/X86/MCTargetDesc/*.inc",
+ "lib/Target/X86/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/X86"],
+ deps = [
+ ":binary_format",
+ ":config",
+ ":mc",
+ ":mc_disassembler",
+ ":support",
+ ":x86_info",
+ ],
+)
+
+cc_library(
+ name = "x86_disassembler",
+ srcs = glob([
+ "lib/Target/X86/Disassembler/*.c",
+ "lib/Target/X86/Disassembler/*.cpp",
+ "lib/Target/X86/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/X86/Disassembler/*.h",
+ "include/llvm/Target/X86/Disassembler/*.def",
+ "include/llvm/Target/X86/Disassembler/*.inc",
+ "lib/Target/X86/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/X86"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ":x86_info",
+ ],
+)
+
+cc_library(
+ name = "x86_info",
+ srcs = glob([
+ "lib/Target/X86/TargetInfo/*.c",
+ "lib/Target/X86/TargetInfo/*.cpp",
+ "lib/Target/X86/TargetInfo/*.inc",
+ "lib/Target/X86/MCTargetDesc/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/X86/TargetInfo/*.h",
+ "include/llvm/Target/X86/TargetInfo/*.def",
+ "include/llvm/Target/X86/TargetInfo/*.inc",
+ "lib/Target/X86/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/X86"],
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ":x86_target_gen",
+ ],
+)
+
+cc_library(
+ name = "x_core_code_gen",
+ srcs = glob([
+ "lib/Target/XCore/*.c",
+ "lib/Target/XCore/*.cpp",
+ "lib/Target/XCore/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/XCore/*.h",
+ "include/llvm/Target/XCore/*.def",
+ "include/llvm/Target/XCore/*.inc",
+ "lib/Target/XCore/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/XCore"],
+ deps = [
+ ":analysis",
+ ":asm_printer",
+ ":code_gen",
+ ":config",
+ ":core",
+ ":mc",
+ ":selection_dag",
+ ":support",
+ ":target",
+ ":transform_utils",
+ ":x_core_desc",
+ ":x_core_info",
+ ],
+)
+
+cc_library(
+ name = "x_core_desc",
+ srcs = glob([
+ "lib/Target/XCore/MCTargetDesc/*.c",
+ "lib/Target/XCore/MCTargetDesc/*.cpp",
+ "lib/Target/XCore/MCTargetDesc/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/XCore/MCTargetDesc/*.h",
+ "include/llvm/Target/XCore/MCTargetDesc/*.def",
+ "include/llvm/Target/XCore/MCTargetDesc/*.inc",
+ "lib/Target/XCore/MCTargetDesc/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/XCore"],
+ deps = [
+ ":config",
+ ":mc",
+ ":support",
+ ":x_core_info",
+ ],
+)
+
+cc_library(
+ name = "x_core_disassembler",
+ srcs = glob([
+ "lib/Target/XCore/Disassembler/*.c",
+ "lib/Target/XCore/Disassembler/*.cpp",
+ "lib/Target/XCore/Disassembler/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/XCore/Disassembler/*.h",
+ "include/llvm/Target/XCore/Disassembler/*.def",
+ "include/llvm/Target/XCore/Disassembler/*.inc",
+ "lib/Target/XCore/Disassembler/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/XCore"],
+ deps = [
+ ":config",
+ ":mc_disassembler",
+ ":support",
+ ":x_core_info",
+ ],
+)
+
+cc_library(
+ name = "x_core_info",
+ srcs = glob([
+ "lib/Target/XCore/TargetInfo/*.c",
+ "lib/Target/XCore/TargetInfo/*.cpp",
+ "lib/Target/XCore/TargetInfo/*.inc",
+ ]),
+ hdrs = glob([
+ "include/llvm/Target/XCore/TargetInfo/*.h",
+ "include/llvm/Target/XCore/TargetInfo/*.def",
+ "include/llvm/Target/XCore/TargetInfo/*.inc",
+ "lib/Target/XCore/TargetInfo/*.h",
+ ]),
+ copts = llvm_copts + ["-Iexternal/llvm/lib/Target/XCore"],
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "x_ray",
+ srcs = glob([
+ "lib/XRay/*.c",
+ "lib/XRay/*.cpp",
+ "lib/XRay/*.inc",
+ "lib/XRay/*.h",
+ ]),
+ hdrs = glob([
+ "include/llvm/XRay/*.h",
+ "include/llvm/XRay/*.def",
+ "include/llvm/XRay/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":object",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "gtest",
+ srcs = glob([
+ "utils/unittest/*.c",
+ "utils/unittest/*.cpp",
+ "utils/unittest/*.inc",
+ "utils/unittest/*.h",
+ ]),
+ hdrs = glob([
+ "utils/unittest/*.h",
+ "utils/unittest/*.def",
+ "utils/unittest/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":support",
+ ],
+)
+
+cc_library(
+ name = "gtest_main",
+ srcs = glob([
+ "utils/unittest/*.c",
+ "utils/unittest/*.cpp",
+ "utils/unittest/*.inc",
+ "utils/unittest/*.h",
+ ]),
+ hdrs = glob([
+ "utils/unittest/*.h",
+ "utils/unittest/*.def",
+ "utils/unittest/*.inc",
+ ]),
+ copts = llvm_copts,
+ deps = [
+ ":config",
+ ":gtest",
+ ],
+)
diff --git a/dependency_support/llvm/common.bzl b/dependency_support/llvm/common.bzl
new file mode 100644
index 0000000000..eacf7e0b5e
--- /dev/null
+++ b/dependency_support/llvm/common.bzl
@@ -0,0 +1,56 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Rule for simple expansion of template files. This performs a simple
+# search over the template file for the keys in substitutions,
+# and replaces them with the corresponding values.
+#
+# Typical usage:
+# load("/tools/build_rules/template_rule", "expand_header_template")
+# template_rule(
+# name = "ExpandMyTemplate",
+# src = "my.template",
+# out = "my.txt",
+# substitutions = {
+# "$VAR1": "foo",
+# "$VAR2": "bar",
+# }
+# )
+#
+# Args:
+# name: The name of the rule.
+# template: The template file to expand
+# out: The destination of the expanded file
+# substitutions: A dictionary mapping strings to their substitutions
+
+def template_rule_impl(ctx):
+ ctx.actions.expand_template(
+ template = ctx.file.src,
+ output = ctx.outputs.out,
+ substitutions = ctx.attr.substitutions,
+ )
+
+template_rule = rule(
+ attrs = {
+ "src": attr.label(
+ mandatory = True,
+ allow_single_file = True,
+ ),
+ "substitutions": attr.string_dict(mandatory = True),
+ "out": attr.output(mandatory = True),
+ },
+ # output_to_genfiles is required for header files.
+ output_to_genfiles = True,
+ implementation = template_rule_impl,
+)
diff --git a/dependency_support/llvm/expand_cmake_vars.py b/dependency_support/llvm/expand_cmake_vars.py
new file mode 100644
index 0000000000..b35aac1250
--- /dev/null
+++ b/dependency_support/llvm/expand_cmake_vars.py
@@ -0,0 +1,89 @@
+# Copyright 2016 The TensorFlow Authors. All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# ==============================================================================
+"""Expands CMake variables in a text file."""
+
+from __future__ import absolute_import
+from __future__ import division
+from __future__ import print_function
+
+import re
+import sys
+
+_CMAKE_DEFINE_REGEX = re.compile(r"\s*#cmakedefine\s+([A-Za-z_0-9]*)(\s.*)?$")
+_CMAKE_DEFINE01_REGEX = re.compile(r"\s*#cmakedefine01\s+([A-Za-z_0-9]*)")
+_CMAKE_VAR_REGEX = re.compile(r"\${([A-Za-z_0-9]*)}")
+
+
+def _parse_args(argv):
+ """Parses arguments with the form KEY=VALUE into a dictionary."""
+ result = {}
+ for arg in argv:
+ k, v = arg.split("=")
+ result[k] = v
+ return result
+
+
+def _expand_variables(input_str, cmake_vars):
+ """Expands ${VARIABLE}s in 'input_str', using dictionary 'cmake_vars'.
+
+ Args:
+ input_str: the string containing ${VARIABLE} expressions to expand.
+ cmake_vars: a dictionary mapping variable names to their values.
+
+ Returns:
+ The expanded string.
+ """
+
+ def replace(match):
+ if match.group(1) in cmake_vars:
+ return cmake_vars[match.group(1)]
+ return ""
+
+ return _CMAKE_VAR_REGEX.sub(replace, input_str)
+
+
+def _expand_cmakedefines(line, cmake_vars):
+ """Expands #cmakedefine declarations, using a dictionary 'cmake_vars'."""
+
+ # Handles #cmakedefine lines
+ match = _CMAKE_DEFINE_REGEX.match(line)
+ if match:
+ name = match.group(1)
+ suffix = match.group(2) or ""
+ if name in cmake_vars:
+ return "#define {}{}\n".format(name,
+ _expand_variables(suffix, cmake_vars))
+ else:
+ return "/* #undef {} */\n".format(name)
+
+ # Handles #cmakedefine01 lines
+ match = _CMAKE_DEFINE01_REGEX.match(line)
+ if match:
+ name = match.group(1)
+ value = cmake_vars.get(name, "0")
+ return "#define {} {}\n".format(name, value)
+
+ # Otherwise return the line unchanged.
+ return _expand_variables(line, cmake_vars)
+
+
+def main():
+ cmake_vars = _parse_args(sys.argv[1:])
+ for line in sys.stdin:
+ sys.stdout.write(_expand_cmakedefines(line, cmake_vars))
+
+
+if __name__ == "__main__":
+ main()
diff --git a/dependency_support/llvm/llvm.bzl b/dependency_support/llvm/llvm.bzl
new file mode 100644
index 0000000000..1b495f7635
--- /dev/null
+++ b/dependency_support/llvm/llvm.bzl
@@ -0,0 +1,355 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""This file contains BUILD extensions for generating source code from LLVM's table definition files using the TableGen tool.
+
+See http://llvm.org/cmds/tblgen.html for more information on the TableGen
+tool.
+TODO: Currently this expresses include-based dependencies as
+"sources", and has no transitive understanding due to these files not being
+correctly understood by the build system.
+"""
+
+def _dict_add(*dictionaries):
+ """Returns a new `dict` that has all the entries of the given dictionaries.
+
+ If the same key is present in more than one of the input dictionaries, the
+ last of them in the argument list overrides any earlier ones.
+
+ This function is designed to take zero or one arguments as well as multiple
+ dictionaries, so that it follows arithmetic identities and callers can avoid
+ special cases for their inputs: the sum of zero dictionaries is the empty
+ dictionary, and the sum of a single dictionary is a copy of itself.
+
+ Re-implemented here to avoid adding a dependency on skylib.
+
+ Args:
+ *dictionaries: Zero or more dictionaries to be added.
+
+ Returns:
+ A new `dict` that has all the entries of the given dictionaries.
+ """
+ result = {}
+ for d in dictionaries:
+ result.update(d)
+ return result
+
+def gentbl(name, tblgen, td_file, td_srcs, tbl_outs, library = True, **kwargs):
+ """gentbl() generates tabular code from a table definition file.
+
+ Args:
+ name: The name of the build rule for use in dependencies.
+ tblgen: The binary used to produce the output.
+ td_file: The primary table definitions file.
+ td_srcs: A list of table definition files included transitively.
+ tbl_outs: A list of tuples (opts, out), where each opts is a string of
+ options passed to tblgen, and the out is the corresponding output file
+ produced.
+ library: Whether to bundle the generated files into a library.
+ **kwargs: Keyword arguments to pass to subsidiary cc_library() rule.
+ """
+ if td_file not in td_srcs:
+ td_srcs += [td_file]
+ includes = []
+ for (opts, out) in tbl_outs:
+ outdir = out[:out.rindex("/")]
+ if outdir not in includes:
+ includes.append(outdir)
+ rule_suffix = "_".join(opts.replace("-", "_").replace("=", "_").split(" "))
+ native.genrule(
+ name = "%s_%s_genrule" % (name, rule_suffix),
+ srcs = td_srcs,
+ outs = [out],
+ tools = [tblgen],
+ message = "Generating code from table: %s" % td_file,
+ cmd = (("$(location %s) " + "-I external/llvm/include " +
+ "-I $$(dirname $(location %s)) " + ("%s $(location %s) --long-string-literals=0 " +
+ "-o $@")) % (
+ tblgen,
+ td_file,
+ opts,
+ td_file,
+ )),
+ )
+
+ # For now, all generated files can be assumed to comprise public interfaces.
+ # If this is not true, you should specify library = False
+ # and list the generated '.inc' files in "srcs".
+ if library:
+ native.cc_library(
+ name = name,
+ textual_hdrs = [f for (_, f) in tbl_outs],
+ includes = includes,
+ **kwargs
+ )
+
+def llvm_target_cmake_vars(native_arch, target_triple):
+ return {
+ "LLVM_HOST_TRIPLE": target_triple,
+ "LLVM_DEFAULT_TARGET_TRIPLE": target_triple,
+ "LLVM_NATIVE_ARCH": native_arch,
+ }
+
+def _quote(s):
+ """Quotes the given string for use in a shell command.
+
+ This function double-quotes the given string (in case it contains spaces or
+ other special characters) and escapes any special characters (dollar signs,
+ double-quotes, and backslashes) that may be present.
+
+ Args:
+ s: The string to quote.
+
+ Returns:
+ An escaped and quoted version of the string that can be passed to a shell
+ command.
+ """
+ return ('"' +
+ s.replace("\\", "\\\\").replace("$", "\\$").replace('"', "\\\"") +
+ '"')
+
+def cmake_var_string(cmake_vars):
+ """Converts a dictionary to an input suitable for expand_cmake_vars.
+
+ Ideally we would jist stringify in the expand_cmake_vars() rule, but select()
+ interacts badly with genrules.
+
+ TODO: replace the genrule() with native rule and delete this rule.
+
+ Args:
+ cmake_vars: a dictionary with string keys and values that are convertable to
+ strings.
+
+ Returns:
+ cmake_vars in a form suitable for passing to expand_cmake_vars.
+ """
+ return " ".join([
+ _quote("{}={}".format(k, str(v)))
+ for (k, v) in cmake_vars.items()
+ ])
+
+def expand_cmake_vars(name, src, dst, cmake_vars):
+ """Expands #cmakedefine, #cmakedefine01, and CMake variables in a text file.
+
+ Args:
+ name: the name of the rule
+ src: the input of the rule
+ dst: the output of the rule
+ cmake_vars: a string containing the CMake variables, as generated by
+ cmake_var_string.
+ """
+ expand_cmake_vars_tool = "@com_google_xls//dependency_support/llvm:expand_cmake_vars"
+ native.genrule(
+ name = name,
+ srcs = [src],
+ tools = [expand_cmake_vars_tool],
+ outs = [dst],
+ cmd = ("$(location {}) ".format(expand_cmake_vars_tool) + cmake_vars +
+ "< $< > $@"),
+ )
+
+# TODO: the set of CMake variables was hardcoded for expediency.
+# However, we should really detect many of these via configure-time tests.
+
+# The set of CMake variables common to all targets.
+cmake_vars = {
+ # LLVM features
+ "ENABLE_BACKTRACES": 1,
+ "LLVM_BINDIR": "/dev/null",
+ "LLVM_DISABLE_ABI_BREAKING_CHECKS_ENFORCING": 0,
+ "LLVM_ENABLE_ABI_BREAKING_CHECKS": 0,
+ "LLVM_ENABLE_THREADS": 1,
+ "LLVM_ENABLE_ZLIB": 1,
+ "LLVM_HAS_ATOMICS": 1,
+ "LLVM_INCLUDEDIR": "/dev/null",
+ "LLVM_INFODIR": "/dev/null",
+ "LLVM_MANDIR": "/dev/null",
+ "LLVM_NATIVE_TARGET": 1,
+ "LLVM_NATIVE_TARGETINFO": 1,
+ "LLVM_NATIVE_TARGETMC": 1,
+ "LLVM_NATIVE_ASMPRINTER": 1,
+ "LLVM_NATIVE_ASMPARSER": 1,
+ "LLVM_NATIVE_DISASSEMBLER": 1,
+ "LLVM_PREFIX": "/dev/null",
+ "LLVM_VERSION_MAJOR": 0,
+ "LLVM_VERSION_MINOR": 0,
+ "LLVM_VERSION_PATCH": 0,
+ "PACKAGE_NAME": "llvm",
+ "PACKAGE_STRING": "llvm tensorflow-trunk",
+ "PACKAGE_VERSION": "tensorflow-trunk",
+ "RETSIGTYPE": "void",
+}
+
+# The set of CMake variables common to POSIX targets.
+posix_cmake_vars = {
+ # Headers
+ "HAVE_DIRENT_H": 1,
+ "HAVE_DLFCN_H": 1,
+ "HAVE_ERRNO_H": 1,
+ "HAVE_EXECINFO_H": 1,
+ "HAVE_FCNTL_H": 1,
+ "HAVE_INTTYPES_H": 1,
+ "HAVE_PTHREAD_H": 1,
+ "HAVE_SIGNAL_H": 1,
+ "HAVE_STDINT_H": 1,
+ "HAVE_SYS_IOCTL_H": 1,
+ "HAVE_SYS_MMAN_H": 1,
+ "HAVE_SYS_PARAM_H": 1,
+ "HAVE_SYS_RESOURCE_H": 1,
+ "HAVE_SYS_STAT_H": 1,
+ "HAVE_SYS_TIME_H": 1,
+ "HAVE_SYS_TYPES_H": 1,
+ "HAVE_TERMIOS_H": 1,
+ "HAVE_UNISTD_H": 1,
+ "HAVE_ZLIB_H": 1,
+
+ # Features
+ "HAVE_BACKTRACE": 1,
+ "BACKTRACE_HEADER": "execinfo.h",
+ "HAVE_DLOPEN": 1,
+ "HAVE_FUTIMES": 1,
+ "HAVE_GETCWD": 1,
+ "HAVE_GETPAGESIZE": 1,
+ "HAVE_GETRLIMIT": 1,
+ "HAVE_GETRUSAGE": 1,
+ "HAVE_GETTIMEOFDAY": 1,
+ "HAVE_INT64_T": 1,
+ "HAVE_ISATTY": 1,
+ "HAVE_LIBEDIT": 1,
+ "HAVE_LIBPTHREAD": 1,
+ "HAVE_LIBZ": 1,
+ "HAVE_MKDTEMP": 1,
+ "HAVE_MKSTEMP": 1,
+ "HAVE_MKTEMP": 1,
+ "HAVE_PREAD": 1,
+ "HAVE_PTHREAD_GETSPECIFIC": 1,
+ "HAVE_PTHREAD_MUTEX_LOCK": 1,
+ "HAVE_PTHREAD_RWLOCK_INIT": 1,
+ "HAVE_REALPATH": 1,
+ "HAVE_SBRK": 1,
+ "HAVE_SETENV": 1,
+ "HAVE_SETRLIMIT": 1,
+ "HAVE_SIGALTSTACK": 1,
+ "HAVE_STRERROR": 1,
+ "HAVE_STRERROR_R": 1,
+ "HAVE_STRTOLL": 1,
+ "HAVE_SYSCONF": 1,
+ "HAVE_UINT64_T": 1,
+ "HAVE__UNWIND_BACKTRACE": 1,
+
+ # LLVM features
+ "LLVM_ON_UNIX": 1,
+ "LTDL_SHLIB_EXT": ".so",
+}
+
+# CMake variables specific to the Linux platform
+linux_cmake_vars = {
+ "HAVE_MALLOC_H": 1,
+ "HAVE_LINK_H": 1,
+ "HAVE_MALLINFO": 1,
+ "HAVE_FUTIMENS": 1,
+}
+
+# CMake variables specific to the FreeBSD platform
+freebsd_cmake_vars = {
+ "HAVE_MALLOC_H": 1,
+ "HAVE_LINK_H": 1,
+}
+
+# CMake variables specific to the Darwin (Mac OS X) platform.
+darwin_cmake_vars = {
+ "HAVE_MALLOC_MALLOC_H": 1,
+ "HAVE_MALLOC_ZONE_STATISTICS": 1,
+}
+
+# CMake variables specific to the Windows platform.
+win32_cmake_vars = {
+ # Headers
+ "HAVE_ERRNO_H": 1,
+ "HAVE_EXECINFO_H": 1,
+ "HAVE_FCNTL_H": 1,
+ "HAVE_FENV_H": 1,
+ "HAVE_INTTYPES_H": 1,
+ "HAVE_MALLOC_H": 1,
+ "HAVE_SIGNAL_H": 1,
+ "HAVE_STDINT_H": 1,
+ "HAVE_SYS_STAT_H": 1,
+ "HAVE_SYS_TYPES_H": 1,
+ "HAVE_ZLIB_H": 1,
+
+ # Features
+ "BACKTRACE_HEADER": "execinfo.h",
+ "HAVE_GETCWD": 1,
+ "HAVE_INT64_T": 1,
+ "HAVE_STRERROR": 1,
+ "HAVE_STRTOLL": 1,
+ "HAVE_SYSCONF": 1,
+ "HAVE_UINT64_T": 1,
+ "HAVE__CHSIZE_S": 1,
+ "HAVE___CHKSTK": 1,
+
+ # MSVC specific
+ "stricmp": "_stricmp",
+ "strdup": "_strdup",
+
+ # LLVM features
+ "LTDL_SHLIB_EXT": ".dll",
+
+ # ThreadPoolExecutor global destructor and thread handshaking do not work
+ # on this platform when used as a DLL.
+ # See: https://bugs.llvm.org/show_bug.cgi?id=44211
+ "LLVM_ENABLE_THREADS": 0,
+}
+
+# Select a set of CMake variables based on the platform.
+# TODO: use a better method to select the right host triple, rather
+# than hardcoding x86_64.
+llvm_all_cmake_vars = select({
+ "//conditions:default": cmake_var_string(
+ _dict_add(
+ cmake_vars,
+ llvm_target_cmake_vars("X86", "x86_64-unknown-linux_gnu"),
+ posix_cmake_vars,
+ linux_cmake_vars,
+ ),
+ ),
+})
+
+llvm_linkopts = select({
+ "//conditions:default": ["-ldl", "-lm", "-lpthread"],
+})
+
+llvm_defines = select({
+ "//conditions:default": [],
+}) + [
+ "LLVM_ENABLE_STATS",
+ "__STDC_LIMIT_MACROS",
+ "__STDC_CONSTANT_MACROS",
+ "__STDC_FORMAT_MACROS",
+ "LLVM_BUILD_GLOBAL_ISEL",
+]
+
+llvm_copts = select({
+ "//conditions:default": [],
+})
+
+# Platform specific sources for libSupport.
+
+def llvm_support_platform_specific_srcs_glob():
+ return select({
+ "//conditions:default": native.glob([
+ "lib/Support/Unix/*.inc",
+ "lib/Support/Unix/*.h",
+ ]),
+ })
diff --git a/dependency_support/load_external.bzl b/dependency_support/load_external.bzl
new file mode 100644
index 0000000000..cf90123b46
--- /dev/null
+++ b/dependency_support/load_external.bzl
@@ -0,0 +1,210 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Provides helper that loads external repositories with third-party code."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:git.bzl", "git_repository")
+load("//dependency_support:edu_berkeley_abc/workspace.bzl", repo_abc = "repo")
+load("//dependency_support/org_gnu_bison:workspace.bzl", repo_bison = "repo")
+load("//dependency_support:org_sourceware_bzip2/workspace.bzl", repo_bzip2 = "repo")
+load("//dependency_support/flex:workspace.bzl", repo_flex = "repo")
+load("//dependency_support/org_gnu_gperf:workspace.bzl", repo_gperf = "repo")
+load("//dependency_support/com_icarus_iverilog:workspace.bzl", repo_iverilog = "repo")
+load("//dependency_support/dk_thrysoee_libedit:workspace.bzl", repo_libedit = "repo")
+load("//dependency_support:org_sourceware_libffi/workspace.bzl", repo_libffi = "repo")
+load("//dependency_support/org_gnu_m4:workspace.bzl", repo_m4 = "repo")
+load("//dependency_support/net_invisible_island_ncurses:workspace.bzl", repo_ncurses = "repo")
+load("//dependency_support:tcl_tcl_tk/workspace.bzl", repo_tcl = "repo")
+
+def load_external_repositories():
+ """Loads external repositories with third-party code."""
+ repo_abc()
+ repo_bison()
+ repo_bzip2()
+ repo_flex()
+ repo_gperf()
+ repo_iverilog()
+ repo_libedit()
+ repo_libffi()
+ repo_m4()
+ repo_ncurses()
+ repo_tcl()
+
+ http_archive(
+ name = "com_google_googletest",
+ urls = ["https://github.com/google/googletest/archive/0eea2e9fc63461761dea5f2f517bd6af2ca024fa.zip"], # 2020-04-30
+ strip_prefix = "googletest-0eea2e9fc63461761dea5f2f517bd6af2ca024fa",
+ sha256 = "9463ff914d7c3db02de6bd40a3c412a74e979e3c76eaa89920a49ff8488d6d69",
+ )
+
+ http_archive(
+ name = "com_google_absl",
+ strip_prefix = "abseil-cpp-a1d6689907864974118e592ef2ac7d716c576aad",
+ urls = ["https://github.com/abseil/abseil-cpp/archive/a1d6689907864974118e592ef2ac7d716c576aad.zip"],
+ sha256 = "53b78ffe87db3c737feddda52fa10dcdb75e2d85eed1cb1c5bfd77ca22e53e53",
+ )
+
+ http_archive(
+ name = "com_google_protobuf",
+ strip_prefix = "protobuf-d0bfd5221182da1a7cc280f3337b5e41a89539cf", # this is 3.11.4, 2020-02-14
+ sha256 = "c5fd8f99f0d30c6f9f050bf008e021ccc70d7645ac1f64679c6038e07583b2f3",
+ urls = ["https://github.com/protocolbuffers/protobuf/archive/d0bfd5221182da1a7cc280f3337b5e41a89539cf.zip"],
+ )
+
+ # Protobuf depends on Skylib
+ http_archive(
+ name = "bazel_skylib",
+ urls = [
+ "https://mirror.bazel.build/github.com/bazelbuild/bazel-skylib/releases/download/1.0.2/bazel-skylib-1.0.2.tar.gz",
+ "https://github.com/bazelbuild/bazel-skylib/releases/download/1.0.2/bazel-skylib-1.0.2.tar.gz",
+ ],
+ sha256 = "97e70364e9249702246c0e9444bccdc4b847bed1eb03c5a3ece4f83dfe6abc44",
+ )
+
+ git_repository(
+ name = "boringssl",
+ commit = "14164f6fef47b7ebd97cdb0cea1624eabd6fe6b8", # 2018-11-26
+ remote = "https://github.com/google/boringssl.git",
+ shallow_since = "1543277914 +0000",
+ )
+
+ http_archive(
+ name = "jinja_archive",
+ build_file_content = """py_library(
+ name = "jinja2",
+ visibility = ["//visibility:public"],
+ srcs = glob(["jinja2/*.py"]),
+ deps = ["@markupsafe//:markupsafe"],
+ )""",
+ sha256 = "93187ffbc7808079673ef52771baa950426fd664d3aad1d0fa3e95644360e250",
+ strip_prefix = "Jinja2-2.11.1/src",
+ urls = [
+ "http://mirror.bazel.build/files.pythonhosted.org/packages/d8/03/e491f423379ea14bb3a02a5238507f7d446de639b623187bccc111fbecdf/Jinja2-2.11.1.tar.gz",
+ "https://files.pythonhosted.org/packages/d8/03/e491f423379ea14bb3a02a5238507f7d446de639b623187bccc111fbecdf/Jinja2-2.11.1.tar.gz", # 2020-01-30
+ ],
+ )
+
+ http_archive(
+ name = "llvm",
+ urls = ["https://github.com/llvm/llvm-project/archive/307cfdf5338641e3a895857ef02dc9da35cd0eb6.tar.gz"],
+ sha256 = "5e75125ecadee4f91e07c20bf6612d740913a677348fd33c7264ee8fe7d12b17",
+ strip_prefix = "llvm-project-307cfdf5338641e3a895857ef02dc9da35cd0eb6/llvm",
+ build_file = "@//dependency_support/llvm:bundled.BUILD.bazel",
+ )
+
+ # Jinja2 depends on MarkupSafe
+ http_archive(
+ name = "markupsafe",
+ build_file_content = """py_library(
+ name = "markupsafe",
+ visibility = ["//visibility:public"],
+ srcs = glob(["*.py"])
+ )""",
+ sha256 = "29872e92839765e546828bb7754a68c418d927cd064fd4708fab9fe9c8bb116b",
+ strip_prefix = "MarkupSafe-1.1.1/src/markupsafe",
+ urls = [
+ "http://mirror.bazel.build/files.pythonhosted.org/packages/b9/2e/64db92e53b86efccfaea71321f597fa2e1b2bd3853d8ce658568f7a13094/MarkupSafe-1.1.1.tar.gz",
+ "https://files.pythonhosted.org/packages/b9/2e/64db92e53b86efccfaea71321f597fa2e1b2bd3853d8ce658568f7a13094/MarkupSafe-1.1.1.tar.gz", # 2019-02-24
+ ],
+ )
+
+ http_archive(
+ name = "pybind11_bazel",
+ strip_prefix = "pybind11_bazel-34206c29f891dbd5f6f5face7b91664c2ff7185c",
+ urls = ["https://github.com/pybind/pybind11_bazel/archive/34206c29f891dbd5f6f5face7b91664c2ff7185c.zip"],
+ sha256 = "8d0b776ea5b67891f8585989d54aa34869fc12f14bf33f1dc7459458dd222e95",
+ )
+
+ http_archive(
+ name = "pybind11",
+ build_file = "@pybind11_bazel//:pybind11.BUILD",
+ strip_prefix = "pybind11-a54eab92d265337996b8e4b4149d9176c2d428a6",
+ urls = ["https://github.com/pybind/pybind11/archive/a54eab92d265337996b8e4b4149d9176c2d428a6.tar.gz"],
+ sha256 = "c9375b7453bef1ba0106849c83881e6b6882d892c9fae5b2572a2192100ffb8a",
+ )
+
+ http_archive(
+ name = "six_archive",
+ build_file_content = """py_library(
+ name = "six",
+ visibility = ["//visibility:public"],
+ srcs = glob(["*.py"])
+ )""",
+ sha256 = "105f8d68616f8248e24bf0e9372ef04d3cc10104f1980f54d57b2ce73a5ad56a",
+ strip_prefix = "six-1.10.0",
+ urls = [
+ "https://mirror.bazel.build/pypi.python.org/packages/source/s/six/six-1.10.0.tar.gz",
+ "https://pypi.python.org/packages/source/s/six/six-1.10.0.tar.gz",
+ ],
+ )
+
+ http_archive(
+ name = "com_google_absl_py",
+ strip_prefix = "abseil-py-06edd9c20592cec39178b94240b5e86f32e19768",
+ urls = ["https://github.com/abseil/abseil-py/archive/06edd9c20592cec39178b94240b5e86f32e19768.zip"],
+ sha256 = "6ace3cd8921804aaabc37970590edce05c6664901cc98d30010d09f2811dc56f",
+ )
+
+ http_archive(
+ name = "com_google_re2",
+ sha256 = "d070e2ffc5476c496a6a872a6f246bfddce8e7797d6ba605a7c8d72866743bf9",
+ strip_prefix = "re2-506cfa4bffd060c06ec338ce50ea3468daa6c814",
+ urls = [
+ "https://storage.googleapis.com/mirror.tensorflow.org/github.com/google/re2/archive/506cfa4bffd060c06ec338ce50ea3468daa6c814.tar.gz",
+ "https://github.com/google/re2/archive/506cfa4bffd060c06ec338ce50ea3468daa6c814.tar.gz",
+ ],
+ )
+
+ http_archive(
+ name = "rules_python",
+ url = "https://github.com/bazelbuild/rules_python/releases/download/0.0.1/rules_python-0.0.1.tar.gz",
+ sha256 = "aa96a691d3a8177f3215b14b0edc9641787abaaa30363a080165d06ab65e1161",
+ )
+
+ http_archive(
+ name = "pyfakefs_archive",
+ build_file_content = """py_library(
+ name = "pyfakefs",
+ visibility = ["//visibility:public"],
+ srcs = glob(["pyfakefs/*.py"]),
+ )""",
+ strip_prefix = "pyfakefs-4.0.2",
+ sha256 = "c415e1c737e3aa72b92af41832a7e0a2c325eb8d3a72a210750714e00fcaeace",
+ urls = [
+ "https://pypi.python.org/packages/68/5f/e5501a707958443e0c0f2706a64b0199deb62a0f1d14bc4ee401ed96ef2a/pyfakefs-4.0.2.tar.gz",
+ ],
+ )
+
+ http_archive(
+ name = "termcolor_archive",
+ build_file_content = """py_library(
+ name = "termcolor",
+ visibility = ["//visibility:public"],
+ srcs = glob(["termcolor/*.py"]),
+ )""",
+ sha256 = "1d6d69ce66211143803fbc56652b41d73b4a400a2891d7bf7a1cdf4c02de613b",
+ strip_prefix = "termcolor-1.1.0",
+ urls = [
+ "https://pypi.python.org/packages/8a/48/a76be51647d0eb9f10e2a4511bf3ffb8cc1e6b14e9e4fab46173aa79f981/termcolor-1.1.0.tar.gz",
+ ],
+ )
+
+ http_archive(
+ name = "z3",
+ urls = ["https://github.com/Z3Prover/z3/archive/z3-4.8.7.tar.gz"],
+ sha256 = "8c1c49a1eccf5d8b952dadadba3552b0eac67482b8a29eaad62aa7343a0732c3",
+ strip_prefix = "z3-z3-4.8.7",
+ build_file = "@//dependency_support/z3:bundled.BUILD.bazel",
+ )
diff --git a/dependency_support/net_invisible_island_ncurses/BUILD b/dependency_support/net_invisible_island_ncurses/BUILD
new file mode 100644
index 0000000000..f5360e11b0
--- /dev/null
+++ b/dependency_support/net_invisible_island_ncurses/BUILD
@@ -0,0 +1,19 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["notice"])
+
+exports_files([
+ "ncurses_test.cc",
+])
diff --git a/dependency_support/net_invisible_island_ncurses/bundled.BUILD.bazel b/dependency_support/net_invisible_island_ncurses/bundled.BUILD.bazel
new file mode 100644
index 0000000000..720a233706
--- /dev/null
+++ b/dependency_support/net_invisible_island_ncurses/bundled.BUILD.bazel
@@ -0,0 +1,403 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# The ncurses C library and unit test.
+
+package(default_visibility = ["//visibility:public"])
+
+load("@com_google_xls//dependency_support:automake_substitution.bzl", "automake_substitution")
+load("@com_google_xls//dependency_support:copy.bzl", "copy")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+licenses(["notice"])
+
+exports_files([
+ "LICENSE",
+ "include/Caps",
+])
+
+NCURSES_COPTS = [
+ "-w",
+ "-DTRACE",
+ "-DHAVE_CONFIG_H",
+ "-D_GNU_SOURCE",
+ "-DNDEBUG",
+]
+
+CAPLIST = [
+ "include/Caps",
+ "include/Caps-ncurses",
+]
+
+CAPLIST_LOCATIONS = " ".join(["$(location :" + cap + ")" for cap in CAPLIST])
+
+AUTOMAKE_SUBSTITUTIONS = {
+ "NCURSES_MAJOR": "6",
+ "NCURSES_MINOR": "2",
+ "NCURSES_PATCH": "20200212",
+ "NCURSES_MOUSE_VERSION": "2",
+ "NCURSES_CONST": "const",
+ "NCURSES_INLINE": "inline",
+ "NCURSES_SBOOL": "char",
+ "NCURSES_USE_DATABASE": "1",
+ "NCURSES_USE_TERMCAP": "0",
+ "NCURSES_XNAMES": "1",
+ "HAVE_TERMIOS_H": "1",
+ "HAVE_TCGETATTR": "1",
+ "HAVE_TERMIO_H": "1",
+ "NCURSES_EXT_COLORS": "0",
+ "BROKEN_LINKER": "0",
+ "cf_cv_enable_reentrant": "0",
+ "NCURSES_TPARM_VARARGS": "1",
+ "NCURSES_TPARM_ARG": "intptr_t",
+ "HAVE_STDINT_H": "1",
+ "cf_cv_header_stdbool_h": "1",
+ "NCURSES_OPAQUE": "0",
+ "NCURSES_OPAQUE_FORM": "0",
+ "NCURSES_OPAQUE_MENU": "0",
+ "NCURSES_OPAQUE_PANEL": "0",
+ "NCURSES_WATTR_MACROS": "1",
+ "NCURSES_INTEROP_FUNCS": "1",
+ "NCURSES_SIZE_T": "short",
+ "NCURSES_CH_T": "chtype",
+ "cf_cv_enable_lp64": "1",
+ "cf_cv_type_of_bool": "unsigned char",
+ "USE_CXX_BOOL": "defined(__cplusplus)",
+ "NCURSES_EXT_FUNCS": "1",
+ "NCURSES_LIBUTF8": "0",
+ "NEED_WCHAR_H": "1",
+ "NCURSES_WCHAR_T": "0",
+ "NCURSES_OK_WCHAR_T": "",
+ "NCURSES_CCHARW_MAX": "5",
+ "NCURSES_WCWIDTH_GRAPHICS": "1",
+ "GENERATED_EXT_FUNCS": "generated",
+ "NCURSES_SP_FUNCS": "1",
+ "cf_cv_1UL": "1U",
+ "HAVE_VSSCANF": "1",
+ "NCURSES_WINT_T": "0",
+}
+
+cc_library(
+ name = "ncurses_headers",
+ hdrs = glob(["include/*"]) + [
+ # Generated files are not found by glob.
+ "include/hashsize.h",
+ "include/ncurses_cfg.h",
+ "include/ncurses_def.h",
+ "include/parametrized.h",
+ "include/curses.h",
+ "include/term.h",
+ # Various source files include these, so call them headers.
+ "ncurses/tinfo/doalloc.c",
+ "ncurses/names.c",
+ ],
+ includes = ["include", "ncurses"],
+)
+
+cc_library(
+ name = "ncurses",
+ srcs = glob(
+ [
+ "ncurses/base/*.c",
+ "ncurses/*.c",
+ "ncurses/*.h",
+ "ncurses/tinfo/*.c",
+ "ncurses/trace/*.c",
+ "ncurses/tty/*.c",
+ "build_sources/*.c",
+ ],
+ exclude = glob([
+ "ncurses/base/lib_driver.c",
+ "ncurses/base/sigaction.c",
+ "ncurses/tinfo/make_keys.c",
+ "ncurses/tinfo/tinfo_driver.c",
+ "ncurses/tinfo/make_hash.c",
+ "ncurses/report_offsets.c",
+ "ncurses/*_test.c",
+ "build_sources/*_test.c",
+ ]),
+ ) + [
+ # Generated files are not found by glob.
+ "ncurses/codes.c",
+ "ncurses/comp_captab.c",
+ "ncurses/comp_userdefs.c",
+ "ncurses/fallback.c",
+ "ncurses/init_keytry.h",
+ "ncurses/lib_gen.c",
+ "ncurses/lib_keyname.c",
+ "ncurses/names.c",
+ "ncurses/unctrl.c",
+ ],
+ copts = NCURSES_COPTS,
+ deps = [":ncurses_headers"],
+)
+
+# Common headers between form and menu.
+cc_library(
+ name = "mf_common",
+ hdrs = [
+ "menu/eti.h",
+ "menu/mf_common.h",
+ ],
+ includes = ["menu"],
+)
+
+cc_library(
+ name = "form",
+ srcs = glob(["form/*.c"]) + [
+ "form/form.priv.h",
+ "ncurses/curses.priv.h",
+ ],
+ hdrs = ["form/form.h"],
+ copts = NCURSES_COPTS,
+ deps = [
+ ":mf_common",
+ ":ncurses",
+ ],
+)
+
+cc_library(
+ name = "menu",
+ srcs = glob(["menu/*.c"]) + [
+ "menu/menu.priv.h",
+ "ncurses/curses.priv.h",
+ ],
+ hdrs = ["menu/menu.h"],
+ copts = NCURSES_COPTS,
+ deps = [
+ ":mf_common",
+ ":ncurses",
+ ],
+)
+
+cc_library(
+ name = "panel",
+ srcs = glob(["panel/*.c"]) + [
+ "panel/panel.priv.h",
+ "ncurses/curses.priv.h",
+ ],
+ hdrs = [
+ "panel/panel.h",
+ ],
+ copts = NCURSES_COPTS,
+ deps = [":ncurses"],
+)
+
+genrule(
+ name = "fallback_c",
+ srcs = [
+ "ncurses/tinfo/MKfallback.sh",
+ "misc/terminfo.src",
+ ],
+ outs = ["ncurses/fallback.c"],
+ cmd = "$(location :ncurses/tinfo/MKfallback.sh) /usr/share/terminfo $(location :misc/terminfo.src) $$(which tic) > $@",
+)
+
+cc_binary(
+ name = "make_hash",
+ srcs = [
+ "ncurses/build.priv.h",
+ "ncurses/curses.priv.h",
+ "ncurses/tinfo/make_hash.c",
+ ],
+ deps = [":ncurses_headers"],
+ copts = NCURSES_COPTS,
+)
+
+genrule(
+ name = "comp_captab_c",
+ srcs = [
+ ":make_hash",
+ "ncurses/tinfo/MKcaptab.sh",
+ "ncurses/tinfo/MKcaptab.awk",
+ "include/Caps",
+ ],
+ outs = ["ncurses/comp_captab.c"],
+ cmd = "cp $(location :make_hash) . && $(location :ncurses/tinfo/MKcaptab.sh) $$(which awk) 1 $(location :ncurses/tinfo/MKcaptab.awk) $(location :include/Caps) > $@",
+)
+
+genrule(
+ name = "comp_userdefs_c",
+ srcs = [
+ ":make_hash",
+ "include/hashsize.h",
+ "ncurses/tinfo/MKuserdefs.sh",
+ ] + CAPLIST,
+ outs = ["ncurses/comp_userdefs.c"],
+ cmd = "cp $(location :make_hash) . && $(location ncurses/tinfo/MKuserdefs.sh) $$(which awk) 1 " + CAPLIST_LOCATIONS + " > $@",
+)
+
+genrule(
+ name = "codes_c",
+ srcs = [
+ "ncurses/tinfo/MKcodes.awk",
+ "include/Caps",
+ ],
+ outs = ["ncurses/codes.c"],
+ cmd = "/usr/bin/env awk -f $(location ncurses/tinfo/MKcodes.awk) bigstrings=1 $(location :include/Caps) > $@",
+)
+
+genrule(
+ name = "names_c",
+ srcs = [
+ "ncurses/tinfo/MKnames.awk",
+ "include/Caps",
+ ],
+ outs = ["ncurses/names.c"],
+ cmd = "/usr/bin/env awk -f $(location :ncurses/tinfo/MKnames.awk) bigstrings=1 $(location :include/Caps) > $@",
+)
+
+genrule(
+ name = "unctrl_c",
+ srcs = [
+ "ncurses/base/MKunctrl.awk",
+ ],
+ outs = ["ncurses/unctrl.c"],
+ cmd = "/usr/bin/env awk -f $(location :ncurses/base/MKunctrl.awk) bigstrings=1 > $@",
+)
+
+cc_binary(
+ name = "make_keys",
+ srcs = [
+ "ncurses/build.priv.h",
+ "ncurses/curses.priv.h",
+ "ncurses/tinfo/make_keys.c",
+ ],
+ deps = [":ncurses_headers"],
+ copts = NCURSES_COPTS,
+)
+
+genrule(
+ name = "keys_list",
+ srcs = [
+ "ncurses/tinfo/MKkeys_list.sh",
+ "include/Caps",
+ ],
+ outs = ["keys.list"],
+ cmd = "$(location :ncurses/tinfo/MKkeys_list.sh) $(location :include/Caps) | LC_ALL=C sort > $@",
+)
+
+genrule(
+ name = "lib_keyname_c",
+ srcs = [
+ "ncurses/base/MKkeyname.awk",
+ "keys.list",
+ ],
+ outs = ["ncurses/lib_keyname.c"],
+ cmd = "/usr/bin/env awk -f $(location :ncurses/base/MKkeyname.awk) bigstrings=1 $(location :keys.list) > $@",
+)
+
+automake_substitution(
+ name = "curses_head",
+ src = "include/curses.h.in",
+ out = "include/curses.head",
+ substitutions = AUTOMAKE_SUBSTITUTIONS,
+)
+
+genrule(
+ name = "curses_h",
+ srcs = [
+ "include/curses.head",
+ "include/curses.tail",
+ "include/curses.wide",
+ "include/MKkey_defs.sh",
+ ] + CAPLIST,
+ outs = ["include/curses.h"],
+ cmd = "cat $(location :include/curses.head) > $@ && AWK=$$(which awk) $(location :include/MKkey_defs.sh) " + CAPLIST_LOCATIONS + " >> $@ && cat $(location :include/curses.wide) $(location :include/curses.tail) >> $@",
+)
+
+genrule(
+ name = "lib_gen_c",
+ srcs = [
+ "ncurses/base/MKlib_gen.sh",
+ "include/curses.h",
+ "include/ncurses_cfg.h",
+ "include/ncurses_def.h",
+ ],
+ outs = ["ncurses/lib_gen.c"],
+ cmd = "$(location :ncurses/base/MKlib_gen.sh) \"$$(which cpp) -isystem $$(dirname $(location :include/ncurses_cfg.h))\" $$(which awk) generated < $(location :include/curses.h) > $@",
+)
+
+genrule(
+ name = "hashsize_h",
+ srcs = [
+ "include/MKhashsize.sh",
+ "include/Caps",
+ ],
+ outs = ["include/hashsize.h"],
+ cmd = "$(location :include/MKhashsize.sh) $(location :include/Caps) > $@",
+)
+
+genrule(
+ name = "init_keytry_h",
+ srcs = [
+ ":make_keys",
+ "keys.list",
+ ],
+ outs = ["ncurses/init_keytry.h"],
+ cmd = "$(location :make_keys) $(location :keys.list) > $@",
+)
+
+automake_substitution(
+ name = "mkterm_h_awk",
+ src = "include/MKterm.h.awk.in",
+ out = "include/MKterm.h.awk",
+ substitutions = AUTOMAKE_SUBSTITUTIONS,
+)
+
+genrule(
+ name = "term_h",
+ srcs = [
+ "include/MKterm.h.awk",
+ "include/Caps",
+ ],
+ outs = ["include/term.h"],
+ cmd = "/usr/bin/env awk -f $(location :include/MKterm.h.awk) $(location :include/Caps) > $@",
+)
+
+genrule(
+ name = "parametrized_h",
+ srcs = [
+ "include/MKparametrized.sh",
+ "include/Caps",
+ ],
+ outs = ["include/parametrized.h"],
+ cmd = "(cd $$(dirname $(location :include/MKparametrized.sh)) && ./MKparametrized.sh) > $@",
+)
+
+genrule(
+ name = "ncurses_def_h",
+ srcs = [
+ "include/MKncurses_def.sh",
+ "include/ncurses_defs",
+ ],
+ outs = ["include/ncurses_def.h"],
+ cmd = "(cd $$(dirname $(location :include/MKncurses_def.sh)) && ./MKncurses_def.sh) > $@",
+)
+
+pseudo_configure(
+ name = "ncurses_cfg_h",
+ src = "include/ncurses_cfg.hin",
+ out = "include/ncurses_cfg.h",
+ defs = ['HAVE_LONG_FILE_NAMES', 'MIXEDCASE_FILENAMES', 'HAVE_BIG_CORE', 'PURE_TERMINFO', 'USE_HOME_TERMINFO', 'USE_ROOT_ENVIRON', 'HAVE_UNISTD_H', 'HAVE_REMOVE', 'HAVE_UNLINK', 'HAVE_LINK', 'HAVE_SYMLINK', 'USE_LINKS', 'HAVE_LANGINFO_CODESET', 'HAVE_FSEEKO', 'STDC_HEADERS', 'HAVE_SYS_TYPES_H', 'HAVE_SYS_STAT_H', 'HAVE_STDLIB_H', 'HAVE_STRING_H', 'HAVE_MEMORY_H', 'HAVE_STRINGS_H', 'HAVE_INTTYPES_H', 'HAVE_STDINT_H', 'HAVE_UNISTD_H', 'SIZEOF_SIGNED_CHAR', 'NCURSES_EXT_FUNCS', 'HAVE_ASSUME_DEFAULT_COLORS', 'HAVE_CURSES_VERSION', 'HAVE_HAS_KEY', 'HAVE_RESIZETERM', 'HAVE_RESIZE_TERM', 'HAVE_TERM_ENTRY_H', 'HAVE_USE_DEFAULT_COLORS', 'HAVE_USE_EXTENDED_NAMES', 'HAVE_USE_SCREEN', 'HAVE_USE_WINDOW', 'HAVE_WRESIZE', 'NCURSES_SP_FUNCS', 'HAVE_TPUTS_SP', 'NCURSES_EXT_PUTWIN', 'NCURSES_NO_PADDING', 'USE_SIGWINCH', 'USE_ASSUMED_COLOR', 'USE_HASHMAP', 'GCC_SCANF', 'GCC_PRINTF', 'HAVE_NC_ALLOC_H', 'HAVE_GETTIMEOFDAY', 'STDC_HEADERS', 'HAVE_DIRENT_H', 'TIME_WITH_SYS_TIME', 'HAVE_REGEX_H_FUNCS', 'HAVE_FCNTL_H', 'HAVE_GETOPT_H', 'HAVE_LIMITS_H', 'HAVE_LOCALE_H', 'HAVE_MATH_H', 'HAVE_POLL_H', 'HAVE_SYS_IOCTL_H', 'HAVE_SYS_PARAM_H', 'HAVE_SYS_POLL_H', 'HAVE_SYS_SELECT_H', 'HAVE_SYS_TIME_H', 'HAVE_SYS_TIMES_H', 'HAVE_TTYENT_H', 'HAVE_UNISTD_H', 'HAVE_WCTYPE_H', 'HAVE_UNISTD_H', 'HAVE_GETOPT_H', 'HAVE_GETOPT_HEADER', 'DECL_ENVIRON', 'HAVE_ENVIRON', 'HAVE_PUTENV', 'HAVE_SETENV', 'HAVE_STRDUP', 'HAVE_SYS_TIME_SELECT', 'HAVE_GETCWD', 'HAVE_GETEGID', 'HAVE_GETEUID', 'HAVE_GETOPT', 'HAVE_GETTTYNAM', 'HAVE_LOCALECONV', 'HAVE_POLL', 'HAVE_PUTENV', 'HAVE_REMOVE', 'HAVE_SELECT', 'HAVE_SETBUF', 'HAVE_SETBUFFER', 'HAVE_SETENV', 'HAVE_SETVBUF', 'HAVE_SIGACTION', 'HAVE_STRDUP', 'HAVE_STRSTR', 'HAVE_SYSCONF', 'HAVE_TCGETPGRP', 'HAVE_TIMES', 'HAVE_TSEARCH', 'HAVE_VSNPRINTF', 'HAVE_ISASCII', 'HAVE_NANOSLEEP', 'HAVE_TERMIO_H', 'HAVE_TERMIOS_H', 'HAVE_UNISTD_H', 'HAVE_SYS_IOCTL_H', 'HAVE_TCGETATTR', 'HAVE_VSSCANF', 'HAVE_UNISTD_H', 'HAVE_MKSTEMP', 'HAVE_SIZECHANGE', 'HAVE_WORKING_POLL', 'HAVE_VA_COPY', 'HAVE_UNISTD_H', 'HAVE_FORK', 'HAVE_VFORK', 'HAVE_WORKING_VFORK', 'HAVE_WORKING_FORK', 'USE_FOPEN_BIN_R', 'USE_XTERM_PTY', 'HAVE_TYPEINFO', 'HAVE_IOSTREAM', 'IOSTREAM_NAMESPACE', 'CPP_HAS_STATIC_CAST', 'HAVE_SLK_COLOR', 'HAVE_PANEL_H', 'HAVE_LIBPANEL', 'HAVE_MENU_H', 'HAVE_LIBMENU', 'HAVE_FORM_H', 'HAVE_LIBFORM', 'NCURSES_OSPEED_COMPAT', 'HAVE_CURSES_DATA_BOOLNAMES'],
+ mappings = {'NC_CONFIG_H': '', 'PACKAGE': '"ncurses"', 'NCURSES_VERSION': '"6.2"', 'NCURSES_PATCHDATE': '20200212', 'SYSTEM_NAME': '"linux-gnu"', 'TERMINFO_DIRS': r'"\/usr\/share\/terminfo"', 'TERMINFO': r'"\/usr\/share\/terminfo"', 'RGB_PATH': r'"\/usr\/share\/X11\/rgb.txt"', 'NCURSES_WRAP_PREFIX': '"_nc_"', 'GCC_SCANFLIKE(fmt,var)': '__attribute__((format(scanf,fmt,var)))', 'GCC_PRINTFLIKE(fmt,var)': '__attribute__((format(printf,fmt,var)))', 'GCC_UNUSED': '__attribute__((unused))', 'GCC_NORETURN': '__attribute__((noreturn))', 'SIG_ATOMIC_T': 'volatile sig_atomic_t', 'USE_OPENPTY_HEADER': '', 'NCURSES_PATHSEP': "0x3a", 'NCURSES_VERSION_STRING': '"6.2.20200212"', 'mbstate_t': 'int'},
+)
+
+cc_test(
+ name = "ncurses_test",
+ srcs = ["@com_google_xls//dependency_support/net_invisible_island_ncurses:ncurses_test.cc"],
+ deps = [
+ ":ncurses",
+ ],
+)
diff --git a/dependency_support/net_invisible_island_ncurses/ncurses_test.cc b/dependency_support/net_invisible_island_ncurses/ncurses_test.cc
new file mode 100644
index 0000000000..c68e2e4911
--- /dev/null
+++ b/dependency_support/net_invisible_island_ncurses/ncurses_test.cc
@@ -0,0 +1,68 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Verifies we can compile and link something that depends
+// on ncurses, and runs a simple ncurses program.
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static char msg[] = " --- ncurses_unittest: PASS --- ";
+
+static void test_ncurses() {
+ char *term = getenv("TERM");
+ if (term == NULL || !strcmp(term, "unknown")) {
+ setenv("TERM", "vt100", 1);
+ }
+ initscr();
+ noecho();
+ cbreak();
+ nonl();
+ curs_set(0);
+
+ int c = (COLS - sizeof(msg) -1) / 2;
+ move(LINES/2, c >= 0 ? c : 0);
+
+ if (has_colors())
+ {
+ start_color();
+ init_pair(1, COLOR_RED, COLOR_BLACK);
+ init_pair(2, COLOR_GREEN, COLOR_BLACK);
+ init_pair(3, COLOR_YELLOW, COLOR_BLACK);
+ init_pair(4, COLOR_BLUE, COLOR_BLACK);
+ init_pair(5, COLOR_CYAN, COLOR_BLACK);
+ init_pair(6, COLOR_MAGENTA, COLOR_BLACK);
+ init_pair(7, COLOR_WHITE, COLOR_BLACK);
+ }
+
+ for (int n = 0; n < sizeof(msg)-1; n++)
+ {
+ addch(msg[n]);
+ attrset(COLOR_PAIR(n % 8));
+ refresh();
+ usleep(10000);
+ }
+
+ endwin();
+}
+
+int main(int argc, char **argv) {
+ test_ncurses();
+ printf("PASS\\n");
+ return 0;
+}
diff --git a/dependency_support/net_invisible_island_ncurses/workspace.bzl b/dependency_support/net_invisible_island_ncurses/workspace.bzl
new file mode 100644
index 0000000000..8ddefb71a1
--- /dev/null
+++ b/dependency_support/net_invisible_island_ncurses/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the ncurses library, used by iverilog."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "net_invisible_island_ncurses",
+ urls = [
+ "https://invisible-mirror.net/archives/ncurses/ncurses-6.2.tar.gz",
+ ],
+ strip_prefix = "ncurses-6.2",
+ sha256 = "30306e0c76e0f9f1f0de987cf1c82a5c21e1ce6568b9227f7da5b71cbea86c9d",
+ build_file = Label("//dependency_support:net_invisible_island_ncurses/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/org_gnu_bison/BUILD b/dependency_support/org_gnu_bison/BUILD
new file mode 100644
index 0000000000..2da35c1571
--- /dev/null
+++ b/dependency_support/org_gnu_bison/BUILD
@@ -0,0 +1,19 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["restricted"]) # GPLv3
+
+exports_files([
+ "calc_test.sh",
+])
diff --git a/dependency_support/org_gnu_bison/bison.bzl b/dependency_support/org_gnu_bison/bison.bzl
new file mode 100644
index 0000000000..f8e4c6fbc4
--- /dev/null
+++ b/dependency_support/org_gnu_bison/bison.bzl
@@ -0,0 +1,90 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Build rule for generating C or C++ sources with Bison.
+"""
+
+def _genyacc_impl(ctx):
+ """Implementation for genyacc rule."""
+
+ # Argument list
+ args = ctx.actions.args()
+ args.add("--defines=%s" % ctx.outputs.header_out.path)
+ args.add("--output-file=%s" % ctx.outputs.source_out.path)
+ if ctx.attr.prefix:
+ args.add("--name-prefix=%s" % ctx.attr.prefix)
+ args.add_all([ctx.expand_location(opt) for opt in ctx.attr.extra_options])
+ args.add(ctx.file.src.path)
+
+ # Output files
+ outputs = ctx.outputs.extra_outs + [
+ ctx.outputs.header_out,
+ ctx.outputs.source_out,
+ ]
+
+ ctx.actions.run(
+ executable = ctx.executable._bison,
+ env = {
+ "M4": ctx.executable._m4.path,
+ "BISON_PKGDATADIR": ctx.attr._bison_data_path.files.to_list()[0].path,
+ },
+ arguments = [args],
+ inputs = ctx.files._bison_data + ctx.files.src,
+ tools = [ctx.executable._m4],
+ outputs = outputs,
+ mnemonic = "Yacc",
+ progress_message = "Generating %s and %s from %s" %
+ (
+ ctx.outputs.source_out.short_path,
+ ctx.outputs.header_out.short_path,
+ ctx.file.src.short_path,
+ ),
+ )
+
+genyacc = rule(
+ implementation = _genyacc_impl,
+ doc = "Generate C/C++-language sources from a Yacc file using Bison.",
+ attrs = {
+ "src": attr.label(
+ mandatory = True,
+ allow_single_file = [".y", ".yy", ".yc", ".ypp"],
+ doc = "The .y, .yy, or .yc source file for this rule",
+ ),
+ "header_out": attr.output(
+ mandatory = True,
+ doc = "The generated 'defines' header file",
+ ),
+ "source_out": attr.output(mandatory = True, doc = "The generated source file"),
+ "prefix": attr.string(
+ doc = "External symbol prefix for Bison. This string is " +
+ "passed to bison as the -p option, causing the resulting C " +
+ "file to define external functions named 'prefix'parse, " +
+ "'prefix'lex, etc. instead of yyparse, yylex, etc.",
+ ),
+ "extra_outs": attr.output_list(doc = "A list of extra generated output files."),
+ "extra_options": attr.string_list(
+ doc = "A list of extra options to pass to Bison. These are " +
+ "subject to $(location ...) expansion.",
+ ),
+ "_bison": attr.label(
+ default = "@org_gnu_bison//:bison",
+ executable = True,
+ cfg = "host",
+ ),
+ "_bison_data": attr.label(default = "@org_gnu_bison//:bison_runtime_data"),
+ "_bison_data_path": attr.label(default = "@org_gnu_bison//:data", allow_single_file = True),
+ "_m4": attr.label(default = "@org_gnu_m4//:m4", executable = True, cfg = "host"),
+ },
+ output_to_genfiles = True,
+)
diff --git a/dependency_support/org_gnu_bison/bundled.BUILD.bazel b/dependency_support/org_gnu_bison/bundled.BUILD.bazel
new file mode 100644
index 0000000000..790dfed7c6
--- /dev/null
+++ b/dependency_support/org_gnu_bison/bundled.BUILD.bazel
@@ -0,0 +1,278 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+package(default_visibility = ["//visibility:private"])
+
+licenses(["restricted"])
+
+load("@com_google_xls//dependency_support:copy.bzl", "copy", "touch")
+load("@com_google_xls//dependency_support/org_gnu_bison:bison.bzl", "genyacc")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+exports_files(["LICENSE"])
+
+PKG_DATA_DIR = "./data"
+
+# TODO(xls-team): Make the locale files be generated correctly
+LOCALE_DIR = "/dev/null"
+
+cc_library(
+ name = "libbison",
+ srcs = [
+ "lib/allocator.c",
+ "lib/areadlink.c",
+ "lib/argmatch.c",
+ "lib/asnprintf.c",
+ "lib/asprintf.c",
+ "lib/basename.c",
+ "lib/basename-lgpl.c",
+ "lib/binary-io.c",
+ "lib/bitrotate.c",
+ "lib/bitset.c",
+ "lib/bitset/array.c",
+ "lib/bitset/list.c",
+ "lib/bitset/stats.c",
+ "lib/bitset/table.c",
+ "lib/bitset/vector.c",
+ "lib/bitsetv.c",
+ "lib/c-ctype.c",
+ "lib/c-strcasecmp.c",
+ "lib/c-strncasecmp.c",
+ "lib/cloexec.c",
+ "lib/close-stream.c",
+ "lib/closeout.c",
+ "lib/concat-filename.c",
+ "lib/dirname.c",
+ "lib/dirname-lgpl.c",
+ "lib/dup-safer.c",
+ "lib/dup-safer-flag.c",
+ "lib/exitfail.c",
+ "lib/fatal-signal.c",
+ "lib/fd-hook.c",
+ "lib/fd-safer.c",
+ "lib/fd-safer-flag.c",
+ "lib/fopen-safer.c",
+ "lib/fstrcmp.c",
+ "lib/get-errno.c",
+ "lib/gethrxtime.c",
+ "lib/getprogname.c",
+ "lib/gettime.c",
+ "lib/gl_array_list.c",
+ "lib/gl_list.c",
+ "lib/gl_xlist.c",
+ "lib/glthread/lock.c",
+ "lib/glthread/threadlib.c",
+ "lib/glthread/tls.c",
+ "lib/hard-locale.c",
+ "lib/hash.c",
+ "lib/iswblank.c",
+ "lib/localcharset.c",
+ "lib/localtime-buffer.c",
+ "lib/math.c",
+ "lib/mbchar.c",
+ "lib/mbfile.c",
+ "lib/mbrtowc.c",
+ "lib/mbswidth.c",
+ "lib/path-join.c",
+ "lib/pipe-safer.c",
+ "lib/pipe2.c",
+ "lib/pipe2-safer.c",
+ "lib/printf-args.c",
+ "lib/printf-frexpl.c",
+ "lib/printf-parse.c",
+ "lib/progname.c",
+ "lib/progreloc.c",
+ "lib/quotearg.c",
+ "lib/readlink.c",
+ "lib/relocatable.c",
+ "lib/rename.c",
+ "lib/rmdir.c",
+ "lib/setenv.c",
+ "lib/sig-handler.c",
+ "lib/spawn-pipe.c",
+ "lib/stripslash.c",
+ "lib/timespec.c",
+ "lib/timevar.c",
+ "lib/unistd.c",
+ "lib/vasnprintf.c",
+ "lib/vasprintf.c",
+ "lib/wait-process.c",
+ "lib/wctype-h.c",
+ "lib/xalloc-die.c",
+ "lib/xconcat-filename.c",
+ "lib/xhash.c",
+ "lib/xmalloc.c",
+ "lib/xmemdup0.c",
+ "lib/xreadlink.c",
+ "lib/xsize.c",
+ "lib/xstrndup.c",
+ "lib/xtime.c",
+ ],
+ copts = [
+ "-Wno-vla",
+ "-Wno-maybe-uninitialized",
+ "-DHAVE_CONFIG_H",
+ # These are defined in gnulib's fcntl.h, but they're the only thing we
+ # need from gnulib, so we define them here instead for simplicity.
+ "-DO_BINARY=0",
+ "-DO_TEXT=0",
+ ],
+ includes = [
+ ".",
+ "lib",
+ ],
+ textual_hdrs =
+ glob(
+ ["lib/**/*.h"],
+ ) + [
+ "lib/config.h",
+ "lib/configmake.h",
+ "lib/printf-frexp.c",
+ "lib/timevar.def",
+ "src/system.h",
+ "lib/textstyle.h",
+ ],
+)
+
+# In order to use bison properly in a shell command, set the env variable
+# BISON_PKGDATADIR=[workspace dir]/bison/data in any shell command you invoke
+# bison in. If you use the genyacc rule, Bazel should do this for for you.
+# You will also need to set M4 to the location of m4, which is
+# generally $(location @org_gnu_m4//:m4) in a Bazel genrule.
+
+filegroup(
+ name = "bison_runtime_data",
+ srcs = glob(["data/**/*"]),
+ output_licenses = ["unencumbered"],
+ path = "data",
+ visibility = ["//visibility:public"],
+)
+
+exports_files([
+ "data",
+])
+
+cc_library(
+ name = "bison_src_headers",
+ textual_hdrs = glob(["src/*.h"]) + [
+ "src/scan-skel.c",
+ "src/scan-gram.c",
+ "src/scan-code.c",
+ ],
+)
+
+# Note: This target is used by the Bazel "genyacc" rule, as well as by the
+# explictly-declared dependencies.
+cc_binary(
+ name = "bison",
+ srcs = [
+ "src/AnnotationList.c",
+ "src/InadequacyList.c",
+ "src/Sbitset.c",
+ "src/assoc.c",
+ "src/closure.c",
+ "src/complain.c",
+ "src/conflicts.c",
+ "src/derives.c",
+ "src/files.c",
+ "src/fixits.c",
+ "src/getargs.c",
+ "src/gram.c",
+ "src/graphviz.c",
+ "src/ielr.c",
+ "src/lalr.c",
+ "src/location.c",
+ "src/lr0.c",
+ "src/main.c",
+ "src/muscle-tab.c",
+ "src/named-ref.c",
+ "src/nullable.c",
+ "src/output.c",
+ "src/parse-gram.c",
+ "src/print.c",
+ "src/print-graph.c",
+ "src/print-xml.c",
+ "src/reader.c",
+ "src/reduce.c",
+ "src/relation.c",
+ "src/scan-code-c.c",
+ "src/scan-gram-c.c",
+ "src/scan-skel-c.c",
+ "src/state.c",
+ "src/symlist.c",
+ "src/symtab.c",
+ "src/tables.c",
+ "src/uniqstr.c",
+ ],
+ copts = [
+ "-Wno-vla",
+ "-DHAVE_CONFIG_H",
+ "-DPKGDATADIR='\"" + PKG_DATA_DIR + "\"'",
+ "-DLOCALEDIR='\"" + LOCALE_DIR + "\"'",
+ # This is defined in gnulib's stdio.h, but we don't need anything else
+ # from that file.
+ "-D_GL_ATTRIBUTE_FORMAT_PRINTF(A,B)=",
+ ],
+ data = [":bison_runtime_data"],
+ output_licenses = ["unencumbered"],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":bison_src_headers",
+ ":libbison",
+ ],
+)
+
+copy(
+ name = "textstyle_h",
+ src = "lib/textstyle.in.h",
+ out = "lib/textstyle.h",
+)
+
+pseudo_configure(
+ name = "config_h",
+ src = "lib/config.in.h",
+ out = "lib/config.h",
+ defs = ['CHECK_PRINTF_SAFE', 'C_LOCALE_MAYBE_EILSEQ', 'DBL_EXPBIT0_WORD', 'ENABLE_NLS', 'FUNC_REALPATH_WORKS', 'GNULIB_CANONICALIZE_LGPL', 'GNULIB_CLOSE_STREAM', 'GNULIB_DIRNAME', 'GNULIB_FD_SAFER_FLAG', 'GNULIB_FOPEN_SAFER', 'GNULIB_FSCANF', 'GNULIB_MALLOC_GNU', 'GNULIB_MSVC_NOTHROW', 'GNULIB_PIPE2_SAFER', 'GNULIB_SCANF', 'GNULIB_SNPRINTF', 'GNULIB_STRERROR', 'GNULIB_TEST_CALLOC_POSIX', 'GNULIB_TEST_CANONICALIZE_FILE_NAME', 'GNULIB_TEST_CLOEXEC', 'GNULIB_TEST_CLOSE', 'GNULIB_TEST_DUP2', 'GNULIB_TEST_ENVIRON', 'GNULIB_TEST_FCNTL', 'GNULIB_TEST_FOPEN', 'GNULIB_TEST_FPRINTF_POSIX', 'GNULIB_TEST_FSYNC', 'GNULIB_TEST_GETDTABLESIZE', 'GNULIB_TEST_GETRUSAGE', 'GNULIB_TEST_GETTIMEOFDAY', 'GNULIB_TEST_ISNAN', 'GNULIB_TEST_ISNAND', 'GNULIB_TEST_ISNANF', 'GNULIB_TEST_ISNANL', 'GNULIB_TEST_ISWBLANK', 'GNULIB_TEST_LDEXPL', 'GNULIB_TEST_MALLOC_POSIX', 'GNULIB_TEST_MBRTOWC', 'GNULIB_TEST_MBSINIT', 'GNULIB_TEST_MEMCHR', 'GNULIB_TEST_OBSTACK_PRINTF', 'GNULIB_TEST_OPEN', 'GNULIB_TEST_PERROR', 'GNULIB_TEST_PIPE2', 'GNULIB_TEST_POSIX_SPAWNATTR_DESTROY', 'GNULIB_TEST_POSIX_SPAWNATTR_INIT', 'GNULIB_TEST_POSIX_SPAWNATTR_SETFLAGS', 'GNULIB_TEST_POSIX_SPAWNATTR_SETSIGMASK', 'GNULIB_TEST_POSIX_SPAWNP', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDCLOSE', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDDUP2', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDOPEN', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_DESTROY', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_INIT', 'GNULIB_TEST_PRINTF_POSIX', 'GNULIB_TEST_RAISE', 'GNULIB_TEST_READLINK', 'GNULIB_TEST_REALLOC_POSIX', 'GNULIB_TEST_REALPATH', 'GNULIB_TEST_RENAME', 'GNULIB_TEST_SIGACTION', 'GNULIB_TEST_SIGPROCMASK', 'GNULIB_TEST_SNPRINTF', 'GNULIB_TEST_SPRINTF_POSIX', 'GNULIB_TEST_STPCPY', 'GNULIB_TEST_STRDUP', 'GNULIB_TEST_STRERROR', 'GNULIB_TEST_STRNDUP', 'GNULIB_TEST_STRVERSCMP', 'GNULIB_TEST_UNLINK', 'GNULIB_TEST_UNSETENV', 'GNULIB_TEST_VASPRINTF', 'GNULIB_TEST_VSNPRINTF', 'GNULIB_TEST_VSPRINTF_POSIX', 'GNULIB_TEST_WAITPID', 'GNULIB_TEST_WCWIDTH', 'GWINSZ_IN_SYS_IOCTL', 'HAVE_ALLOCA', 'HAVE_ALLOCA_H', 'HAVE_CALLOC_POSIX', 'HAVE_CANONICALIZE_FILE_NAME', 'HAVE_CATGETS', 'HAVE_CLOCK_GETTIME', 'HAVE_CLOCK_SETTIME', 'HAVE_DCGETTEXT', 'HAVE_DECL_ALARM', 'HAVE_DECL_CLEARERR_UNLOCKED', 'HAVE_DECL_FEOF_UNLOCKED', 'HAVE_DECL_FERROR_UNLOCKED', 'HAVE_DECL_FFLUSH_UNLOCKED', 'HAVE_DECL_FGETS_UNLOCKED', 'HAVE_DECL_FPUTC_UNLOCKED', 'HAVE_DECL_FPUTS_UNLOCKED', 'HAVE_DECL_FREAD_UNLOCKED', 'HAVE_DECL_FWRITE_UNLOCKED', 'HAVE_DECL_GETCHAR_UNLOCKED', 'HAVE_DECL_GETC_UNLOCKED', 'HAVE_DECL_GETDTABLESIZE', 'HAVE_DECL_ISWBLANK', 'HAVE_DECL_OBSTACK_PRINTF', 'HAVE_DECL_PROGRAM_INVOCATION_NAME', 'HAVE_DECL_PROGRAM_INVOCATION_SHORT_NAME', 'HAVE_DECL_PUTCHAR_UNLOCKED', 'HAVE_DECL_PUTC_UNLOCKED', 'HAVE_DECL_SETENV', 'HAVE_DECL_SNPRINTF', 'HAVE_DECL_STRDUP', 'HAVE_DECL_STRERROR_R', 'HAVE_DECL_STRNDUP', 'HAVE_DECL_STRNLEN', 'HAVE_DECL_UNSETENV', 'HAVE_DECL_VSNPRINTF', 'HAVE_DECL_WCWIDTH', 'HAVE_DECL___FPENDING', 'HAVE_DUP2', 'HAVE_ENVIRON_DECL', 'HAVE_FCNTL', 'HAVE_FEATURES_H', 'HAVE_FREXP_IN_LIBC', 'HAVE_FSYNC', 'HAVE_GETCWD', 'HAVE_GETDTABLESIZE', 'HAVE_GETOPT_H', 'HAVE_GETOPT_LONG_ONLY', 'HAVE_GETRUSAGE', 'HAVE_GETTEXT', 'HAVE_GETTIMEOFDAY', 'HAVE_INTMAX_T', 'HAVE_INTTYPES_H', 'HAVE_INTTYPES_H_WITH_UINTMAX', 'HAVE_ISASCII', 'HAVE_ISNAND_IN_LIBC', 'HAVE_ISNANF_IN_LIBC', 'HAVE_ISWBLANK', 'HAVE_ISWCNTRL', 'HAVE_LANGINFO_CODESET', 'HAVE_LDEXPL', 'HAVE_LIMITS_H', 'HAVE_LINK', 'HAVE_LOCALE_H', 'HAVE_LONG_LONG_INT', 'HAVE_LSTAT', 'HAVE_MALLOC_GNU', 'HAVE_MALLOC_POSIX', 'HAVE_MAP_ANONYMOUS', 'HAVE_MATH_H', 'HAVE_MBRTOWC', 'HAVE_MBSINIT', 'HAVE_MBSTATE_T', 'HAVE_MEMORY_H', 'HAVE_MINMAX_IN_SYS_PARAM_H', 'HAVE_MPROTECT', 'HAVE_OBSTACK_PRINTF', 'HAVE_PIPE', 'HAVE_PIPE2', 'HAVE_POSIX_SPAWN', 'HAVE_POSIX_SPAWNATTR_T', 'HAVE_POSIX_SPAWN_FILE_ACTIONS_T', 'HAVE_RAISE', 'HAVE_READLINK', 'HAVE_READLINKAT', 'HAVE_REALLOC_POSIX', 'HAVE_REALPATH', 'HAVE_SEARCH_H', 'HAVE_SETENV', 'HAVE_SETLOCALE', 'HAVE_SIGACTION', 'HAVE_SIGALTSTACK', 'HAVE_SIGINTERRUPT', 'HAVE_SIGSET_T', 'HAVE_SIG_ATOMIC_T', 'HAVE_SNPRINTF', 'HAVE_SNPRINTF_RETVAL_C99', 'HAVE_SPAWN_H', 'HAVE_STDINT_H', 'HAVE_STDINT_H_WITH_UINTMAX', 'HAVE_STDIO_EXT_H', 'HAVE_STDLIB_H', 'HAVE_STPCPY', 'HAVE_STRDUP', 'HAVE_STRERROR_R', 'HAVE_STRINGS_H', 'HAVE_STRING_H', 'HAVE_STRNDUP', 'HAVE_STRNLEN', 'HAVE_STRUCT_SIGACTION_SA_SIGACTION', 'HAVE_STRUCT_TMS', 'HAVE_STRVERSCMP', 'HAVE_SYMLINK', 'HAVE_SYS_CDEFS_H', 'HAVE_SYS_MMAN_H', 'HAVE_SYS_PARAM_H', 'HAVE_SYS_RESOURCE_H', 'HAVE_SYS_SOCKET_H', 'HAVE_SYS_STAT_H', 'HAVE_SYS_TIMES_H', 'HAVE_SYS_TIME_H', 'HAVE_SYS_TYPES_H', 'HAVE_SYS_WAIT_H', 'HAVE_TCDRAIN', 'HAVE_TOWLOWER', 'HAVE_TSEARCH', 'HAVE_UNISTD_H', 'HAVE_UNSETENV', 'HAVE_UNSIGNED_LONG_LONG_INT', 'HAVE_VASPRINTF', 'HAVE_VSNPRINTF', 'HAVE_WAITID', 'HAVE_WCHAR_H', 'HAVE_WCHAR_T', 'HAVE_WCRTOMB', 'HAVE_WCSLEN', 'HAVE_WCSNLEN', 'HAVE_WCTYPE_H', 'HAVE_WCWIDTH', 'HAVE_WINT_T', 'HAVE_WORKING_O_NOATIME', 'HAVE_WORKING_O_NOFOLLOW', 'HAVE__BOOL', 'HAVE___XPG_STRERROR_R', 'LSTAT_FOLLOWS_SLASHED_SYMLINK', 'MALLOC_0_IS_NONNULL', '__USE_MINGW_ANSI_STDIO', 'STDC_HEADERS', 'STRERROR_R_CHAR_P', 'USE_POSIX_THREADS', 'USE_POSIX_THREADS_WEAK', '_ALL_SOURCE', '_DARWIN_C_SOURCE', '_GNU_SOURCE', '_NETBSD_SOURCE', '_OPENBSD_SOURCE', '_POSIX_PTHREAD_SEMANTICS', '__STDC_WANT_IEC_60559_ATTRIBS_EXT__', '__STDC_WANT_IEC_60559_BFP_EXT__', '__STDC_WANT_IEC_60559_DFP_EXT__', '__STDC_WANT_IEC_60559_FUNCS_EXT__', '__STDC_WANT_IEC_60559_TYPES_EXT__', '__STDC_WANT_LIB_EXT2__', '__STDC_WANT_MATH_SPEC_FUNCS__', '_TANDEM_SOURCE', '_HPUX_ALT_XOPEN_SOCKET_API', '__EXTENSIONS__', 'USE_UNLOCKED_IO', 'WORDS_BIGENDIAN', '_DARWIN_USE_64_BIT_INODE', '_NETBSD_SOURCE', '_USE_STD_STAT', '__GNUC_STDC_INLINE__'],
+ mappings = {'DBL_EXPBIT0_BIT': '20', 'FLT_EXPBIT0_BIT': '23', 'FLT_EXPBIT0_WORD': '0', 'GETTIMEOFDAY_TIMEZONE': 'struct timezone', 'HAVE_DECL_GETHRTIME': '0', 'HAVE_DECL_MBSWIDTH_IN_WCHAR_H': '0', 'HAVE_DECL__SNPRINTF': '0', 'HAVE_DECL___ARGV': '0', 'INSTALLPREFIX': r'"\/usr\/local"', 'M4': r'"\/usr\/bin\/m4"', 'M4_GNU_OPTION': '""', 'PACKAGE': '"bison"', 'PACKAGE_BUGREPORT': '"bug-bison@gnu.org"', 'PACKAGE_COPYRIGHT_YEAR': '2019', 'PACKAGE_NAME': '"GNU Bison"', 'PACKAGE_STRING': '"GNU Bison 3.5"', 'PACKAGE_TARNAME': '"bison"', 'PACKAGE_URL': r'"http:\/\/www.gnu.org\/software\/bison\/"', 'PACKAGE_VERSION': '"3.5"', 'PROMOTED_MODE_T': 'mode_t', 'BOURNE_SHELL': r'"\/bin\/sh"', 'USER_LABEL_PREFIX': '', 'VERSION': '"3.5"', '_Noreturn': '', '_GL_ASYNC_SAFE': '', '_GL_EXTERN_INLINE_STDHEADER_BUG': '', '_GL_INLINE': 'static _GL_UNUSED', '_GL_EXTERN_INLINE': 'static _GL_UNUSED', '_GL_EXTERN_INLINE_IN_USE': '', '_GL_INLINE_HEADER_CONST_PRAGMA': '', '_GL_INLINE_HEADER_BEGIN': '', '_GL_INLINE_HEADER_END': '', 'restrict': '__restrict', '_Restrict': '', '__restrict__': '', '_GL_UNUSED': '', '_UNUSED_PARAMETER_': '_GL_UNUSED', '_GL_UNUSED_LABEL': '', '_GL_ATTRIBUTE_PURE': '', '_GL_ATTRIBUTE_CONST': '', '_GL_ATTRIBUTE_MALLOC': ''},
+)
+
+touch(
+ name = "configmake_h",
+ out = "lib/configmake.h",
+ contents = dict(
+ LIBDIR = '"/usr/local/lib"',
+ ),
+)
+
+# Compile one of the examples and use that as a basic smoke test.
+genyacc(
+ name = "calc_y",
+ src = "examples/c/calc/calc.y",
+ header_out = "calc.h",
+ source_out = "calc.cc",
+)
+
+cc_binary(
+ name = "calc",
+ srcs = ["calc.cc", "calc.h"],
+)
+
+sh_test(
+ name = "calc_test",
+ srcs = ["@com_google_xls//dependency_support/org_gnu_bison:calc_test.sh"],
+ args = ["$(location :calc)"],
+ data = [
+ ":calc",
+ ],
+)
diff --git a/dependency_support/org_gnu_bison/calc_test.sh b/dependency_support/org_gnu_bison/calc_test.sh
new file mode 100755
index 0000000000..6deffb06c7
--- /dev/null
+++ b/dependency_support/org_gnu_bison/calc_test.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+RESULT=$(echo "21*2" | $1)
+
+if [ "$RESULT" == "42" ]; then
+ echo "Success"
+else
+ >&2 echo "Encountered unexpected result $RESULT"
+ exit 1
+fi
diff --git a/dependency_support/org_gnu_bison/workspace.bzl b/dependency_support/org_gnu_bison/workspace.bzl
new file mode 100644
index 0000000000..294d89872b
--- /dev/null
+++ b/dependency_support/org_gnu_bison/workspace.bzl
@@ -0,0 +1,31 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the Bison parser generator, used by iverilog."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "org_gnu_bison",
+ urls = [
+ "http://ftp.acc.umu.se/mirror/gnu.org/gnu/bison/bison-3.5.tar.xz",
+ "http://ftp.gnu.org/gnu/bison/bison-3.5.tar.xz",
+ ],
+ strip_prefix = "bison-3.5",
+ sha256 = "55e4a023b1b4ad19095a5f8279f0dc048fa29f970759cea83224a6d5e7a3a641",
+ build_file = Label("//dependency_support:org_gnu_bison/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/org_gnu_gperf/BUILD b/dependency_support/org_gnu_gperf/BUILD
new file mode 100644
index 0000000000..e617bd6d6f
--- /dev/null
+++ b/dependency_support/org_gnu_gperf/BUILD
@@ -0,0 +1,15 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["restricted"]) # GPLv3
diff --git a/dependency_support/org_gnu_gperf/bundled.BUILD.bazel b/dependency_support/org_gnu_gperf/bundled.BUILD.bazel
new file mode 100644
index 0000000000..395935dd6e
--- /dev/null
+++ b/dependency_support/org_gnu_gperf/bundled.BUILD.bazel
@@ -0,0 +1,58 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description:
+# A BUILD file for gperf, a perfect hash function generator.
+
+licenses(["restricted"]) # GPLv3
+
+load("@com_google_xls//dependency_support:copy.bzl", "copy")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+exports_files(["COPYING"])
+
+cc_library(
+ name = "gperf_includes",
+ textual_hdrs = glob([
+ "src/*.icc",
+ ]),
+)
+
+cc_binary(
+ name = "gperf",
+ srcs = glob([
+ "lib/*.cc",
+ "lib/*.h",
+ "src/*.cc",
+ "src/*.h",
+ ]) + [
+ "src/config.h",
+ ],
+ deps = [":gperf_includes"],
+ includes = ["lib", "src"],
+ copts = [
+ "-Wno-register",
+ "-Wno-strict-aliasing",
+ ],
+ output_licenses = ["unencumbered"],
+ visibility = ["//visibility:public"],
+)
+
+pseudo_configure(
+ name = "config_h",
+ src = "src/config.h.in",
+ out = "src/config.h",
+ defs = [],
+ mappings = {'HAVE_DYNAMIC_ARRAY': '0', 'PACKAGE_BUGREPORT': '""', 'PACKAGE_NAME': '""', 'PACKAGE_STRING': '""', 'PACKAGE_TARNAME': '""', 'PACKAGE_VERSION': '""'},
+)
diff --git a/dependency_support/org_gnu_gperf/workspace.bzl b/dependency_support/org_gnu_gperf/workspace.bzl
new file mode 100644
index 0000000000..627e6de875
--- /dev/null
+++ b/dependency_support/org_gnu_gperf/workspace.bzl
@@ -0,0 +1,31 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the gperf perfect hash function generator, used by iverilog."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "org_gnu_gperf",
+ urls = [
+ "http://ftp.acc.umu.se/mirror/gnu.org/gnu/gperf/gperf-3.1.tar.gz",
+ "http://ftp.gnu.org/gnu/gperf/gperf-3.1.tar.gz",
+ ],
+ strip_prefix = "gperf-3.1",
+ sha256 = "588546b945bba4b70b6a3a616e80b4ab466e3f33024a352fc2198112cdbb3ae2",
+ build_file = Label("//dependency_support:org_gnu_gperf/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/org_gnu_m4/BUILD b/dependency_support/org_gnu_m4/BUILD
new file mode 100644
index 0000000000..e617bd6d6f
--- /dev/null
+++ b/dependency_support/org_gnu_m4/BUILD
@@ -0,0 +1,15 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+licenses(["restricted"]) # GPLv3
diff --git a/dependency_support/org_gnu_m4/bundled.BUILD.bazel b/dependency_support/org_gnu_m4/bundled.BUILD.bazel
new file mode 100644
index 0000000000..7ab7c4e781
--- /dev/null
+++ b/dependency_support/org_gnu_m4/bundled.BUILD.bazel
@@ -0,0 +1,122 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description:
+# A BUILD file for m4 based on FSF stock source.
+
+load("@com_google_xls//dependency_support:copy.bzl", "copy", "touch")
+load("@com_google_xls//dependency_support:pseudo_configure.bzl", "pseudo_configure")
+
+package(
+ default_visibility = ["//visibility:public"],
+ features = [
+ "-parse_headers",
+ "no_layering_check",
+ ],
+)
+
+licenses(["restricted"]) # GPLv3
+
+exports_files(["COPYING"])
+
+HEADERS_WITH_C_EXTENSION = [
+ "lib/frexp.c",
+ "lib/isnan.c",
+ "lib/printf-frexp.c",
+]
+
+cc_library(
+ name = "m4_headers",
+ textual_hdrs = glob(
+ ["lib/**/*.h", "src/*.h"],
+ exclude = ["lib/spawn_int.h"]
+ ) + [
+ "lib/config.h",
+ "lib/configmake.h",
+ "build-aux/snippet/unused-parameter.h",
+ ] + HEADERS_WITH_C_EXTENSION,
+ includes = ["lib", "build-aux/snippet"],
+ visibility = ["//visibility:private"],
+)
+
+cc_binary(
+ name = "m4",
+ srcs = glob(
+ ["lib/*.c", "src/*.c"],
+ exclude = HEADERS_WITH_C_EXTENSION + [
+ "lib/msvc-nothrow.c",
+ "lib/fcntl.c",
+ "lib/fflush.c",
+ "lib/fpending.c",
+ "lib/frexpl.c",
+ "lib/fseeko.c",
+ "lib/gettimeofday.c",
+ "lib/localeconv.c",
+ "lib/nl_langinfo.c",
+ "lib/pipe2.c",
+ "lib/regcomp.c",
+ "lib/regex.c",
+ "lib/regexec.c",
+ "lib/regex_internal.c",
+ "lib/sigaction.c",
+ "lib/sigprocmask.c",
+ "lib/snprintf.c",
+ "lib/spawn_faction_destroy.c",
+ "lib/spawn_faction_init.c",
+ "lib/spawnattr_setflags.c",
+ "lib/spawnattr_setsigmask.c",
+ "lib/spawni.c",
+ "lib/spawnp.c",
+ "lib/strchrnul.c",
+ "lib/strerror-override.c",
+ "lib/waitpid.c",
+ ],
+ ),
+ deps = [
+ ":m4_headers",
+ ],
+ output_licenses = ["unencumbered"],
+ defines = [
+ "_IO_ftrylockfile",
+ # Glibc 2.28 made _IO_IN_BACKUP private. For now, work around this
+ # problem by defining it ourselves. FIXME: Do not rely on glibc
+ # internals.
+ "_IO_IN_BACKUP=0x100",
+ "_GNU_SOURCE",
+ "O_BINARY=0",
+ ],
+ copts = [
+ "-Wno-attributes",
+ ],
+)
+
+pseudo_configure(
+ name = "config_h",
+ src = "lib/config.hin",
+ out = "lib/config.h",
+ defs = ['CHECK_PRINTF_SAFE', 'C_LOCALE_MAYBE_EILSEQ', 'DBL_EXPBIT0_WORD', 'FUNC_NL_LANGINFO_YESEXPR_WORKS', 'FUNC_REALPATH_WORKS', 'GNULIB_CANONICALIZE_LGPL', 'GNULIB_CLOSE_STREAM', 'GNULIB_DIRNAME', 'GNULIB_FD_SAFER_FLAG', 'GNULIB_FFLUSH', 'GNULIB_FILENAMECAT', 'GNULIB_FOPEN_SAFER', 'GNULIB_FSCANF', 'GNULIB_LOCK', 'GNULIB_PIPE2_SAFER', 'GNULIB_SCANF', 'GNULIB_SIGPIPE', 'GNULIB_SNPRINTF', 'GNULIB_STRERROR', 'GNULIB_TEST_BTOWC', 'GNULIB_TEST_CANONICALIZE_FILE_NAME', 'GNULIB_TEST_CHDIR', 'GNULIB_TEST_CLOEXEC', 'GNULIB_TEST_CLOSE', 'GNULIB_TEST_CLOSEDIR', 'GNULIB_TEST_DIRFD', 'GNULIB_TEST_DUP', 'GNULIB_TEST_DUP2', 'GNULIB_TEST_ENVIRON', 'GNULIB_TEST_FCLOSE', 'GNULIB_TEST_FCNTL', 'GNULIB_TEST_FDOPEN', 'GNULIB_TEST_FFLUSH', 'GNULIB_TEST_FOPEN', 'GNULIB_TEST_FPURGE', 'GNULIB_TEST_FREXP', 'GNULIB_TEST_FREXPL', 'GNULIB_TEST_FSEEK', 'GNULIB_TEST_FSEEKO', 'GNULIB_TEST_FSTAT', 'GNULIB_TEST_FTELL', 'GNULIB_TEST_FTELLO', 'GNULIB_TEST_GETCWD', 'GNULIB_TEST_GETDTABLESIZE', 'GNULIB_TEST_GETPAGESIZE', 'GNULIB_TEST_GETTIMEOFDAY', 'GNULIB_TEST_LINK', 'GNULIB_TEST_LOCALECONV', 'GNULIB_TEST_LSEEK', 'GNULIB_TEST_LSTAT', 'GNULIB_TEST_MALLOC_POSIX', 'GNULIB_TEST_MBRTOWC', 'GNULIB_TEST_MBSINIT', 'GNULIB_TEST_MBTOWC', 'GNULIB_TEST_MEMCHR', 'GNULIB_TEST_MKDTEMP', 'GNULIB_TEST_MKSTEMP', 'GNULIB_TEST_NL_LANGINFO', 'GNULIB_TEST_OPEN', 'GNULIB_TEST_OPENDIR', 'GNULIB_TEST_PIPE2', 'GNULIB_TEST_POSIX_SPAWNATTR_DESTROY', 'GNULIB_TEST_POSIX_SPAWNATTR_INIT', 'GNULIB_TEST_POSIX_SPAWNATTR_SETFLAGS', 'GNULIB_TEST_POSIX_SPAWNATTR_SETSIGMASK', 'GNULIB_TEST_POSIX_SPAWNP', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDCLOSE', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDDUP2', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_ADDOPEN', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_DESTROY', 'GNULIB_TEST_POSIX_SPAWN_FILE_ACTIONS_INIT', 'GNULIB_TEST_PUTENV', 'GNULIB_TEST_RAISE', 'GNULIB_TEST_RAWMEMCHR', 'GNULIB_TEST_READDIR', 'GNULIB_TEST_READLINK', 'GNULIB_TEST_REALPATH', 'GNULIB_TEST_RENAME', 'GNULIB_TEST_RMDIR', 'GNULIB_TEST_SECURE_GETENV', 'GNULIB_TEST_SETENV', 'GNULIB_TEST_SETLOCALE', 'GNULIB_TEST_SIGACTION', 'GNULIB_TEST_SIGNBIT', 'GNULIB_TEST_SIGPROCMASK', 'GNULIB_TEST_SLEEP', 'GNULIB_TEST_SNPRINTF', 'GNULIB_TEST_STAT', 'GNULIB_TEST_STRCHRNUL', 'GNULIB_TEST_STRDUP', 'GNULIB_TEST_STRERROR', 'GNULIB_TEST_STRNDUP', 'GNULIB_TEST_STRNLEN', 'GNULIB_TEST_STRSIGNAL', 'GNULIB_TEST_STRSTR', 'GNULIB_TEST_STRTOD', 'GNULIB_TEST_SYMLINK', 'GNULIB_TEST_UNSETENV', 'GNULIB_TEST_VASPRINTF', 'GNULIB_TEST_WAITPID', 'GNULIB_TEST_WCRTOMB', 'GNULIB_TEST_WCTOB', 'GNULIB_TEST_WCTOMB', 'GNULIB_TEST_WRITE', 'HAVE_ALLOCA', 'HAVE_ALLOCA_H', 'HAVE_BTOWC', 'HAVE_CANONICALIZE_FILE_NAME', 'HAVE_CLOSEDIR', 'HAVE_DECL_ALARM', 'HAVE_DECL_CLEARERR_UNLOCKED', 'HAVE_DECL_DIRFD', 'HAVE_DECL_FEOF_UNLOCKED', 'HAVE_DECL_FERROR_UNLOCKED', 'HAVE_DECL_FFLUSH_UNLOCKED', 'HAVE_DECL_FGETS_UNLOCKED', 'HAVE_DECL_FPUTC_UNLOCKED', 'HAVE_DECL_FPUTS_UNLOCKED', 'HAVE_DECL_FREAD_UNLOCKED', 'HAVE_DECL_FSEEKO', 'HAVE_DECL_FTELLO', 'HAVE_DECL_FWRITE_UNLOCKED', 'HAVE_DECL_GETCHAR_UNLOCKED', 'HAVE_DECL_GETC_UNLOCKED', 'HAVE_DECL_GETDTABLESIZE', 'HAVE_DECL_GETENV', 'HAVE_DECL_PROGRAM_INVOCATION_NAME', 'HAVE_DECL_PROGRAM_INVOCATION_SHORT_NAME', 'HAVE_DECL_PUTCHAR_UNLOCKED', 'HAVE_DECL_PUTC_UNLOCKED', 'HAVE_DECL_SETENV', 'HAVE_DECL_SIGALTSTACK', 'HAVE_DECL_SLEEP', 'HAVE_DECL_SNPRINTF', 'HAVE_DECL_STRDUP', 'HAVE_DECL_STRERROR_R', 'HAVE_DECL_STRNDUP', 'HAVE_DECL_STRNLEN', 'HAVE_DECL_STRSIGNAL', 'HAVE_DECL_SYS_SIGLIST', 'HAVE_DECL_UNSETENV', 'HAVE_DECL_WCTOB', 'HAVE_DECL___FPENDING', 'HAVE_DIRENT_H', 'HAVE_DIRFD', 'HAVE_DUP2', 'HAVE_ENVIRON_DECL', 'HAVE_FCNTL', 'HAVE_FEATURES_H', 'HAVE_FREXPL_IN_LIBC', 'HAVE_FREXP_IN_LIBC', 'HAVE_FSEEKO', 'HAVE_GETCWD', 'HAVE_GETDTABLESIZE', 'HAVE_GETEGID', 'HAVE_GETEUID', 'HAVE_GETGID', 'HAVE_GETOPT_H', 'HAVE_GETOPT_LONG_ONLY', 'HAVE_GETPAGESIZE', 'HAVE_GETTIMEOFDAY', 'HAVE_GETUID', 'HAVE_INTMAX_T', 'HAVE_INTTYPES_H', 'HAVE_INTTYPES_H_WITH_UINTMAX', 'HAVE_ISBLANK', 'HAVE_ISNAND_IN_LIBC', 'HAVE_ISNANF_IN_LIBC', 'HAVE_ISNANL_IN_LIBC', 'HAVE_ISWCNTRL', 'HAVE_ISWCTYPE', 'HAVE_LANGINFO_CODESET', 'HAVE_LANGINFO_H', 'HAVE_LC_MESSAGES', 'HAVE_LDEXPL_IN_LIBC', 'HAVE_LDEXP_IN_LIBC', 'HAVE_LIMITS_H', 'HAVE_LINK', 'HAVE_LONG_LONG_INT', 'HAVE_LSTAT', 'HAVE_MALLOC_H', 'HAVE_MALLOC_POSIX', 'HAVE_MAP_ANONYMOUS', 'HAVE_MATH_H', 'HAVE_MBRTOWC', 'HAVE_MBSINIT', 'HAVE_MBSTATE_T', 'HAVE_MEMORY_H', 'HAVE_MEMPCPY', 'HAVE_MINMAX_IN_SYS_PARAM_H', 'HAVE_MKDTEMP', 'HAVE_MKSTEMP', 'HAVE_MPROTECT', 'HAVE_NEWLOCALE', 'HAVE_NL_LANGINFO', 'HAVE_OPENDIR', 'HAVE_PIPE', 'HAVE_PIPE2', 'HAVE_POSIX_SPAWN', 'HAVE_POSIX_SPAWNATTR_T', 'HAVE_POSIX_SPAWN_FILE_ACTIONS_T', 'HAVE_RAISE', 'HAVE_RAWMEMCHR', 'HAVE_READDIR', 'HAVE_READLINK', 'HAVE_REALPATH', 'HAVE_SEARCH_H', 'HAVE_SECURE_GETENV', 'HAVE_SETENV', 'HAVE_SETLOCALE', 'HAVE_SETRLIMIT', 'HAVE_SIGACTION', 'HAVE_SIGALTSTACK', 'HAVE_SIGINTERRUPT', 'HAVE_SIGSET_T', 'HAVE_SIG_ATOMIC_T', 'HAVE_SLEEP', 'HAVE_SNPRINTF', 'HAVE_SNPRINTF_RETVAL_C99', 'HAVE_SPAWN_H', 'HAVE_STACK_OVERFLOW_HANDLING', 'HAVE_STACK_T', 'HAVE_STDINT_H', 'HAVE_STDINT_H_WITH_UINTMAX', 'HAVE_STDIO_EXT_H', 'HAVE_STDLIB_H', 'HAVE_STRCHRNUL', 'HAVE_STRDUP', 'HAVE_STRERROR_R', 'HAVE_STRINGS_H', 'HAVE_STRING_H', 'HAVE_STRNDUP', 'HAVE_STRNLEN', 'HAVE_STRSIGNAL', 'HAVE_STRUCT_SIGACTION_SA_SIGACTION', 'HAVE_SYMLINK', 'HAVE_SYS_CDEFS_H', 'HAVE_SYS_MMAN_H', 'HAVE_SYS_PARAM_H', 'HAVE_SYS_SOCKET_H', 'HAVE_SYS_STAT_H', 'HAVE_SYS_TIME_H', 'HAVE_SYS_TYPES_H', 'HAVE_SYS_WAIT_H', 'HAVE_TOWLOWER', 'HAVE_TSEARCH', 'HAVE_UCONTEXT_H', 'HAVE_UNISTD_H', 'HAVE_UNSETENV', 'HAVE_UNSIGNED_LONG_LONG_INT', 'HAVE_USELOCALE', 'HAVE_VASPRINTF', 'HAVE_WAITID', 'HAVE_WCHAR_H', 'HAVE_WCHAR_T', 'HAVE_WCRTOMB', 'HAVE_WCSLEN', 'HAVE_WCSNLEN', 'HAVE_WCTOB', 'HAVE_WCTYPE_H', 'HAVE_WINT_T', 'HAVE_WORKING_O_NOATIME', 'HAVE_WORKING_O_NOFOLLOW', 'HAVE_WORKING_POSIX_SPAWN', 'HAVE__BOOL', 'HAVE___BUILTIN_EXPECT', 'HAVE___FPURGE', 'HAVE___FREADING', 'LSTAT_FOLLOWS_SLASHED_SYMLINK', 'MALLOC_0_IS_NONNULL', 'RENAME_OPEN_FILE_WORKS', 'SIGNAL_SAFE_LIST', 'STDC_HEADERS', 'STRERROR_R_CHAR_P', 'USE_UNLOCKED_IO', '_DARWIN_USE_64_BIT_INODE'],
+ mappings = {'DBL_EXPBIT0_BIT': '20', 'FAULT_YIELDS_SIGBUS': '0', 'FLEXIBLE_ARRAY_MEMBER': '', 'FLT_EXPBIT0_BIT': '23', 'FLT_EXPBIT0_WORD': '0', 'FUNC_FFLUSH_STDIN': '0', 'GETTIMEOFDAY_TIMEZONE': 'struct', 'HAVE_DECL_FPURGE': '0', 'HAVE_DECL__SNPRINTF': '0', 'HAVE_DECL___ARGV': '0', 'LDBL_EXPBIT0_BIT': '0', 'LDBL_EXPBIT0_WORD': '2', 'PACKAGE': '"m4"', 'PACKAGE_BUGREPORT': '"bug-m4@gnu.org"', 'PACKAGE_NAME': '"GNU M4"', 'PACKAGE_STRING': '"GNU m4 1.4.18"', 'PACKAGE_TARNAME': '"m4"', 'PACKAGE_URL': '"www.gnu.org_software_m4"', 'PACKAGE_VERSION': '"1.4.18"', 'PROMOTED_MODE_T': 'mode_t', 'SYSCMD_SHELL': r'"\/bin\/sh"', 'USER_LABEL_PREFIX': '', 'VERSION': '"1.4.18"', 'restrict': '__restrict', '_UNUSED_PARAMETER_': '_GL_UNUSED'},
+ additional = {
+ '_GL_ARG_NONNULL(o)': '',
+ '_GL_ATTRIBUTE_FORMAT_PRINTF(a, b)': '',
+ },
+)
+
+touch(
+ name = "configmake_h",
+ out = "lib/configmake.h",
+ contents = dict(
+ LIBDIR = '"/usr/local/lib"',
+ ),
+)
diff --git a/dependency_support/org_gnu_m4/workspace.bzl b/dependency_support/org_gnu_m4/workspace.bzl
new file mode 100644
index 0000000000..172efdc88c
--- /dev/null
+++ b/dependency_support/org_gnu_m4/workspace.bzl
@@ -0,0 +1,31 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the m4 macro processor, used by Bison."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "org_gnu_m4",
+ urls = [
+ "http://ftp.acc.umu.se/mirror/gnu.org/gnu/m4/m4-1.4.18.tar.xz",
+ "http://ftp.gnu.org/gnu/m4/m4-1.4.18.tar.xz",
+ ],
+ strip_prefix = "m4-1.4.18",
+ sha256 = "f2c1e86ca0a404ff281631bdc8377638992744b175afb806e25871a24a934e07",
+ build_file = Label("//dependency_support:org_gnu_m4/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/org_sourceware_bzip2/bundled.BUILD.bazel b/dependency_support/org_sourceware_bzip2/bundled.BUILD.bazel
new file mode 100644
index 0000000000..075e57007e
--- /dev/null
+++ b/dependency_support/org_sourceware_bzip2/bundled.BUILD.bazel
@@ -0,0 +1,38 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+package(default_visibility = ["//visibility:public"])
+
+licenses(["notice"]) # BSD derivative, see LICENSE file
+
+exports_files(["LICENSE"])
+
+cc_library(
+ name = "bzip2",
+ srcs = [
+ "blocksort.c",
+ "bzlib.c",
+ "bzlib_private.h",
+ "compress.c",
+ "crctable.c",
+ "decompress.c",
+ "huffman.c",
+ "randtable.c",
+ ],
+ hdrs = [
+ "bzlib.h",
+ ],
+ includes = ["."],
+ deps = [],
+)
diff --git a/dependency_support/org_sourceware_bzip2/workspace.bzl b/dependency_support/org_sourceware_bzip2/workspace.bzl
new file mode 100644
index 0000000000..fd5ddaaa85
--- /dev/null
+++ b/dependency_support/org_sourceware_bzip2/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the bz2lib library, used by iverilog."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "org_sourceware_bzip2",
+ urls = [
+ "https://sourceware.org/pub/bzip2/bzip2-1.0.8.tar.gz",
+ ],
+ strip_prefix = "bzip2-1.0.8",
+ sha256 = "ab5a03176ee106d3f0fa90e381da478ddae405918153cca248e682cd0c4a2269",
+ build_file = Label("//dependency_support:org_sourceware_bzip2/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/org_sourceware_libffi/bundled.BUILD.bazel b/dependency_support/org_sourceware_libffi/bundled.BUILD.bazel
new file mode 100644
index 0000000000..f382d9c61f
--- /dev/null
+++ b/dependency_support/org_sourceware_libffi/bundled.BUILD.bazel
@@ -0,0 +1,350 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+load("@com_google_xls//dependency_support:automake_substitution.bzl", "automake_substitution")
+load("@com_google_xls//dependency_support:copy.bzl", "copy")
+
+AUTOMAKE_SUBSTITUTIONS = {
+ "TARGET": "X86_64",
+ "HAVE_LONG_DOUBLE": "1",
+ "FFI_EXEC_TRAMPOLINE_TABLE": "0",
+}
+
+automake_substitution(
+ name = "ffi_h",
+ src = "include/ffi.h.in",
+ out = "generated/include/ffi.h",
+ substitutions = AUTOMAKE_SUBSTITUTIONS,
+)
+
+genrule(
+ name = "fficonfig_h",
+ srcs = ["fficonfig.h.in"],
+ outs = ["generated/fficonfig.h"],
+ cmd = "sed 's.#undef.//#undef.g' $(location :fficonfig.h.in) > $@",
+)
+
+DEFINES = [
+ "HAVE_ALLOCA=1",
+ "HAVE_ALLOCA_H=1",
+ "HAVE_AS_CFI_PSEUDO_OP=1",
+ "HAVE_AS_X86_64_UNWIND_SECTION_TYPE=1",
+ "HAVE_AS_X86_PCREL=1",
+ "HAVE_HIDDEN_VISIBILITY_ATTRIBUTE=1",
+ "HAVE_INTTYPES_H=1",
+ "HAVE_MEMCPY=1",
+ "HAVE_MKOSTEMP=1",
+ "HAVE_MMAP=1",
+ "HAVE_MMAP_ANON=1",
+ "HAVE_MMAP_DEV_ZERO=1",
+ "HAVE_RO_EH_FRAME=1",
+ "HAVE_STDINT_H=1",
+ "STDC_HEADERS=1",
+]
+
+copy(
+ name = "ffitarget_h",
+ src = "src/x86/ffitarget.h",
+ out = "generated/include/ffitarget.h",
+)
+
+cc_library(
+ name = "libffi",
+ srcs = [
+ "generated/fficonfig.h",
+ "generated/include/ffi.h",
+ "generated/include/ffitarget.h",
+ "include/ffi_cfi.h",
+ "include/ffi_common.h",
+ "src/closures.c",
+ "src/debug.c",
+ "src/java_raw_api.c",
+ "src/prep_cif.c",
+ "src/raw_api.c",
+ "src/types.c",
+ "src/x86/asmnames.h",
+ "src/x86/ffi.c",
+ "src/x86/ffi64.c",
+ "src/x86/ffiw64.c",
+ "src/x86/internal.h",
+ "src/x86/internal64.h",
+ "src/x86/sysv.S",
+ "src/x86/unix64.S",
+ "src/x86/win64.S",
+ ],
+ copts = [
+ "-Wno-deprecated-declarations",
+ ],
+ includes = [
+ "generated",
+ "generated/include",
+ "include",
+ ],
+ defines = DEFINES,
+ textual_hdrs = ["src/dlmalloc.c"],
+ visibility = ["//visibility:public"],
+)
+
+[cc_test(
+ name = "%s_call_test" % call_test,
+ srcs = [
+ "testsuite/libffi.call/ffitest.h",
+ "testsuite/libffi.call/%s.c" % call_test,
+ ],
+ deps = [
+ ":libffi",
+ ],
+) for call_test in [
+ "align_mixed",
+ "align_stdcall",
+ "err_bad_typedef",
+ "float",
+ "float1",
+ "float2",
+ "float3",
+ "float4",
+ "float_va",
+ "many",
+ "many2",
+ "many_double",
+ "many_mixed",
+ "negint",
+ "offsets",
+ "pr1172638",
+ "promotion",
+ "pyobjc-tc",
+ "return_dbl",
+ "return_dbl1",
+ "return_dbl2",
+ "return_fl",
+ "return_fl1",
+ "return_fl2",
+ "return_fl3",
+ "return_ldl",
+ "return_ll",
+ "return_ll1",
+ "return_sc",
+ "return_sl",
+ "return_uc",
+ "return_ul",
+ "strlen",
+ "strlen2",
+ "strlen3",
+ "strlen4",
+ "struct1",
+ "struct10",
+ "struct2",
+ "struct3",
+ "struct4",
+ "struct5",
+ "struct6",
+ "struct7",
+ "struct8",
+ "struct9",
+ "uninitialized",
+ "va_1",
+ "va_struct1",
+ "va_struct2",
+ "va_struct3",
+]]
+
+cc_library(
+ name = "bhaible_test_support",
+ hdrs = [
+ "testsuite/libffi.bhaible/alignof.h",
+ ],
+ textual_hdrs = [
+ "testsuite/libffi.bhaible/testcases.c",
+ ],
+)
+
+[cc_test(
+ name = "%s_bhaible_test" % bhaible_test,
+ srcs = [
+ "testsuite/libffi.bhaible/%s.c" % bhaible_test,
+ ],
+ deps = [
+ ":libffi",
+ ":bhaible_test_support",
+ ],
+) for bhaible_test in [
+ "test-call",
+ "test-callback",
+]]
+
+[cc_test(
+ name = "%s_closures_test" % closures_test,
+ srcs = [
+ "testsuite/libffi.closures/ffitest.h",
+ "testsuite/libffi.closures/%s.c" % closures_test,
+ ],
+ deps = [
+ ":libffi",
+ ],
+) for closures_test in [
+ "closure_fn0",
+ "closure_fn1",
+ "closure_fn2",
+ "closure_fn3",
+ "closure_fn4",
+ "closure_fn5",
+ "closure_fn6",
+ "closure_loc_fn0",
+ "closure_simple",
+ "cls_12byte",
+ "cls_16byte",
+ "cls_18byte",
+ "cls_19byte",
+ "cls_1_1byte",
+ "cls_20byte",
+ "cls_20byte1",
+ "cls_24byte",
+ "cls_2byte",
+ "cls_3_1byte",
+ "cls_3byte1",
+ "cls_3byte2",
+ "cls_3float",
+ "cls_4_1byte",
+ "cls_4byte",
+ "cls_5_1_byte",
+ "cls_5byte",
+ "cls_64byte",
+ "cls_6_1_byte",
+ "cls_6byte",
+ "cls_7_1_byte",
+ "cls_7byte",
+ "cls_8byte",
+ "cls_9byte1",
+ "cls_9byte2",
+ "cls_align_double",
+ "cls_align_float",
+ "cls_align_longdouble",
+ "cls_align_longdouble_split",
+ "cls_align_longdouble_split2",
+ "cls_align_pointer",
+ "cls_align_sint16",
+ "cls_align_sint32",
+ "cls_align_sint64",
+ "cls_align_uint16",
+ "cls_align_uint32",
+ "cls_align_uint64",
+ "cls_dbls_struct",
+ "cls_double",
+ "cls_double_va",
+ "cls_float",
+ "cls_longdouble",
+ "cls_longdouble_va",
+ "cls_many_mixed_args",
+ "cls_many_mixed_float_double",
+ "cls_multi_schar",
+ "cls_multi_sshort",
+ "cls_multi_sshortchar",
+ "cls_multi_uchar",
+ "cls_multi_ushort",
+ "cls_multi_ushortchar",
+ "cls_pointer",
+ "cls_pointer_stack",
+ "cls_schar",
+ "cls_sint",
+ "cls_sshort",
+ "cls_struct_va1",
+ "cls_uchar",
+ "cls_uchar_va",
+ "cls_uint",
+ "cls_uint_va",
+ "cls_ulong_va",
+ "cls_ulonglong",
+ "cls_ushort",
+ "cls_ushort_va",
+ "err_bad_abi",
+ "huge_struct",
+ "nested_struct",
+ "nested_struct1",
+ "nested_struct10",
+ "nested_struct11",
+ "nested_struct2",
+ "nested_struct3",
+ "nested_struct4",
+ "nested_struct5",
+ "nested_struct6",
+ "nested_struct7",
+ "nested_struct8",
+ "nested_struct9",
+ "problem1",
+ "stret_large",
+ "stret_large2",
+ "stret_medium",
+ "stret_medium2",
+ "testclosure",
+]]
+
+[cc_test(
+ name = "%s_complex_test" % complex_test,
+ srcs = glob([
+ "testsuite/libffi.complex/*.inc",
+ ]) + [
+ "testsuite/libffi.call/ffitest.h",
+ "testsuite/libffi.complex/ffitest.h",
+ "testsuite/libffi.complex/%s.c" % complex_test,
+ ],
+ deps = [
+ ":libffi",
+ ],
+) for complex_test in [
+ "cls_align_complex_double",
+ "cls_align_complex_float",
+ "cls_align_complex_longdouble",
+ "cls_complex_double",
+ "cls_complex_float",
+ "cls_complex_longdouble",
+ "cls_complex_struct_double",
+ "cls_complex_struct_float",
+ "cls_complex_struct_longdouble",
+ "cls_complex_va_double",
+ "cls_complex_va_float",
+ "cls_complex_va_longdouble",
+ "complex_double",
+ "complex_float",
+ "complex_int",
+ "complex_longdouble",
+ "many_complex_double",
+ "many_complex_float",
+ "many_complex_longdouble",
+ "return_complex1_double",
+ "return_complex1_float",
+ "return_complex1_longdouble",
+ "return_complex2_double",
+ "return_complex2_float",
+ "return_complex2_longdouble",
+ "return_complex_double",
+ "return_complex_float",
+ "return_complex_longdouble",
+]]
+
+
+[cc_test(
+ name = "%s_go_test" % go_test,
+ srcs = [
+ "testsuite/libffi.call/ffitest.h",
+ "testsuite/libffi.go/ffitest.h",
+ "testsuite/libffi.go/static-chain.h",
+ "testsuite/libffi.go/%s.c" % go_test,
+ ],
+ deps = [
+ ":libffi",
+ ],
+) for go_test in [
+ "aa-direct",
+ "closure1",
+]]
diff --git a/dependency_support/org_sourceware_libffi/workspace.bzl b/dependency_support/org_sourceware_libffi/workspace.bzl
new file mode 100644
index 0000000000..b434eb7e96
--- /dev/null
+++ b/dependency_support/org_sourceware_libffi/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the libffi library, used by Yosys."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "org_sourceware_libffi",
+ urls = [
+ "https://github.com/libffi/libffi/releases/download/v3.3/libffi-3.3.tar.gz",
+ ],
+ strip_prefix = "libffi-3.3",
+ sha256 = "72fba7922703ddfa7a028d513ac15a85c8d54c8d67f55fa5a4802885dc652056",
+ build_file = Label("//dependency_support:org_sourceware_libffi/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/pseudo_configure.bzl b/dependency_support/pseudo_configure.bzl
new file mode 100644
index 0000000000..452ac8960c
--- /dev/null
+++ b/dependency_support/pseudo_configure.bzl
@@ -0,0 +1,52 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Fake configuration step for hacky substitutions in ".in" files."""
+
+def pseudo_configure(name, src, out, defs, mappings, additional = None):
+ """Creates a genrule that performs a fake 'configure' step on a file.
+
+ Args:
+ name: Name to use for the created genrule.
+ src: ".in" file to transform.
+ out: Path to place the output file contents.
+ defs: List of definitions to #define as `1`.
+ mappings: Mapping of definitions with non-trivial values.
+ additional: Optional mapping of definitions to prepend to the file.
+ """
+ additional = additional or {}
+
+ cmd = ""
+
+ for k, v in additional.items():
+ cmd += "echo '#define %s %s' >> $@ &&" % (k, v)
+
+ cmd += "cat $<"
+ all_defs = ""
+ for def_ in defs:
+ cmd += r"| perl -p -e 's/#\s*undef \b(" + def_ + r")\b/#define $$1 1/'"
+ all_defs += "#define " + def_ + " 1\\n"
+ for key, value in mappings.items():
+ cmd += r"| perl -p -e 's/#\s*undef \b" + key + r"\b/#define " + str(key) + " " + str(value) + "/'"
+ cmd += r"| perl -p -e 's/#\s*define \b(" + key + r")\b 0/#define $$1 " + str(value) + "/'"
+ all_defs += "#define " + key + " " + value + "\\n"
+ cmd += r"| perl -p -e 's/\@DEFS\@/" + all_defs + "/'"
+ cmd += " >> $@"
+ native.genrule(
+ name = name,
+ srcs = [src],
+ outs = [out],
+ cmd = cmd,
+ message = "Configuring " + src,
+ )
diff --git a/dependency_support/pybind11/BUILD b/dependency_support/pybind11/BUILD
new file mode 100644
index 0000000000..882dc0a057
--- /dev/null
+++ b/dependency_support/pybind11/BUILD
@@ -0,0 +1,15 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Required to make this a package.
diff --git a/dependency_support/pybind11/pybind11.bzl b/dependency_support/pybind11/pybind11.bzl
new file mode 100644
index 0000000000..c6a8a0f644
--- /dev/null
+++ b/dependency_support/pybind11/pybind11.bzl
@@ -0,0 +1,27 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Wraps the pybind_extension rule with a py_library rule."""
+
+load("@pybind11_bazel//:build_defs.bzl", "pybind_extension")
+
+def xls_pybind_extension(**kwargs):
+ name = kwargs["name"]
+ py_deps = kwargs.pop("py_deps", [])
+ pybind_extension(**kwargs)
+ native.py_library(
+ name = name,
+ data = [name + ".so"],
+ deps = py_deps,
+ )
diff --git a/dependency_support/tcl_tcl_tk/bundled.BUILD.bazel b/dependency_support/tcl_tcl_tk/bundled.BUILD.bazel
new file mode 100644
index 0000000000..930b0466fe
--- /dev/null
+++ b/dependency_support/tcl_tcl_tk/bundled.BUILD.bazel
@@ -0,0 +1,232 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description: Tcl scripting language.
+
+licenses(["notice"])
+
+exports_files(["LICENSE"])
+
+# The following settings are taken from the command line build when executing
+# configure :
+TCL_COPTS = [
+ "-DHAVE_ZLIB=", # Enables ZLIB
+ "-DTCL_DBGX=",
+ "-DHAVE_LIMITS_H=1",
+ "-DHAVE_UNISTD_H=1",
+ "-DHAVE_SYS_PARAM_H=1",
+ "-DUSE_THREAD_ALLOC=1",
+ "-D_REENTRANT=1",
+ "-D_THREAD_SAFE=1",
+ "-DHAVE_PTHREAD_ATTR_SETSTACKSIZE=1",
+ "-DHAVE_PTHREAD_ATFORK=1",
+ "-DTCL_THREADS=1",
+ "-DPEEK_XCLOSEIM=1",
+ "-D_LARGEFILE64_SOURCE=1",
+ "-DTCL_WIDE_INT_TYPE=long\ long",
+ "-DHAVE_STRUCT_STAT64=1",
+ "-DHAVE_OPEN64=1",
+ "-DHAVE_LSEEK64=1",
+ "-DHAVE_TYPE_OFF64_T=1",
+ "-DHAVE_GETCWD=1",
+ "-DHAVE_OPENDIR=1",
+ "-DHAVE_STRSTR=1",
+ "-DHAVE_STRTOL=1",
+ "-DHAVE_STRTOLL=1",
+ "-DHAVE_STRTOULL=1",
+ "-DHAVE_TMPNAM=1",
+ "-DHAVE_WAITPID=1",
+ "-DHAVE_GETPWUID_R_5=1",
+ "-DHAVE_GETPWUID_R=1",
+ "-DHAVE_GETPWNAM_R_5=1",
+ "-DHAVE_GETPWNAM_R=1",
+ "-DHAVE_GETGRGID_R_5=1",
+ "-DHAVE_GETGRGID_R=1",
+ "-DHAVE_GETGRNAM_R_5=1",
+ "-DHAVE_GETGRNAM_R=1",
+ "-DHAVE_GETHOSTBYNAME_R_6=1",
+ "-DHAVE_GETHOSTBYNAME_R=1",
+ "-DHAVE_GETHOSTBYADDR_R_8=1",
+ "-DHAVE_GETHOSTBYADDR_R=1",
+ "-DUSE_TERMIOS=1",
+ "-DTIME_WITH_SYS_TIME=1",
+ "-DHAVE_TM_ZONE=1",
+ "-DHAVE_GMTIME_R=1",
+ "-DHAVE_LOCALTIME_R=1",
+ "-DHAVE_TM_GMTOFF=1",
+ "-DHAVE_SYS_TIME_H=1",
+ "-DHAVE_TIMEZONE_VAR=1",
+ "-DHAVE_ST_BLKSIZE=1",
+ "-DSTDC_HEADERS=1",
+ "-DHAVE_SIGNED_CHAR=1",
+ "-DHAVE_LANGINFO=1",
+ "-DHAVE_SYS_IOCTL_H=1",
+ "-DTCL_SHLIB_EXT=\\\".so\\\"",
+ "-Wno-implicit-int",
+ "-fno-strict-aliasing",
+ "-fPIC",
+]
+
+# tclAlloc uses additional define
+cc_library(
+ name = "tclAlloc",
+ srcs = ["generic/tclAlloc.c"],
+ hdrs = glob([
+ "generic/*.h",
+ "unix/*.h",
+ ]),
+ includes = ["generic", "unix"],
+ copts = TCL_COPTS + [
+ "-DUSE_TCLALLOC=0",
+ ],
+)
+
+# tclUnixInit uses additional define
+cc_library(
+ name = "tclUnixInit",
+ srcs = [
+ "generic/tcl.h",
+ "generic/tclDecls.h",
+ "generic/tclInt.h",
+ "generic/tclIntDecls.h",
+ "generic/tclPort.h",
+ "generic/tclTomMathDecls.h",
+ "unix/tclUnixInit.c",
+ ],
+ hdrs = glob([
+ "generic/*.h",
+ "unix/*.h",
+ ]),
+ copts = TCL_COPTS + [
+ "-DTCL_LIBRARY=\\\"dependency_support/tcl_tk/library\\\"",
+ "-DTCL_PACKAGE_PATH=\\\"dependency_support/tcl_tk/tcl8.6.4\\\"",
+ ],
+ includes = ["generic", "unix"],
+)
+
+# pkg-config
+cc_library(
+ name = "tclPkgConfig",
+ srcs = [
+ "compat/unistd.h",
+ "generic/tclPkgConfig.c",
+ ],
+ hdrs = glob([
+ "generic/*.h",
+ "unix/*.h",
+ ]),
+ copts = [
+ "-DCFG_INSTALL_LIBDIR='\"this_LIBDIR_does_not_exist\"'",
+ "-DCFG_INSTALL_BINDIR='\"this_BINDIR_does_not_exist\"'",
+ "-DCFG_INSTALL_DOCDIR='\"this_DOCDIR_does_not_exist\"'",
+ "-DCFG_INSTALL_INCDIR='\"this_INCDIR_does_not_exist\"'",
+ "-DCFG_INSTALL_SCRDIR='\"this_SCRDIR_does_not_exist\"'",
+ "-DCFG_RUNTIME_LIBDIR='\"this_LIBDIR_does_not_exist\"'",
+ "-DCFG_RUNTIME_BINDIR='\"this_BINDIR_does_not_exist\"'",
+ "-DCFG_RUNTIME_DOCDIR='\"this_DOCDIR_does_not_exist\"'",
+ "-DCFG_RUNTIME_INCDIR='\"this_INCDIR_does_not_exist\"'",
+ "-DCFG_RUNTIME_SCRDIR='\"this_SCRDIR_does_not_exist\"'",
+ "-DTCL_CFGVAL_ENCODING='\"ascii\"'",
+ ],
+ includes = [
+ "generic/",
+ "unix/",
+ ],
+)
+
+# This is the libtcl
+cc_library(
+ name = "tcl",
+ srcs = [
+ "generic/regcomp.c",
+ "generic/regerror.c",
+ "generic/regexec.c",
+ "generic/regfree.c",
+ "unix/tclLoadDl.c",
+ ] + glob(
+ [
+ "generic/tcl*.c",
+ "unix/tcl*.c",
+ "libtommath/*.c",
+ ],
+ exclude = [
+ "generic/tclLoadNone.c",
+ "generic/tclPkgConfig.c",
+ "generic/tclUniData.c",
+ "libtommath/bn_deprecated.c",
+ "libtommath/bn_mp_init_i32.c",
+ "libtommath/bn_mp_init_i64.c",
+ "libtommath/bn_mp_init_u32.c",
+ "libtommath/bn_mp_init_u64.c",
+ "libtommath/bn_mp_init_ul.c",
+ "libtommath/bn_mp_init_l.c",
+ "libtommath/bn_mp_init_ll.c",
+ "libtommath/bn_mp_init_ull.c",
+ "libtommath/bn_mp_iseven.c",
+ "libtommath/bn_mp_set_u64.c",
+ "libtommath/bn_mp_set_ul.c",
+ "libtommath/bn_mp_set_ull.c",
+ "libtommath/bn_s_mp_exptmod.c",
+ "libtommath/bn_s_mp_exptmod_fast.c",
+ "unix/tclAppInit.c",
+ "unix/tclLoad*.c",
+ "unix/tclUnixInit.c",
+ "unix/tclXtNotify.c",
+ "unix/tclXtTest.c",
+ ],
+ ),
+ hdrs = glob([
+ "generic/*.h",
+ "generic/reg*.c",
+ "libtommath/*.h",
+ ]),
+ copts = TCL_COPTS + [
+ "-w",
+ "$(STACK_FRAME_UNLIMITED)", # regexec.c
+ ],
+ includes = [
+ "generic/",
+ "libtommath/",
+ "unix/",
+ "xlib/",
+ ],
+ linkopts = ["-ldl", "-lpthread"],
+ textual_hdrs = glob([
+ "generic/*.decls",
+ ]) + [
+ "generic/tclUniData.c",
+ ],
+ deps = [
+ ":tclAlloc",
+ ":tclPkgConfig",
+ ":tclUnixInit",
+ "@zlib//:zlib",
+ ],
+)
+
+# tcl shell
+cc_binary(
+ name = "tclsh",
+ srcs = ["unix/tclAppInit.c"],
+ copts = TCL_COPTS + [
+ "-w",
+ ],
+ includes = ["generic", "unix"],
+ deps = [
+ ":tcl",
+ ":tclAlloc",
+ ":tclPkgConfig",
+ ":tclUnixInit",
+ ],
+)
diff --git a/dependency_support/tcl_tcl_tk/workspace.bzl b/dependency_support/tcl_tcl_tk/workspace.bzl
new file mode 100644
index 0000000000..6d7bc644a9
--- /dev/null
+++ b/dependency_support/tcl_tcl_tk/workspace.bzl
@@ -0,0 +1,30 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Loads the ABC system for sequential synthesis and verification, used by yosys."""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
+
+def repo():
+ maybe(
+ http_archive,
+ name = "tcl_tcl_tk",
+ urls = [
+ "https://prdownloads.sourceforge.net/tcl/tcl8.6.10-src.tar.gz",
+ ],
+ strip_prefix = "tcl8.6.10",
+ sha256 = "5196dbf6638e3df8d5c87b5815c8c2b758496eb6f0e41446596c9a4e638d87ed",
+ build_file = Label("//dependency_support:tcl_tcl_tk/bundled.BUILD.bazel"),
+ )
diff --git a/dependency_support/z3/BUILD b/dependency_support/z3/BUILD
new file mode 100644
index 0000000000..882dc0a057
--- /dev/null
+++ b/dependency_support/z3/BUILD
@@ -0,0 +1,15 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Required to make this a package.
diff --git a/dependency_support/z3/build_defs.bzl b/dependency_support/z3/build_defs.bzl
new file mode 100644
index 0000000000..efa130ceda
--- /dev/null
+++ b/dependency_support/z3/build_defs.bzl
@@ -0,0 +1,115 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Macros for generating Z3 input sources/headers."""
+
+MK_MAKE_SRCS = [
+ "src/api/api_commands.cpp",
+ "src/api/api_log_macros.cpp",
+ "src/api/dll/gparams_register_modules.cpp",
+ "src/api/dll/install_tactic.cpp",
+ "src/api/dll/mem_initializer.cpp",
+ "src/util/z3_version.h",
+]
+
+MK_MAKE_HDRS = [
+ "src/api/api_log_macros.h",
+]
+
+PARAMS_HDRS = [
+ "src/ackermannization/ackermannization_params.hpp",
+ "src/ackermannization/ackermannize_bv_tactic_params.hpp",
+ "src/ast/fpa/fpa2bv_rewriter_params.hpp",
+ "src/ast/normal_forms/nnf_params.hpp",
+ "src/ast/pattern/pattern_inference_params_helper.hpp",
+ "src/ast/pp_params.hpp",
+ "src/ast/rewriter/arith_rewriter_params.hpp",
+ "src/ast/rewriter/array_rewriter_params.hpp",
+ "src/ast/rewriter/bool_rewriter_params.hpp",
+ "src/ast/rewriter/bv_rewriter_params.hpp",
+ "src/ast/rewriter/fpa_rewriter_params.hpp",
+ "src/ast/rewriter/poly_rewriter_params.hpp",
+ "src/ast/rewriter/rewriter_params.hpp",
+ "src/math/polynomial/algebraic_params.hpp",
+ "src/math/realclosure/rcf_params.hpp",
+ "src/model/model_params.hpp",
+ "src/model/model_evaluator_params.hpp",
+ "src/muz/base/fp_params.hpp",
+ "src/nlsat/nlsat_params.hpp",
+ "src/opt/opt_params.hpp",
+ "src/parsers/util/parser_params.hpp",
+ "src/sat/sat_asymm_branch_params.hpp",
+ "src/sat/sat_params.hpp",
+ "src/sat/sat_scc_params.hpp",
+ "src/sat/sat_simplifier_params.hpp",
+ "src/smt/params/smt_params_helper.hpp",
+ "src/solver/parallel_params.hpp",
+ "src/solver/solver_params.hpp",
+ "src/solver/combined_solver_params.hpp",
+ "src/tactic/smtlogics/qfufbv_tactic_params.hpp",
+ "src/tactic/sls/sls_params.hpp",
+ "src/tactic/tactic_params.hpp",
+ "src/util/lp/lp_params.hpp",
+]
+
+DB_HDRS = [
+ "src/ast/pattern/database.h",
+]
+
+GEN_SRCS = MK_MAKE_SRCS
+
+GEN_HDRS = MK_MAKE_HDRS + PARAMS_HDRS + DB_HDRS
+
+def gen_srcs():
+ """Runs provided Python scripts for source generation."""
+ copy_cmds = []
+ for out in MK_MAKE_SRCS + MK_MAKE_HDRS:
+ copy_cmds.append("cp external/z3/" + out + " $(@D)/$$(dirname " + out + ")")
+ copy_cmds = ";\n".join(copy_cmds) + ";\n"
+
+ native.genrule(
+ name = "gen_srcs",
+ srcs = [
+ "LICENSE.txt",
+ "scripts/mk_make.py",
+ ] + native.glob(["src/**", "examples/**"]),
+ tools = ["scripts/mk_make.py"],
+ outs = MK_MAKE_SRCS + MK_MAKE_HDRS,
+ # We can't use $(location) here, since the bundled script internally
+ # makes assumptions about where files are located.
+ cmd = "cd external/z3; " +
+ "python scripts/mk_make.py; " +
+ "cd ../..;" +
+ copy_cmds,
+ )
+
+ for params_hdr in PARAMS_HDRS:
+ src_file = params_hdr[0:-4] + ".pyg"
+ native.genrule(
+ name = "gen_" + params_hdr[0:-4],
+ srcs = [src_file],
+ tools = ["scripts/pyg2hpp.py"],
+ outs = [params_hdr],
+ cmd = "python $(location scripts/pyg2hpp.py) $< $$(dirname $@)",
+ )
+
+ for db_hdr in DB_HDRS:
+ src = db_hdr[0:-1] + "smt2"
+ native.genrule(
+ name = "gen_" + db_hdr[0:-2],
+ srcs = [src],
+ tools = ["scripts/mk_pat_db.py"],
+ outs = [db_hdr],
+ cmd = "python $(location scripts/mk_pat_db.py) $< $@",
+ )
diff --git a/dependency_support/z3/bundled.BUILD.bazel b/dependency_support/z3/bundled.BUILD.bazel
new file mode 100644
index 0000000000..73a54d4623
--- /dev/null
+++ b/dependency_support/z3/bundled.BUILD.bazel
@@ -0,0 +1,493 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# Description:
+# Z3 is a theorem prover from Microsoft Research.
+
+load("@com_google_xls//dependency_support/z3:build_defs.bzl", "gen_srcs", "GEN_SRCS", "GEN_HDRS")
+
+licenses(["notice"])
+
+exports_files(["LICENSE"])
+
+package(
+ default_visibility = ["//visibility:private"],
+ features = [
+ "-layering_check",
+ "-parse_headers",
+ ],
+)
+
+gen_srcs()
+
+common_copts = [
+ "-fexceptions",
+ "-fsigned-char",
+ "-Wno-unused-variable",
+ "-Wno-non-virtual-dtor",
+ "-Wno-delete-non-virtual-dtor",
+ "-Wno-switch",
+ "-Wno-reorder",
+ "-Wno-string-conversion",
+ "-Wno-overloaded-virtual",
+ # "-Wno-sometimes-uninitialized",
+ "-D_MP_INTERNAL",
+ "-D_AMD64_",
+ "-D_USE_THREAD_LOCAL",
+ "-D_EXTERNAL_RELEASE",
+ "-D_LINUX_",
+ "-D_NO_OMP_",
+]
+
+common_linkopts = [
+ "-lpthread",
+]
+
+cc_library(
+ name = "z3lib",
+ srcs = GEN_SRCS + glob([
+ "src/ackermannization/*.cpp",
+ "src/api/*.cpp",
+ "src/ast/*.cpp",
+ "src/ast/fpa/*.cpp",
+ "src/ast/macros/*.cpp",
+ "src/ast/normal_forms/*.cpp",
+ "src/ast/pattern/*.cpp",
+ "src/ast/proofs/*.cpp",
+ "src/ast/rewriter/*.cpp",
+ "src/ast/rewriter/bit_blaster/*.cpp",
+ "src/ast/substitution/*.cpp",
+ "src/cmd_context/*.cpp",
+ "src/cmd_context/extra_cmds/*.cpp",
+ "src/math/automata/*.cpp",
+ "src/math/dd/*.cpp",
+ "src/math/euclid/*.cpp",
+ "src/math/grobner/*.cpp",
+ "src/math/hilbert/*.cpp",
+ "src/math/interval/*.cpp",
+ "src/math/lp/*.cpp",
+ "src/math/polynomial/*.cpp",
+ "src/math/realclosure/*.cpp",
+ "src/math/simplex/*.cpp",
+ "src/math/subpaving/*.cpp",
+ "src/math/subpaving/tactic/*.cpp",
+ "src/model/*.cpp",
+ "src/muz/base/*.cpp",
+ "src/muz/bmc/*.cpp",
+ "src/muz/clp/*.cpp",
+ "src/muz/dataflow/*.cpp",
+ "src/muz/ddnf/*.cpp",
+ "src/muz/fp/*.cpp",
+ "src/muz/rel/*.cpp",
+ "src/muz/spacer/*.cpp",
+ "src/muz/tab/*.cpp",
+ "src/muz/transforms/*.cpp",
+ "src/nlsat/*.cpp",
+ "src/nlsat/tactic/*.cpp",
+ "src/opt/*.cpp",
+ "src/parsers/smt2/*.cpp",
+ "src/parsers/util/*.cpp",
+ "src/qe/*.cpp",
+ "src/sat/*.cpp",
+ "src/sat/sat_solver/*.cpp",
+ "src/sat/tactic/*.cpp",
+ "src/smt/*.cpp",
+ "src/smt/params/*.cpp",
+ "src/smt/proto_model/*.cpp",
+ "src/smt/tactic/*.cpp",
+ "src/solver/*.cpp",
+ "src/tactic/*.cpp",
+ "src/tactic/aig/*.cpp",
+ "src/tactic/arith/*.cpp",
+ "src/tactic/bv/*.cpp",
+ "src/tactic/core/*.cpp",
+ "src/tactic/fd_solver/*.cpp",
+ "src/tactic/fpa/*.cpp",
+ "src/tactic/portfolio/*.cpp",
+ "src/tactic/sls/*.cpp",
+ "src/tactic/smtlogics/*.cpp",
+ "src/tactic/ufbv/*.cpp",
+ "src/test/fuzzing/*.cpp",
+ "src/util/*.cpp",
+ "src/util/lp/*.cpp",
+ ]),
+ hdrs = GEN_HDRS + glob([
+ "src/ackermannization/*.h",
+ "src/ackermannization/*.hpp",
+ "src/api/*.h",
+ "src/api/*.hpp",
+ "src/ast/*.h",
+ "src/ast/*.hpp",
+ "src/ast/fpa/*.h",
+ "src/ast/fpa/*.hpp",
+ "src/ast/macros/*.h",
+ "src/ast/macros/*.hpp",
+ "src/ast/normal_forms/*.h",
+ "src/ast/normal_forms/*.hpp",
+ "src/ast/pattern/*.h",
+ "src/ast/pattern/*.hpp",
+ "src/ast/proofs/*.h",
+ "src/ast/proofs/*.hpp",
+ "src/ast/rewriter/*.h",
+ "src/ast/rewriter/*.hpp",
+ "src/ast/rewriter/bit_blaster/*.h",
+ "src/ast/rewriter/bit_blaster/*.hpp",
+ "src/ast/substitution/*.h",
+ "src/ast/substitution/*.hpp",
+ "src/cmd_context/*.h",
+ "src/cmd_context/*.hpp",
+ "src/cmd_context/extra_cmds/*.h",
+ "src/cmd_context/extra_cmds/*.hpp",
+ "src/math/automata/*.h",
+ "src/math/automata/*.hpp",
+ "src/math/grobner/*.h",
+ "src/math/grobner/*.hpp",
+ "src/math/hilbert/*.h",
+ "src/math/hilbert/*.hpp",
+ "src/math/interval/*.h",
+ "src/math/interval/*.hpp",
+ "src/math/dd/*.h",
+ "src/math/dd/*.hpp",
+ "src/math/euclid/*.h",
+ "src/math/euclid/*.hpp",
+ "src/math/lp/*.h",
+ "src/math/lp/*.hpp",
+ "src/math/polynomial/*.h",
+ "src/math/polynomial/*.hpp",
+ "src/math/simplex/*.h",
+ "src/math/simplex/*.hpp",
+ "src/math/realclosure/*.h",
+ "src/math/realclosure/*.hpp",
+ "src/math/subpaving/*.h",
+ "src/math/subpaving/*.hpp",
+ "src/math/subpaving/tactic/*.h",
+ "src/math/subpaving/tactic/*.hpp",
+ "src/model/*.h",
+ "src/model/*.hpp",
+ "src/muz/base/*.h",
+ "src/muz/base/*.hpp",
+ "src/muz/bmc/*.h",
+ "src/muz/bmc/*.hpp",
+ "src/muz/clp/*.h",
+ "src/muz/clp/*.hpp",
+ "src/muz/dataflow/*.h",
+ "src/muz/dataflow/*.hpp",
+ "src/muz/ddnf/*.h",
+ "src/muz/ddnf/*.hpp",
+ "src/muz/fp/*.h",
+ "src/muz/fp/*.hpp",
+ "src/muz/rel/*.h",
+ "src/muz/rel/*.hpp",
+ "src/muz/spacer/*.h",
+ "src/muz/spacer/*.hpp",
+ "src/muz/tab/*.h",
+ "src/muz/tab/*.hpp",
+ "src/muz/transforms/*.h",
+ "src/muz/transforms/*.hpp",
+ "src/nlsat/*.h",
+ "src/nlsat/*.hpp",
+ "src/nlsat/tactic/*.h",
+ "src/nlsat/tactic/*.hpp",
+ "src/opt/*.h",
+ "src/opt/*.hpp",
+ "src/parsers/smt2/*.h",
+ "src/parsers/smt2/*.hpp",
+ "src/parsers/util/*.h",
+ "src/parsers/util/*.hpp",
+ "src/qe/*.h",
+ "src/qe/*.hpp",
+ "src/sat/*.h",
+ "src/sat/*.hpp",
+ "src/sat/sat_solver/*.h",
+ "src/sat/sat_solver/*.hpp",
+ "src/sat/tactic/*.h",
+ "src/sat/tactic/*.hpp",
+ "src/smt/*.h",
+ "src/smt/params/*.h",
+ "src/smt/proto_model/*.h",
+ "src/smt/tactic/*.h",
+ "src/smt/tactic/*.hpp",
+ "src/solver/*.h",
+ "src/solver/*.hpp",
+ "src/tactic/*.h",
+ "src/tactic/*.hpp",
+ "src/tactic/aig/*.h",
+ "src/tactic/aig/*.hpp",
+ "src/tactic/arith/*.h",
+ "src/tactic/arith/*.hpp",
+ "src/tactic/core/*.h",
+ "src/tactic/core/*.hpp",
+ "src/tactic/bv/*.h",
+ "src/tactic/bv/*.hpp",
+ "src/tactic/fd_solver/*.h",
+ "src/tactic/fd_solver/*.hpp",
+ "src/tactic/fpa/*.h",
+ "src/tactic/fpa/*.hpp",
+ "src/tactic/portfolio/*.h",
+ "src/tactic/portfolio/*.hpp",
+ "src/tactic/sls/*.h",
+ "src/tactic/sls/*.hpp",
+ "src/tactic/smtlogics/*.h",
+ "src/tactic/smtlogics/*.hpp",
+ "src/tactic/ufbv/*.h",
+ "src/tactic/ufbv/*.hpp",
+ "src/test/fuzzing/*.h",
+ "src/test/fuzzing/*.hpp",
+ "src/util/*.h",
+ "src/util/*.hpp",
+ "src/util/lp/*.h",
+ "src/util/lp/*.hpp",
+ ]),
+ copts = common_copts,
+ #features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = [
+ "src/util",
+ "src/",
+ ],
+)
+
+cc_library(
+ name = "api",
+ hdrs = glob(
+ [
+ "src/api/z3*.h",
+ "src/api/c++/z3++.h",
+ ],
+ ),
+ deps = [":z3lib"],
+ visibility = ["//visibility:public"],
+)
+
+cc_binary(
+ name = "z3",
+ srcs = glob(
+ [
+ "src/shell/*.cpp",
+ "src/shell/*.h",
+ ],
+ exclude = [
+ "src/shell/gparams_register_modules.cpp",
+ "src/shell/install_tactic.cpp",
+ "src/shell/mem_initializer.cpp",
+ ],
+ ),
+ copts = common_copts,
+ linkopts = common_linkopts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = ["src/shell"],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":z3lib",
+ ],
+)
+
+cc_binary(
+ name = "test-z3",
+ srcs = glob(
+ [
+ "src/test/*.cpp",
+ "src/test/*.h",
+ ],
+ exclude = [
+ "src/test/gparams_register_modules.cpp",
+ "src/test/install_tactic.cpp",
+ "src/test/mem_initializer.cpp",
+ ],
+ ),
+ copts = common_copts,
+ linkopts = common_linkopts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = ["src/test"],
+ visibility = ["//visibility:public"],
+ deps = [
+ ":z3lib",
+ ],
+)
+
+cc_binary(
+ name = "cpp_example",
+ srcs = glob(
+ [
+ "examples/c++/*.cpp",
+ "examples/c++/*.h",
+ ],
+ ),
+ copts = [
+ "-fexceptions",
+ "-Wno-implicit-function-declaration",
+ "-Wno-sometimes-uninitialized",
+ "-Wno-unused-variable",
+ ],
+ linkopts = common_linkopts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = ["examples/c++"],
+ deps = [":api"],
+)
+
+cc_binary(
+ name = "c_example",
+ srcs = glob(
+ [
+ "examples/c/*.c",
+ "examples/c/*.h",
+ ],
+ ),
+ copts = [
+ "-fexceptions",
+ "-Wno-implicit-function-declaration",
+ "-Wno-sometimes-uninitialized",
+ "-Wno-unused-variable",
+ ],
+ linkopts = common_linkopts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = ["examples/c"],
+ deps = [":api"],
+)
+
+cc_binary(
+ name = "maxsat",
+ srcs = glob(
+ [
+ "examples/maxsat/*.c",
+ "examples/maxsat/*.h",
+ ],
+ ),
+ copts = [
+ "-fexceptions",
+ "-Wno-implicit-function-declaration",
+ "-Wno-sometimes-uninitialized",
+ "-Wno-unused-variable",
+ ],
+ linkopts = common_linkopts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ includes = ["examples/maxsat"],
+ deps = [":api"],
+)
+
+cc_library(
+ name = "z3main",
+ srcs = glob(
+ [
+ "src/shell/*.cpp",
+ "src/shell/*.h",
+ ],
+ exclude = [
+ "src/shell/gparams_register_modules.cpp",
+ "src/shell/install_tactic.cpp",
+ "src/shell/mem_initializer.cpp",
+ ],
+ ),
+ copts = ["-Dmain=z3_main"] + common_copts,
+ features = ["-use_header_modules"], # Incompatible with -fexceptions.
+ deps = [
+ ":z3lib",
+ ],
+)
+
+modules = [
+ "random",
+ "vector",
+ "symbol_table",
+ "region",
+ "symbol",
+ "heap",
+ "hashtable",
+ "rational",
+ "inf_rational",
+ "ast",
+ "optional",
+ "bit_vector",
+ "string_buffer",
+ "map",
+ "diff_logic",
+ "uint_set",
+ "expr_rand",
+ "list",
+ "small_object_allocator",
+ "timeout",
+ "proof_checker",
+ "simplifier",
+ "bit_blaster",
+ "var_subst",
+ "simple_parser",
+ "api",
+ "old_interval",
+ "get_implied_equalities",
+ "arith_simplifier_plugin",
+ "matcher",
+ "object_allocator",
+ "mpq",
+ "total_order",
+ "dl_table",
+ "dl_context",
+ "dl_util",
+ "dl_product_relation",
+ "dl_relation",
+ "parray",
+ "stack",
+ "escaped",
+ "buffer",
+ "chashtable",
+ "ex",
+ "api_bug",
+ "arith_rewriter",
+ "check_assumptions",
+ "smt_context",
+ "theory_dl",
+ "model_retrieval",
+ "factor_rewriter",
+ "smt2print_parse",
+ "substitution",
+ "polynomial",
+ "upolynomial",
+ "algebraic",
+ "prime_generator",
+ "permutation",
+ "ext_numeral",
+ "interval",
+ "f2n",
+ "hwf",
+ "trigo",
+ "bits",
+ "mpbq",
+ "mpfx",
+ "mpff",
+ "horn_subsume_model_converter",
+ "model2expr",
+ "hilbert_basis",
+ "heap_trie",
+ "karr",
+ "no_overflow",
+ "datalog_parser",
+ "datalog_parser_file",
+ "rcf",
+ "polynorm",
+ "dl_query",
+ "expr_substitution",
+]
+
+failed_modules = [
+ "memory", # TODO(b/122357007): Fails despite being a NOP on non-Windows platforms
+ "nlarith_util",
+ "nlsat",
+ "quant_solve",
+ "qe_arith",
+ # TODO(b/67053323): Following fail with asan.
+ "mpz",
+ "bv_simplifier_plugin",
+]
+
+medium_modules = [
+ "mpf",
+]
diff --git a/xls/BUILD b/xls/BUILD
new file mode 100644
index 0000000000..9d38dd0c68
--- /dev/null
+++ b/xls/BUILD
@@ -0,0 +1,29 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# XLS: Accelerator Synthesis
+
+package_group(
+ name = "xls_internal",
+ packages = [
+ "//xls/...",
+ ],
+)
+
+package(
+ default_visibility = [":xls_internal"],
+ licenses = ["notice"], # Apache 2.0
+)
+
+exports_files(["LICENSE"])
diff --git a/xls/README.md b/xls/README.md
new file mode 100644
index 0000000000..78414c5b30
--- /dev/null
+++ b/xls/README.md
@@ -0,0 +1,3 @@
+# XLS: Accelerator Synthesis
+
+Open source landing zone.
diff --git a/xls/build/BUILD b/xls/build/BUILD
new file mode 100644
index 0000000000..ea4b341092
--- /dev/null
+++ b/xls/build/BUILD
@@ -0,0 +1,18 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+package(
+ default_visibility = [":xls_internal"],
+ licenses = ["notice"], # Apache 2.0
+)
diff --git a/xls/build/build_defs.bzl b/xls/build/build_defs.bzl
new file mode 100644
index 0000000000..b433ee8635
--- /dev/null
+++ b/xls/build/build_defs.bzl
@@ -0,0 +1,369 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Contains macros for DSLX test targets."""
+
+# genrules are used in this file
+load("@bazel_skylib//rules:build_test.bzl", "build_test")
+
+_IR_CONVERTER_MAIN = "//xls/dslx:ir_converter_main"
+_OPT_MAIN = "//xls/tools:opt_main"
+_CODEGEN_MAIN = "//xls/tools:codegen_main"
+_DSLX_TEST = "//xls/dslx/interpreter:dslx_test"
+_INTERPRETER_MAIN = "//xls/dslx/interpreter:interpreter_main"
+
+DEFAULT_DELAY_MODEL = "unit"
+
+def _codegen_stem(codegen_params):
+ """Returns a string based on codegen params for use in target names.
+
+ String contains notable elements from ths codegen parameters such as clock
+ period, delay model, etc.
+
+ Args:
+ codegen_params: Codegen parameters.
+
+ Returns:
+ String based on codegen params.
+ """
+ delay_model = codegen_params.get("delay_model", DEFAULT_DELAY_MODEL)
+ if "clock_period_ps" in codegen_params:
+ return "clock_{}ps_model_{}".format(
+ codegen_params["clock_period_ps"],
+ delay_model,
+ )
+ else:
+ return "stages_{}_model_{}".format(
+ codegen_params["pipeline_stages"],
+ delay_model,
+ )
+
+def _codegen(
+ name,
+ srcs,
+ codegen_params,
+ entry = None,
+ tags = []):
+ """Generates a Verilog file by running codegen_main on the source IR files.
+
+ Args:
+ name: Name of the Verilog file to generate.
+ srcs: IR sources.
+ codegen_params: Codegen configuration used for Verilog generation.
+ entry: Name of entry function to codegen.
+ tags: Tags to add to RTL target.
+ """
+ codegen_flags = []
+ codegen_flags.append("--delay_model=" +
+ codegen_params.get("delay_model", DEFAULT_DELAY_MODEL))
+
+ CODEGEN_FLAGS = (
+ "clock_period_ps",
+ "pipeline_stages",
+ "entry",
+ "input_valid_signal",
+ "output_valid_signal",
+ "module_name",
+ "clock_margin_percent",
+ )
+ for flag_name in CODEGEN_FLAGS:
+ if flag_name in codegen_params:
+ codegen_flags.append("--{}={}".format(
+ flag_name,
+ codegen_params[flag_name],
+ ))
+ verilog_file = name + ".v"
+ module_sig_file = name + ".sig.pbtxt"
+ native.genrule(
+ name = name,
+ srcs = srcs,
+ outs = [verilog_file, module_sig_file],
+ cmd = ("$(location %s) %s --output_signature_path=$(@D)/%s " +
+ "--output_verilog_path=$(@D)/%s $<") % (
+ _CODEGEN_MAIN,
+ " ".join(codegen_flags),
+ module_sig_file,
+ verilog_file,
+ ),
+ exec_tools = [_CODEGEN_MAIN],
+ tags = tags,
+ )
+
+def _make_benchmark_args(package_name, name, entry, args):
+ benchmark_args = [package_name + "/" + name + ".ir"]
+ if entry:
+ benchmark_args.append("--entry={}".format(entry))
+ benchmark_args += args
+ return benchmark_args
+
+def dslx_codegen(name, dslx_dep, configs, entry = None, tags = None):
+ """Exercises code generation to create Verilog (post IR conversion).
+
+ Multiple code generation configurations can be given.
+
+ Args:
+ name: Describes base name of the targets to create; must be suffixed with
+ "_codegen".
+ dslx_dep: A label that indicates where the IR targets live;
+ that is, it is the corresponding dslx_test rule's "name" as a label.
+ configs: List of code-generation configurations, which can specify
+ any/all of: clock_period_ps, pipeline_stages, entry,
+ clock_margin_percent, delay_model.
+ entry: Entry function name to use for code generation.
+ tags: Tags to use for the resulting test targets.
+ """
+ if not name.endswith("_codegen"):
+ fail("Codegen name must end with '_codegen': " + repr(name))
+ base_name = name[:-len("_codegen")]
+ tags = tags or []
+ package_name = dslx_dep.split(":")[0].lstrip("/") or native.package_name()
+ for params in configs:
+ _codegen(
+ name = "{}_{}".format(base_name, _codegen_stem(params)),
+ srcs = [dslx_dep + "_opt_ir"],
+ codegen_params = params,
+ entry = entry,
+ tags = tags,
+ )
+
+ # Also create a codegen benchmark target.
+ codegen_benchmark_args = _make_benchmark_args(package_name, base_name + ".opt", entry, args = [])
+ codegen_benchmark_args.append("--delay_model={}".format(
+ params.get("delay_model", DEFAULT_DELAY_MODEL),
+ ))
+ for flag_name in (
+ "clock_period_ps",
+ "pipeline_stages",
+ "entry",
+ "clock_margin_percent",
+ ):
+ if flag_name in params:
+ codegen_benchmark_args.append("--{}={}".format(
+ flag_name,
+ params[flag_name],
+ ))
+
+ native.sh_test(
+ name = "{}_benchmark_codegen_test_{}".format(
+ base_name,
+ _codegen_stem(params),
+ ),
+ srcs = ["//xls/tools:benchmark_test_sh"],
+ args = codegen_benchmark_args,
+ data = [
+ "//xls/dslx:ir_converter_main",
+ "//xls/tools:benchmark_main",
+ "//xls/tools:opt_main",
+ dslx_dep + "_all_ir",
+ ],
+ tags = tags,
+ )
+
+# TODO(meheff): dslx_test includes a bunch of XLS internal specific stuff such
+# as generating benchmarks and convert IR. These should be factored out so we
+# have a clean macro for end-user use.
+def dslx_test(
+ name,
+ srcs,
+ deps = None,
+ entry = None,
+ args = None,
+ convert_ir = True,
+ prove_unopt_eq_opt = True,
+ generate_benchmark = True,
+ tags = []):
+ """Runs all test cases inside of a DSLX source file as a test target.
+
+ Args:
+ name: 'Base' name for the targets that get created.
+ srcs: '.x' file sources.
+ deps: Dependent '.x' file sources.
+ entry: Name (currently *mangled* name) of the entry point that should be
+ converted / code generated.
+ args: Additional arguments to pass to the DSLX interpreter and IR
+ converter.
+ convert_ir: Whether or not to convert the DSLX code to IR.
+ generate_benchmark: Whether or not to create a benchmark target (that
+ analyses XLS scheduled critical path).
+ prove_unopt_eq_opt: Whether or not to generate a test to compare semantics
+ of opt vs. non-opt IR. Only enabled if convert_ir is true.
+ tags: Tags to place on all generated targets.
+ """
+ args = args or []
+ deps = deps or []
+ if len(srcs) != 1:
+ fail("More than one source not currently supported.")
+ if entry and not type(entry) != str:
+ fail("Entry argument must be a string.")
+ src = srcs[0]
+
+ native.sh_test(
+ name = name + "_dslx_test",
+ srcs = [_DSLX_TEST],
+ args = [native.package_name() + "/" + src] + args,
+ data = [
+ _INTERPRETER_MAIN,
+ src,
+ ] + deps,
+ tags = tags,
+ )
+
+ # TODO(meheff): Move this to a different internal-only bzl file.
+ if convert_ir:
+ native.sh_test(
+ name = name + "_ir_converter_test",
+ srcs = ["//xls/dslx:ir_converter_test_sh"],
+ args = [native.package_name() + "/" + src] + args,
+ data = [
+ "//xls/dslx:ir_converter_main",
+ src,
+ ] + deps,
+ tags = tags,
+ )
+ native.genrule(
+ name = name + "_ir",
+ srcs = [src] + deps,
+ outs = [name + ".ir"],
+ cmd = "$(location //xls/dslx:ir_converter_main) $(SRCS) > $@",
+ exec_tools = ["//xls/dslx:ir_converter_main"],
+ tags = tags,
+ )
+ native.genrule(
+ name = name + "_opt_ir",
+ srcs = [src] + deps,
+ outs = [name + ".opt.ir"],
+ cmd = "$(location //xls/dslx:ir_converter_main) $(SRCS) | $(location //xls/tools:opt_main) --entry=%s - > $@" % (entry or ""),
+ exec_tools = [
+ "//xls/dslx:ir_converter_main",
+ "//xls/tools:opt_main",
+ ],
+ tags = tags,
+ )
+ native.filegroup(
+ name = name + "_all_ir",
+ srcs = [name + ".opt.ir", name + ".ir"],
+ )
+
+ if prove_unopt_eq_opt:
+ native.sh_test(
+ name = name + "_opt_equivalence_test",
+ srcs = ["//xls/tools:check_ir_equivalence_sh"],
+ args = [
+ native.package_name() + "/" + name + ".ir",
+ native.package_name() + "/" + name + ".opt.ir",
+ ] + (["--function=" + entry] if entry else []),
+ size = "large",
+ data = [
+ ":" + name + "_all_ir",
+ "//xls/tools:check_ir_equivalence_main",
+ ],
+ #tags = tags + ["manual", "optonly"],
+ tags = tags + ["optonly"],
+ )
+
+ if generate_benchmark:
+ benchmark_args = _make_benchmark_args(native.package_name(), name, entry, args)
+
+ # Add test which executes benchmark_main on the IR.
+ native.sh_test(
+ name = name + "_benchmark_test",
+ srcs = ["//xls/tools:benchmark_test_sh"],
+ args = benchmark_args,
+ data = [
+ "//xls/tools:benchmark_main",
+ ":" + name + "_all_ir",
+ ],
+ tags = tags,
+ )
+
+ # Add test which evaluates the IR with the interpreter and verifies
+ # the result before and after optimizations match.
+ native.sh_test(
+ name = name + "_benchmark_eval_test",
+ srcs = ["//xls/tools:benchmark_eval_test_sh"],
+ args = benchmark_args + ["--random_inputs=100", "--optimize_ir"],
+ data = [
+ "//xls/tools:eval_ir_main",
+ ":" + name + "_all_ir",
+ ],
+ tags = tags + ["optonly"],
+ )
+
+ native.filegroup(
+ name = name + "_source",
+ srcs = srcs,
+ )
+ native.test_suite(
+ name = name,
+ tests = [name + "_dslx_test"],
+ tags = tags,
+ )
+
+# TODO(meheff): This macro should define some tests to sanity check the
+# generated RTL.
+def dslx_generated_rtl(
+ name,
+ srcs,
+ codegen_params,
+ deps = None,
+ entry = None,
+ tags = []):
+ """Generates RTL from DSLX sources using a released toolchain.
+
+ Args:
+ name: Base name for the targets that get created. The Verilog file will
+ have the name '{name}.v'.
+ srcs: '.x' file sources.
+ codegen_params: Codegen configuration used for Verilog generation.
+ deps: Dependent '.x' file sources.
+ entry: Name of entry function to codegen.
+ tags: Tags to place on all generated targets.
+ """
+ deps = deps or []
+ if len(srcs) != 1:
+ fail("More than one source not currently supported.")
+ src = srcs[0]
+
+ native.genrule(
+ name = name + "_ir",
+ srcs = [src] + deps,
+ outs = [name + ".ir"],
+ cmd = "$(location %s) $(SRCS) > $@" % _IR_CONVERTER_MAIN,
+ exec_tools = [_IR_CONVERTER_MAIN],
+ tags = tags,
+ )
+
+ native.genrule(
+ name = name + "_opt_ir",
+ srcs = [":{}_ir".format(name)],
+ outs = [name + ".opt.ir"],
+ cmd = "$(location %s) --entry=%s $(SRCS) > $@" % (_OPT_MAIN, entry or ""),
+ exec_tools = [_OPT_MAIN],
+ tags = tags,
+ )
+
+ _codegen(
+ name,
+ srcs = [name + "_opt_ir"],
+ codegen_params = codegen_params,
+ entry = entry,
+ tags = tags,
+ )
+
+ # Add a build test to ensure changes to BUILD and bzl files do not break
+ # targets built with released toolchains.
+ build_test(
+ name = name + "_build_test",
+ targets = [":" + name],
+ )
diff --git a/xls/build/elab_test.bzl b/xls/build/elab_test.bzl
new file mode 100644
index 0000000000..37556b7d7d
--- /dev/null
+++ b/xls/build/elab_test.bzl
@@ -0,0 +1,19 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Build rules for elaboration tests."""
+
+def elab_test(name, src, hdrs, top):
+ """No elaboration / lint checking yet in OSS builds."""
+ pass
diff --git a/xls/build/iverilog_test.bzl b/xls/build/iverilog_test.bzl
new file mode 100644
index 0000000000..040b95c2a9
--- /dev/null
+++ b/xls/build/iverilog_test.bzl
@@ -0,0 +1,88 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Contains internal XLS macros."""
+
+load("//xls/build:elab_test.bzl", "elab_test")
+
+def iverilog_test(name, top, main, srcs, execute = True, tick_defines = None):
+ """Defines Icarus Verilog test, with associated elaboration test.
+
+ The elaboration test helps to identify issues where iverilog is overly
+ lenient.
+
+ Args:
+ name: Name of the target. This name will be a suite of the elaboration test
+ (-elab_test suffix) and iverilog simulation test (-run_test suffix).
+ top: Top-level module name for the test to run.
+ main: Main source file to compile via iverilog.
+ srcs: Supporting source files, including ``main``.
+ execute: If true then run the test through Iverilog. Otherwise only linting
+ and elaboration is performed.
+ tick_defines: A map containing Verilog tick-defines
+ (eg, "`define FOO 0").
+ """
+ if main not in srcs:
+ fail("main verilog source %r not in srcs %r" % (main, srcs))
+
+ tick_defines = tick_defines or {}
+
+ tests = []
+
+ et = elab_test(
+ name,
+ src = main,
+ hdrs = [src for src in srcs if src != main],
+ top = top,
+ )
+ if et:
+ tests.append(et)
+
+ defines = " ".join(
+ ["-D{}={}".format(k, v) for (k, v) in sorted(tick_defines.items())],
+ )
+
+ native.genrule(
+ name = name + "-iverilog-build",
+ srcs = srcs,
+ # Note: GENDIR is a builtin environment variable for genrule commands
+ # that points at the genfiles' location, we have to add it to the
+ # searched set of paths for inclusions so we can include generated
+ # verilog files as we can generated C++ files in cc_library rules.
+ cmd = "$(location @com_icarus_iverilog//:iverilog) -s %s $(location %s) %s -o $@ -g2001 -I$(GENDIR)" % (top, main, defines),
+ outs = [name + ".iverilog.out"],
+ exec_tools = ["@com_icarus_iverilog//:iverilog"],
+ )
+ if execute:
+ native.genrule(
+ name = name + "-vvp-runner",
+ srcs = [":" + name + "-iverilog-build"],
+ cmd = "$(location //xls/tools:generate_vvp_runner) $< > $@",
+ outs = [name + "-vvp-runner.sh"],
+ exec_tools = ["//xls/tools:generate_vvp_runner"],
+ )
+ native.sh_test(
+ name = name + "-run_test",
+ srcs = [":" + name + "-vvp-runner"],
+ data = [
+ ":" + name + "-iverilog-build",
+ "@com_icarus_iverilog//:vvp",
+ ],
+ )
+ tests.append(":" + name + "-run_test")
+
+ native.test_suite(
+ name = name,
+ tests = tests,
+ )
diff --git a/xls/build/py_proto_library.bzl b/xls/build/py_proto_library.bzl
new file mode 100644
index 0000000000..79580b6a0b
--- /dev/null
+++ b/xls/build/py_proto_library.bzl
@@ -0,0 +1,24 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Adapter between open source and Google-internal py_proto_library rules."""
+
+load("@com_google_protobuf//:protobuf.bzl", "py_proto_library")
+
+def xls_py_proto_library(name, internal_deps, srcs, deps = []):
+ py_proto_library(
+ name = name,
+ srcs = srcs,
+ deps = deps,
+ )
diff --git a/xls/build/pybind11.bzl b/xls/build/pybind11.bzl
new file mode 100644
index 0000000000..7c08996f37
--- /dev/null
+++ b/xls/build/pybind11.bzl
@@ -0,0 +1,23 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Adapter for Google-internal pybind_extension rule vs OSS rule."""
+
+load("//third_party/pybind11_bazel:build_defs.bzl", "pybind_extension")
+
+def xls_pybind_extension(**kwargs):
+ py_deps = kwargs.pop("py_deps", [])
+ deps = kwargs.pop("deps", [])
+ kwargs["deps"] = py_deps + deps
+ pybind_extension(**kwargs)
diff --git a/xls/codegen/BUILD b/xls/codegen/BUILD
new file mode 100644
index 0000000000..0c9bb27d88
--- /dev/null
+++ b/xls/codegen/BUILD
@@ -0,0 +1,341 @@
+# Copyright 2020 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+# cc_proto_library is used in this file
+load("//xls/build:py_proto_library.bzl", "xls_py_proto_library")
+
+package(
+ default_visibility = ["//xls:xls_internal"],
+ licenses = ["notice"], # Apache 2.0
+)
+
+cc_library(
+ name = "name_to_bit_count",
+ hdrs = ["name_to_bit_count.h"],
+ deps = [
+ "@com_google_absl//absl/container:flat_hash_map",
+ "@com_google_absl//absl/strings",
+ "//xls/common:integral_types",
+ "//xls/ir:bits",
+ "//xls/ir:type",
+ ],
+)
+
+cc_library(
+ name = "combinational_generator",
+ srcs = ["combinational_generator.cc"],
+ hdrs = ["combinational_generator.h"],
+ deps = [
+ ":flattening",
+ ":module_builder",
+ ":module_signature",
+ ":name_to_bit_count",
+ ":node_expressions",
+ ":vast",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/strings:str_format",
+ "//xls/common/logging",
+ "//xls/common/logging:log_lines",
+ "//xls/common/status:ret_check",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir",
+ ],
+)
+
+cc_test(
+ name = "combinational_generator_test",
+ srcs = ["combinational_generator_test.cc"],
+ data = glob([
+ "testdata/combinational_generator_test_*",
+ ]),
+ shard_count = 10,
+ deps = [
+ ":combinational_generator",
+ "//xls/common/status:matchers",
+ "//xls/examples:sample_packages",
+ "//xls/ir",
+ "//xls/ir:function_builder",
+ "//xls/ir:ir_interpreter",
+ "//xls/ir:ir_parser",
+ "//xls/ir:value_helpers",
+ "//xls/simulation:module_simulator",
+ "//xls/simulation:verilog_simulators",
+ "//xls/simulation:verilog_test_base",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_library(
+ name = "vast",
+ srcs = ["vast.cc"],
+ hdrs = ["vast.h"],
+ deps = [
+ ":module_signature_cc_proto",
+ "@com_google_absl//absl/algorithm:container",
+ "@com_google_absl//absl/flags:flag",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/strings:str_format",
+ "@com_google_absl//absl/types:optional",
+ "@com_google_absl//absl/types:variant",
+ "//xls/common:indent",
+ "//xls/common:visitor",
+ "//xls/common/logging",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir:bits",
+ "@com_google_re2//:re2",
+ ],
+)
+
+cc_library(
+ name = "finite_state_machine",
+ srcs = ["finite_state_machine.cc"],
+ hdrs = ["finite_state_machine.h"],
+ deps = [
+ ":vast",
+ "@com_google_absl//absl/algorithm:container",
+ "@com_google_absl//absl/container:flat_hash_map",
+ "@com_google_absl//absl/status",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/types:optional",
+ "//xls/common:casts",
+ "//xls/common/logging",
+ "//xls/common/status:status_macros",
+ ],
+)
+
+cc_test(
+ name = "vast_test",
+ srcs = ["vast_test.cc"],
+ deps = [
+ ":vast",
+ "@com_google_absl//absl/strings",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_test(
+ name = "finite_state_machine_test",
+ srcs = ["finite_state_machine_test.cc"],
+ data = glob(["testdata/finite_state_machine_test_*"]),
+ deps = [
+ ":finite_state_machine",
+ ":vast",
+ "//xls/common/logging",
+ "//xls/common/status:matchers",
+ "//xls/simulation:verilog_test_base",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_library(
+ name = "pipeline_generator",
+ srcs = ["pipeline_generator.cc"],
+ hdrs = ["pipeline_generator.h"],
+ deps = [
+ ":finite_state_machine",
+ ":flattening",
+ ":module_builder",
+ ":module_signature",
+ ":module_signature_cc_proto",
+ ":name_to_bit_count",
+ ":node_expressions",
+ ":vast",
+ "@com_google_absl//absl/algorithm:container",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/strings:str_format",
+ "@com_google_absl//absl/types:optional",
+ "//xls/common/logging",
+ "//xls/common/logging:log_lines",
+ "//xls/common/status:ret_check",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/delay_model:delay_estimator",
+ "//xls/delay_model:delay_estimators",
+ "//xls/ir",
+ "//xls/scheduling:pipeline_schedule",
+ ],
+)
+
+cc_library(
+ name = "module_signature",
+ srcs = ["module_signature.cc"],
+ hdrs = ["module_signature.h"],
+ deps = [
+ ":module_signature_cc_proto",
+ ":vast",
+ "@com_google_absl//absl/container:flat_hash_map",
+ "@com_google_absl//absl/container:flat_hash_set",
+ "@com_google_absl//absl/status",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/strings:str_format",
+ "@com_google_absl//absl/types:optional",
+ "//xls/common/logging",
+ "//xls/common/status:ret_check",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir",
+ "//xls/ir:type",
+ "//xls/ir:value",
+ ],
+)
+
+cc_library(
+ name = "node_expressions",
+ srcs = ["node_expressions.cc"],
+ hdrs = ["node_expressions.h"],
+ deps = [
+ ":flattening",
+ ":vast",
+ "@com_google_absl//absl/status",
+ "@com_google_absl//absl/strings:str_format",
+ "@com_google_absl//absl/types:span",
+ "//xls/common/logging",
+ "//xls/common/status:ret_check",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir",
+ "//xls/ir:type",
+ ],
+)
+
+cc_library(
+ name = "flattening",
+ srcs = ["flattening.cc"],
+ hdrs = ["flattening.h"],
+ deps = [
+ ":vast",
+ "@com_google_absl//absl/status",
+ "@com_google_absl//absl/types:span",
+ "//xls/common/logging",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir",
+ "//xls/ir:bits",
+ "//xls/ir:bits_ops",
+ "//xls/ir:type",
+ "//xls/ir:value",
+ "//xls/ir:xls_type_cc_proto",
+ ],
+)
+
+cc_library(
+ name = "module_builder",
+ srcs = ["module_builder.cc"],
+ hdrs = ["module_builder.h"],
+ deps = [
+ ":flattening",
+ ":node_expressions",
+ ":vast",
+ "@com_google_absl//absl/container:flat_hash_map",
+ "@com_google_absl//absl/status",
+ "@com_google_absl//absl/strings",
+ "@com_google_absl//absl/types:span",
+ "//xls/common/logging",
+ "//xls/common/status:ret_check",
+ "//xls/common/status:status_macros",
+ "//xls/common/status:statusor",
+ "//xls/ir",
+ "//xls/ir:type",
+ "//xls/ir:value",
+ ],
+)
+
+proto_library(
+ name = "module_signature_proto",
+ srcs = ["module_signature.proto"],
+ deps = ["//xls/ir:xls_type_proto"],
+)
+
+cc_proto_library(
+ name = "module_signature_cc_proto",
+ deps = [":module_signature_proto"],
+)
+
+xls_py_proto_library(
+ name = "module_signature_py_pb2",
+ srcs = ["module_signature.proto"],
+ internal_deps = [
+ ":module_signature_proto",
+ "//xls/ir:xls_type_proto",
+ ],
+ deps = [
+ "//xls/ir:xls_type_py_pb2",
+ ],
+)
+
+cc_test(
+ name = "pipeline_generator_test",
+ srcs = ["pipeline_generator_test.cc"],
+ data = glob([
+ "testdata/pipeline_generator_test_*",
+ ]),
+ shard_count = 10,
+ deps = [
+ ":pipeline_generator",
+ "//xls/common/status:matchers",
+ "//xls/delay_model:delay_estimator",
+ "//xls/ir",
+ "//xls/ir:function_builder",
+ "//xls/scheduling:pipeline_schedule",
+ "//xls/simulation:module_simulator",
+ "//xls/simulation:module_testbench",
+ "//xls/simulation:verilog_test_base",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_test(
+ name = "module_signature_test",
+ srcs = ["module_signature_test.cc"],
+ deps = [
+ ":module_signature",
+ "//xls/common/status:matchers",
+ "//xls/ir:bits",
+ "//xls/ir:value",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_test(
+ name = "flattening_test",
+ srcs = ["flattening_test.cc"],
+ deps = [
+ ":flattening",
+ "//xls/common/status:matchers",
+ "//xls/ir:ir_test_base",
+ "//xls/ir:type",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
+
+cc_test(
+ name = "module_builder_test",
+ srcs = ["module_builder_test.cc"],
+ data = glob(["testdata/module_builder_test_*"]),
+ shard_count = 10,
+ deps = [
+ ":module_builder",
+ ":vast",
+ "//xls/common/status:matchers",
+ "//xls/ir",
+ "//xls/ir:bits",
+ "//xls/ir:function_builder",
+ "//xls/ir:type",
+ "//xls/ir:value",
+ "//xls/simulation:verilog_test_base",
+ "@com_google_googletest//:gtest_main",
+ ],
+)
diff --git a/xls/codegen/combinational_generator.cc b/xls/codegen/combinational_generator.cc
new file mode 100644
index 0000000000..e452d8c668
--- /dev/null
+++ b/xls/codegen/combinational_generator.cc
@@ -0,0 +1,123 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/combinational_generator.h"
+
+#include "absl/strings/str_cat.h"
+#include "absl/strings/str_format.h"
+#include "absl/strings/str_join.h"
+#include "absl/strings/str_split.h"
+#include "xls/codegen/flattening.h"
+#include "xls/codegen/module_builder.h"
+#include "xls/codegen/node_expressions.h"
+#include "xls/common/logging/log_lines.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/ret_check.h"
+#include "xls/common/status/status_macros.h"
+#include "xls/ir/dfs_visitor.h"
+#include "xls/ir/node.h"
+#include "xls/ir/node_iterator.h"
+
+namespace xls {
+namespace verilog {
+
+xabsl::StatusOr ToCombinationalModuleText(
+ Function* func, bool use_system_verilog) {
+ XLS_VLOG(2) << "Generating combinational module for function:";
+ XLS_VLOG_LINES(2, func->DumpIr());
+
+ VerilogFile f;
+ ModuleBuilder mb(func->name(), &f, /*use_system_verilog=*/use_system_verilog);
+
+ // Build the module signature.
+ ModuleSignatureBuilder sig_builder(mb.module()->name());
+ for (Param* param : func->params()) {
+ sig_builder.AddDataInput(param->name(),
+ param->GetType()->GetFlatBitCount());
+ }
+ const int64 output_width = func->return_value()->GetType()->GetFlatBitCount();
+ sig_builder.AddDataOutput("out", output_width);
+ sig_builder.WithFunctionType(func->GetType());
+ sig_builder.WithCombinationalInterface();
+ XLS_ASSIGN_OR_RETURN(ModuleSignature signature, sig_builder.Build());
+
+ // Map from Node* to the Verilog expression representing its value.
+ absl::flat_hash_map node_exprs;
+
+ // Add parameters explicitly so the input ports are added in the order they
+ // appear in the parameters of the function.
+ for (Param* param : func->params()) {
+ if (param->GetType()->GetFlatBitCount() == 0) {
+ XLS_RET_CHECK_EQ(param->users().size(), 0);
+ continue;
+ }
+ XLS_ASSIGN_OR_RETURN(
+ node_exprs[param],
+ mb.AddInputPort(param->As()->name(), param->GetType()));
+ }
+
+ for (Node* node : TopoSort(func)) {
+ if (node->Is()) {
+ // Parameters are added in the above loop.
+ continue;
+ }
+
+ // Verilog has no zero-bit data types so elide such types. They should have
+ // no uses.
+ if (node->GetType()->GetFlatBitCount() == 0) {
+ XLS_RET_CHECK_EQ(node->users().size(), 0);
+ continue;
+ }
+
+ // Emit non-bits-typed literals as module-level constants because in general
+ // these complicated types cannot be handled inline, and constructing them
+ // in Verilog may require a sequence of assignments.
+ if (node->Is() && !node->GetType()->IsBits()) {
+ XLS_ASSIGN_OR_RETURN(
+ node_exprs[node],
+ mb.DeclareModuleConstant(node->GetName(),
+ node->As()->value()));
+ continue;
+ }
+
+ std::vector inputs;
+ for (Node* operand : node->operands()) {
+ inputs.push_back(node_exprs.at(operand));
+ }
+ if (node->users().size() > 1 || node == func->return_value() ||
+ !mb.CanEmitAsInlineExpression(node)) {
+ XLS_ASSIGN_OR_RETURN(node_exprs[node],
+ mb.EmitAsAssignment(node->GetName(), node, inputs));
+ } else {
+ XLS_ASSIGN_OR_RETURN(node_exprs[node],
+ mb.EmitAsInlineExpression(node, inputs));
+ }
+ }
+
+ // Skip adding an output port to the Verilog module if the output is
+ // zero-width.
+ if (output_width > 0) {
+ XLS_RETURN_IF_ERROR(mb.AddOutputPort("out", func->return_value()->GetType(),
+ node_exprs.at(func->return_value())));
+ }
+ std::string text = f.Emit();
+
+ XLS_VLOG(2) << "Verilog output:";
+ XLS_VLOG_LINES(2, text);
+
+ return ModuleGeneratorResult{text, signature};
+}
+
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/combinational_generator.h b/xls/codegen/combinational_generator.h
new file mode 100644
index 0000000000..c0aefcd6da
--- /dev/null
+++ b/xls/codegen/combinational_generator.h
@@ -0,0 +1,38 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef THIRD_PARTY_XLS_CODEGEN_COMBINATIONAL_GENERATOR_H_
+#define THIRD_PARTY_XLS_CODEGEN_COMBINATIONAL_GENERATOR_H_
+
+#include
+
+#include "xls/codegen/module_signature.h"
+#include "xls/codegen/name_to_bit_count.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/status/statusor.h"
+#include "xls/ir/function.h"
+
+namespace xls {
+namespace verilog {
+
+// Emits the given function as a combinational Verilog module. If
+// use_system_verilog is true the generated module will be SystemVerilog
+// otherwise it will be Verilog.
+xabsl::StatusOr ToCombinationalModuleText(
+ Function* func, bool use_system_verilog = true);
+
+} // namespace verilog
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_COMBINATIONAL_GENERATOR_H_
diff --git a/xls/codegen/combinational_generator_test.cc b/xls/codegen/combinational_generator_test.cc
new file mode 100644
index 0000000000..3c4201a92d
--- /dev/null
+++ b/xls/codegen/combinational_generator_test.cc
@@ -0,0 +1,488 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/combinational_generator.h"
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "xls/common/status/matchers.h"
+#include "xls/examples/sample_packages.h"
+#include "xls/ir/function_builder.h"
+#include "xls/ir/ir_interpreter.h"
+#include "xls/ir/ir_parser.h"
+#include "xls/ir/package.h"
+#include "xls/ir/value_helpers.h"
+#include "xls/simulation/module_simulator.h"
+#include "xls/simulation/verilog_simulators.h"
+#include "xls/simulation/verilog_test_base.h"
+
+namespace xls {
+namespace verilog {
+namespace {
+
+using status_testing::IsOkAndHolds;
+
+constexpr char kTestName[] = "combinational_generator_test";
+constexpr char kTestdataPath[] = "xls/codegen/testdata";
+
+class CombinationalGeneratorTest : public VerilogTestBase {};
+
+TEST_P(CombinationalGeneratorTest, RrotToCombinationalText) {
+ auto rrot32_data = sample_packages::BuildRrot32();
+ Function* f = rrot32_data.second;
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.RunAndReturnSingleOutput(
+ {{"x", UBits(0x12345678ULL, 32)}, {"y", UBits(4, 32)}}),
+ IsOkAndHolds(UBits(0x81234567, 32)));
+}
+
+TEST_P(CombinationalGeneratorTest, RandomExpression) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u8);
+ auto c = fb.Param("c", u8);
+ auto a_minus_b = a - b;
+ auto lhs = (a_minus_b * a_minus_b);
+ auto rhs = (c * a_minus_b);
+ auto out = lhs + rhs;
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.BuildWithReturnValue(out));
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ // Value should be: (7-2)*(7-2) + 3*(7-2) = 40
+ EXPECT_THAT(simulator.RunAndReturnSingleOutput(
+ {{"a", UBits(7, 8)}, {"b", UBits(2, 8)}, {"c", UBits(3, 8)}}),
+ IsOkAndHolds(UBits(40, 8)));
+}
+
+TEST_P(CombinationalGeneratorTest, ReturnsLiteral) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ fb.Literal(UBits(123, 8));
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.RunAndReturnSingleOutput(ModuleSimulator::BitsMap()),
+ IsOkAndHolds(UBits(123, 8)));
+}
+
+TEST_P(CombinationalGeneratorTest, ReturnsTupleLiteral) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ fb.Literal(Value::Tuple({Value(UBits(123, 8)), Value(UBits(42, 32))}));
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(
+ simulator.Run(absl::flat_hash_map()),
+ IsOkAndHolds(Value::Tuple({Value(UBits(123, 8)), Value(UBits(42, 32))})));
+}
+
+TEST_P(CombinationalGeneratorTest, ReturnsEmptyTuple) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ fb.Literal(Value::Tuple({}));
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run(absl::flat_hash_map()),
+ IsOkAndHolds(Value::Tuple({})));
+}
+
+TEST_P(CombinationalGeneratorTest, PassesEmptyTuple) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ fb.Param("x", package.GetTupleType({}));
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"x", Value::Tuple({})}}),
+ IsOkAndHolds(Value::Tuple({})));
+}
+
+TEST_P(CombinationalGeneratorTest, TakesEmptyTuple) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ auto a = fb.Param("a", u8);
+ fb.Param("b", package.GetTupleType({}));
+ auto c = fb.Param("c", u8);
+ fb.Add(a, c);
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"a", Value(UBits(42, 8))},
+ {"b", Value::Tuple({})},
+ {"c", Value(UBits(100, 8))}}),
+ IsOkAndHolds(Value(UBits(142, 8))));
+}
+
+TEST_P(CombinationalGeneratorTest, ReturnsParam) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ fb.Param("a", u8);
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.RunAndReturnSingleOutput({{"a", UBits(0x42, 8)}}),
+ IsOkAndHolds(UBits(0x42, 8)));
+}
+
+TEST_P(CombinationalGeneratorTest, ExpressionWhichRequiresNamedIntermediate) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u8);
+ auto a_plus_b = a + b;
+ auto out = fb.BitSlice(a_plus_b, /*start=*/3, /*width=*/4);
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.BuildWithReturnValue(out));
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.RunAndReturnSingleOutput(
+ {{"a", UBits(0x42, 8)}, {"b", UBits(0x33, 8)}}),
+ IsOkAndHolds(UBits(14, 4)));
+}
+
+TEST_P(CombinationalGeneratorTest, ExpressionsOfTuples) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ Type* u10 = package.GetBitsType(10);
+ Type* u16 = package.GetBitsType(16);
+ Type* tuple_u10_u16 = package.GetTupleType({u10, u16});
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u10);
+ auto c = fb.Param("c", tuple_u10_u16);
+
+ // Glom all the inputs together into a big tuple.
+ auto a_b_c = fb.Tuple({a, b, c});
+
+ // Then extract some elements and perform some arithmetic operations on them
+ // after zero-extending them to the same width (16-bits).
+ auto a_plus_b = fb.ZeroExtend(fb.TupleIndex(a_b_c, 0), 16) +
+ fb.ZeroExtend(fb.TupleIndex(a_b_c, 1), 16);
+ auto c_tmp = fb.TupleIndex(a_b_c, 2);
+ auto c0_minus_c1 =
+ fb.ZeroExtend(fb.TupleIndex(c_tmp, 0), 16) - fb.TupleIndex(c_tmp, 1);
+
+ // Result should be a two-tuple containing {a + b, c[0] - c[1]}
+ auto return_value = fb.Tuple({a_plus_b, c0_minus_c1});
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.BuildWithReturnValue(return_value));
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"a", Value(UBits(42, 8))},
+ {"b", Value(UBits(123, 10))},
+ {"c", Value::Tuple({Value(UBits(333, 10)),
+ Value(UBits(222, 16))})}}),
+ IsOkAndHolds(Value::Tuple(
+ {Value(UBits(165, 16)), Value(UBits(111, 16))})));
+}
+
+TEST_P(CombinationalGeneratorTest, TupleLiterals) {
+ std::string text = R"(
+package TupleLiterals
+
+fn main(x: bits[123]) -> bits[123] {
+ literal.1: (bits[123], bits[123], bits[123]) = literal(value=(0x10000, 0x2000, 0x300))
+ tuple_index.2: bits[123] = tuple_index(literal.1, index=0)
+ tuple_index.3: bits[123] = tuple_index(literal.1, index=1)
+ tuple_index.4: bits[123] = tuple_index(literal.1, index=2)
+ add.6: bits[123] = add(tuple_index.2, tuple_index.3)
+ add.7: bits[123] = add(tuple_index.4, x)
+ ret add.8: bits[123] = add(add.6, add.7)
+}
+)";
+ XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr package,
+ Parser::ParsePackage(text));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * entry, package->EntryFunction());
+ XLS_ASSERT_OK_AND_ASSIGN(
+ auto result, ToCombinationalModuleText(entry, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0x40, 123))}}),
+ IsOkAndHolds(Value(UBits(0x12340, 123))));
+}
+
+TEST_P(CombinationalGeneratorTest, ArrayLiteral) {
+ std::string text = R"(
+package ArrayLiterals
+
+fn main(x: bits[32], y: bits[32]) -> bits[44] {
+ literal.1: bits[44][3][2] = literal(value=[[1, 2, 3], [4, 5, 6]])
+ array_index.2: bits[44][3] = array_index(literal.1, x)
+ ret array_index.3: bits[44] = array_index(array_index.2, y)
+}
+)";
+ XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr package,
+ Parser::ParsePackage(text));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * entry, package->EntryFunction());
+ XLS_ASSERT_OK_AND_ASSIGN(
+ auto result, ToCombinationalModuleText(entry, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(
+ simulator.Run({{"x", Value(UBits(0, 32))}, {"y", Value(UBits(1, 32))}}),
+ IsOkAndHolds(Value(UBits(2, 44))));
+ EXPECT_THAT(
+ simulator.Run({{"x", Value(UBits(1, 32))}, {"y", Value(UBits(0, 32))}}),
+ IsOkAndHolds(Value(UBits(4, 44))));
+}
+
+TEST_P(CombinationalGeneratorTest, OneHot) {
+ std::string text = R"(
+package OneHot
+
+fn main(x: bits[3]) -> bits[4] {
+ ret one_hot.1: bits[4] = one_hot(x, lsb_prio=true)
+}
+)";
+ XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr package,
+ Parser::ParsePackage(text));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * entry, package->EntryFunction());
+ XLS_ASSERT_OK_AND_ASSIGN(
+ auto result, ToCombinationalModuleText(entry, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b000, 3))}}),
+ IsOkAndHolds(Value(UBits(0b1000, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b001, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0001, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b010, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0010, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b011, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0001, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b100, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0100, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b101, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0001, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b110, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0010, 4))));
+ EXPECT_THAT(simulator.Run({{"x", Value(UBits(0b111, 3))}}),
+ IsOkAndHolds(Value(UBits(0b0001, 4))));
+}
+
+TEST_P(CombinationalGeneratorTest, OneHotSelect) {
+ std::string text = R"(
+package OneHotSelect
+
+fn main(p: bits[2], x: bits[16], y: bits[16]) -> bits[16] {
+ ret one_hot_sel.1: bits[16] = one_hot_sel(p, cases=[x, y])
+}
+)";
+ XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr package,
+ Parser::ParsePackage(text));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * entry, package->EntryFunction());
+ XLS_ASSERT_OK_AND_ASSIGN(
+ auto result, ToCombinationalModuleText(entry, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ absl::flat_hash_map args = {
+ {"x", Value(UBits(0x00ff, 16))}, {"y", Value(UBits(0xf0f0, 16))}};
+ args["p"] = Value(UBits(0b00, 2));
+ EXPECT_THAT(simulator.Run(args), IsOkAndHolds(Value(UBits(0x0000, 16))));
+ args["p"] = Value(UBits(0b01, 2));
+ EXPECT_THAT(simulator.Run(args), IsOkAndHolds(Value(UBits(0x00ff, 16))));
+ args["p"] = Value(UBits(0b10, 2));
+ EXPECT_THAT(simulator.Run(args), IsOkAndHolds(Value(UBits(0xf0f0, 16))));
+ args["p"] = Value(UBits(0b11, 2));
+ EXPECT_THAT(simulator.Run(args), IsOkAndHolds(Value(UBits(0xf0ff, 16))));
+}
+
+TEST_P(CombinationalGeneratorTest, CrazyParameterTypes) {
+ std::string text = R"(
+package CrazyParameterTypes
+
+fn main(a: bits[32],
+ b: (bits[32], ()),
+ c: bits[32][3],
+ d: (bits[32], bits[32])[1],
+ e: (bits[32][2], (), ()),
+ f: bits[0],
+ g: bits[1]) -> bits[32] {
+ tuple_index.1: bits[32] = tuple_index(b, index=0)
+ literal.2: bits[32] = literal(value=0)
+ array_index.3: bits[32] = array_index(c, g)
+ array_index.4: (bits[32], bits[32]) = array_index(d, literal.2)
+ tuple_index.5: bits[32] = tuple_index(array_index.4, index=1)
+ tuple_index.6: bits[32][2] = tuple_index(e, index=0)
+ array_index.7: bits[32] = array_index(tuple_index.6, g)
+ ret or.8: bits[32] = or(a, tuple_index.1, array_index.3, tuple_index.5, array_index.7)
+}
+)";
+ XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr package,
+ Parser::ParsePackage(text));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * entry, package->EntryFunction());
+ XLS_ASSERT_OK_AND_ASSIGN(
+ auto result, ToCombinationalModuleText(entry, UseSystemVerilog()));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ result.verilog_text);
+
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+
+ std::minstd_rand engine;
+ std::vector arguments = RandomFunctionArguments(entry, &engine);
+ XLS_ASSERT_OK_AND_ASSIGN(Value expected,
+ ir_interpreter::Run(entry, arguments));
+ EXPECT_THAT(simulator.Run(arguments), IsOkAndHolds(expected));
+}
+
+TEST_P(CombinationalGeneratorTest, TwoDArray) {
+ // Build up a two dimensional array from scalars, then deconstruct it and do
+ // something with the elements.
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u8);
+ auto c = fb.Param("c", u8);
+ auto row_0 = fb.Array({a, b, c}, a.GetType());
+ auto row_1 = fb.Array({a, b, c}, a.GetType());
+ auto two_d = fb.Array({row_0, row_1}, row_0.GetType());
+ fb.Add(fb.ArrayIndex(fb.ArrayIndex(two_d, fb.Literal(UBits(0, 8))),
+ fb.Literal(UBits(2, 8))),
+ fb.ArrayIndex(fb.ArrayIndex(two_d, fb.Literal(UBits(1, 8))),
+ fb.Literal(UBits(1, 8))));
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"a", Value(UBits(123, 8))},
+ {"b", Value(UBits(42, 8))},
+ {"c", Value(UBits(100, 8))}}),
+ IsOkAndHolds(Value(UBits(142, 8))));
+}
+
+TEST_P(CombinationalGeneratorTest, ReturnTwoDArray) {
+ // Build up a two dimensional array from scalars and return it.
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u8);
+ auto row_0 = fb.Array({a, b}, a.GetType());
+ auto row_1 = fb.Array({b, a}, a.GetType());
+ fb.Array({row_0, row_1}, row_0.GetType());
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(
+ simulator.Run({{"a", Value(UBits(123, 8))}, {"b", Value(UBits(42, 8))}}),
+ IsOkAndHolds(Value::ArrayOrDie({
+ Value::ArrayOrDie({Value(UBits(123, 8)), Value(UBits(42, 8))}),
+ Value::ArrayOrDie({Value(UBits(42, 8)), Value(UBits(123, 8))}),
+ })));
+}
+
+TEST_P(CombinationalGeneratorTest, BuildComplicatedType) {
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u8 = package.GetBitsType(8);
+ // Construct some terrible abomination of tuples and arrays.
+ auto a = fb.Param("a", u8);
+ auto b = fb.Param("b", u8);
+ auto c = fb.Param("c", u8);
+ auto row_0 = fb.Array({a, b}, a.GetType());
+ auto row_1 = fb.Array({b, a}, a.GetType());
+ auto ar = fb.Array({row_0, row_1}, row_0.GetType());
+ auto tuple = fb.Tuple({ar, a});
+ // Deconstruct it and return some scalar element.
+ fb.ArrayIndex(fb.ArrayIndex(fb.TupleIndex(tuple, 0), a), c);
+
+ XLS_ASSERT_OK_AND_ASSIGN(Function * f, fb.Build());
+ XLS_ASSERT_OK_AND_ASSIGN(auto result,
+ ToCombinationalModuleText(f, UseSystemVerilog()));
+ ModuleSimulator simulator(result.signature, result.verilog_text,
+ GetSimulator());
+ EXPECT_THAT(simulator.Run({{"a", Value(UBits(0, 8))},
+ {"b", Value(UBits(42, 8))},
+ {"c", Value(UBits(1, 8))}}),
+ IsOkAndHolds(Value(UBits(42, 8))));
+}
+
+INSTANTIATE_TEST_SUITE_P(CombinationalGeneratorTestInstantiation,
+ CombinationalGeneratorTest,
+ testing::ValuesIn(kDefaultSimulationTargets),
+ ParameterizedTestName);
+
+} // namespace
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/finite_state_machine.cc b/xls/codegen/finite_state_machine.cc
new file mode 100644
index 0000000000..b92013379d
--- /dev/null
+++ b/xls/codegen/finite_state_machine.cc
@@ -0,0 +1,535 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/finite_state_machine.h"
+
+#include "absl/algorithm/container.h"
+#include "absl/strings/str_cat.h"
+#include "xls/common/status/status_macros.h"
+
+namespace xls {
+namespace verilog {
+
+void FsmBlockBase::EmitAssignments(StatementBlock* statement_block) const {
+ for (const auto& assignment : assignments_) {
+ statement_block->Add(assignment.lhs, assignment.rhs);
+ }
+ for (const ConditionalFsmBlock& cond_block : conditional_blocks_) {
+ if (cond_block.HasAssignments()) {
+ Conditional* conditional = statement_block->Add(
+ statement_block->parent(), cond_block.condition());
+ cond_block.EmitConditionalAssignments(conditional,
+ conditional->consequent());
+ }
+ }
+}
+
+void FsmBlockBase::EmitStateTransitions(StatementBlock* statement_block,
+ LogicRef* state_next_var) const {
+ if (next_state_ != nullptr) {
+ statement_block->Add(state_next_var,
+ next_state_->state_value());
+ }
+ for (const ConditionalFsmBlock& cond_block : conditional_blocks_) {
+ if (cond_block.HasStateTransitions()) {
+ Conditional* conditional = statement_block->Add(
+ statement_block->parent(), cond_block.condition());
+ cond_block.EmitConditionalStateTransitions(
+ conditional, conditional->consequent(), state_next_var);
+ }
+ }
+}
+
+bool FsmBlockBase::HasAssignments() const {
+ return !assignments_.empty() ||
+ absl::c_any_of(conditional_blocks_, [](const ConditionalFsmBlock& b) {
+ return b.HasAssignments();
+ });
+}
+
+bool FsmBlockBase::HasStateTransitions() const {
+ return next_state_ != nullptr ||
+ absl::c_any_of(conditional_blocks_, [](const ConditionalFsmBlock& b) {
+ return b.HasStateTransitions();
+ });
+}
+
+bool FsmBlockBase::HasAssignmentToOutput(const FsmOutput& output) const {
+ return (
+ absl::c_any_of(
+ assignments_,
+ [&](const Assignment& a) { return a.lhs == output.logic_ref; }) ||
+ absl::c_any_of(conditional_blocks_, [&](const ConditionalFsmBlock& b) {
+ return b.HasAssignmentToOutput(output);
+ }));
+}
+
+ConditionalFsmBlock& ConditionalFsmBlock::ElseOnCondition(
+ Expression* condition) {
+ XLS_CHECK(next_alternate_ == nullptr && final_alternate_ == nullptr);
+ next_alternate_ = absl::make_unique(
+ absl::StrFormat("%s else (%s)", debug_name_, condition->Emit()), file_,
+ condition);
+ return *next_alternate_;
+}
+
+UnconditionalFsmBlock& ConditionalFsmBlock::Else() {
+ XLS_CHECK(next_alternate_ == nullptr && final_alternate_ == nullptr);
+ final_alternate_ = absl::make_unique(
+ absl::StrFormat("%s else", debug_name_), file_);
+ return *final_alternate_;
+}
+
+void ConditionalFsmBlock::EmitConditionalAssignments(
+ Conditional* conditional, StatementBlock* statement_block) const {
+ EmitAssignments(statement_block);
+ if (next_alternate_ != nullptr && next_alternate_->HasAssignments()) {
+ next_alternate_->EmitConditionalAssignments(
+ conditional, conditional->AddAlternate(next_alternate_->condition()));
+ } else if (final_alternate_ != nullptr &&
+ final_alternate_->HasAssignments()) {
+ final_alternate_->EmitAssignments(conditional->AddAlternate());
+ }
+}
+
+void ConditionalFsmBlock::EmitConditionalStateTransitions(
+ Conditional* conditional, StatementBlock* statement_block,
+ LogicRef* state_next_var) const {
+ EmitStateTransitions(statement_block, state_next_var);
+ if (next_alternate_ != nullptr && next_alternate_->HasStateTransitions()) {
+ next_alternate_->EmitConditionalStateTransitions(
+ conditional, conditional->AddAlternate(next_alternate_->condition()),
+ state_next_var);
+ } else if (final_alternate_ != nullptr &&
+ final_alternate_->HasStateTransitions()) {
+ final_alternate_->EmitStateTransitions(conditional->AddAlternate(),
+ state_next_var);
+ }
+}
+
+bool ConditionalFsmBlock::HasAssignments() const {
+ return FsmBlock::HasAssignments() ||
+ (next_alternate_ != nullptr && next_alternate_->HasAssignments()) ||
+ (final_alternate_ != nullptr && final_alternate_->HasAssignments());
+}
+
+bool ConditionalFsmBlock::HasStateTransitions() const {
+ return FsmBlock::HasStateTransitions() ||
+ (next_alternate_ != nullptr &&
+ next_alternate_->HasStateTransitions()) ||
+ (final_alternate_ != nullptr &&
+ final_alternate_->HasStateTransitions());
+}
+
+bool ConditionalFsmBlock::HasAssignmentToOutput(const FsmOutput& output) const {
+ return FsmBlock::HasAssignmentToOutput(output) ||
+ (next_alternate_ != nullptr &&
+ next_alternate_->HasAssignmentToOutput(output)) ||
+ (final_alternate_ != nullptr &&
+ final_alternate_->HasAssignmentToOutput(output));
+}
+
+LogicRef* FsmBuilder::AddRegDef(absl::string_view name, Expression* width,
+ RegInit init) {
+ defs_.push_back(module_->parent()->Make(name, width, init));
+ return module_->parent()->Make(defs_.back());
+}
+
+FsmCounter* FsmBuilder::AddDownCounter(absl::string_view name, int64 width) {
+ LogicRef* ref = AddRegDef(name, file_->PlainLiteral(width));
+ LogicRef* ref_next =
+ AddRegDef(absl::StrCat(name, "_next"), file_->PlainLiteral(width));
+ counters_.push_back(FsmCounter{ref, ref_next, width});
+ return &counters_.back();
+}
+
+FsmOutput* FsmBuilder::AddOutputAsExpression(absl::string_view name,
+ Expression* width,
+ Expression* default_value) {
+ RegInit init = UninitializedSentinel();
+ if (default_value != nullptr) {
+ init = default_value;
+ }
+ LogicRef* logic_ref = AddRegDef(name, width, init);
+ outputs_.push_back(FsmOutput{logic_ref, default_value});
+ return &outputs_.back();
+}
+
+FsmOutput* FsmBuilder::AddExistingOutput(LogicRef* logic_ref,
+ Expression* default_value) {
+ outputs_.push_back(FsmOutput{logic_ref, default_value});
+ return &outputs_.back();
+}
+
+FsmRegister* FsmBuilder::AddRegisterAsExpression(absl::string_view name,
+ Expression* width,
+ Expression* reset_value) {
+ // A reset value can only be specified if the FSM has a reset signal.
+ XLS_CHECK(reset_value == nullptr || reset_.has_value());
+ LogicRef* logic_ref = reset_value == nullptr
+ ? AddRegDef(name, width)
+ : AddRegDef(name, width, reset_value);
+ LogicRef* logic_ref_next = AddRegDef(absl::StrCat(name, "_next"), width);
+ registers_.push_back(FsmRegister{logic_ref, logic_ref_next, reset_value});
+ return ®isters_.back();
+}
+
+FsmRegister* FsmBuilder::AddRegister(absl::string_view name, int64 width,
+ absl::optional reset_value) {
+ return AddRegisterAsExpression(
+ name, file_->PlainLiteral(width),
+ reset_value.has_value() ? file_->PlainLiteral(*reset_value) : nullptr);
+}
+
+FsmRegister* FsmBuilder::AddRegister1(absl::string_view name,
+ absl::optional reset_value) {
+ return AddRegisterAsExpression(
+ name, /*width=*/file_->PlainLiteral(1),
+ reset_value.has_value() ? file_->PlainLiteral(*reset_value) : nullptr);
+}
+
+FsmRegister* FsmBuilder::AddExistingRegister(LogicRef* reg) {
+ LogicRef* logic_ref_next =
+ AddRegDef(absl::StrCat(reg->GetName(), "_next"), reg->def()->width());
+ registers_.push_back(FsmRegister{reg, logic_ref_next});
+ return ®isters_.back();
+}
+
+FsmState* FsmBuilder::AddState(absl::string_view name) {
+ if (state_local_param_ == nullptr) {
+ state_local_param_ = file_->Make(file_);
+ }
+ XLS_CHECK(!absl::c_any_of(states_, [&](const FsmState& s) {
+ return s.name() == name;
+ })) << absl::StrFormat("State with name \"%s\" already exists.", name);
+ Expression* state_value = state_local_param_->AddItem(
+ absl::StrCat("State", name), file_->PlainLiteral(states_.size()));
+ states_.emplace_back(name, file_, state_value);
+ return &states_.back();
+}
+
+absl::Status FsmBuilder::BuildStateTransitionLogic(LogicRef* state,
+ LogicRef* state_next) {
+ // Construct an always block encapsulating the combinational logic for
+ // determining state transitions.
+ module_->Add();
+ module_->Add("FSM state transition logic.");
+ AlwaysBase* ac;
+ if (use_system_verilog_) {
+ ac = module_->Add(file_);
+ } else {
+ ac = module_->Add(file_, std::vector(
+ {ImplicitEventExpression()}));
+ }
+
+ // Set default assignments.
+ ac->statements()->Add(state_next, state);
+
+ Case* case_statement = ac->statements()->Add(file_, state);
+ for (const auto& fsm_state : states_) {
+ fsm_state.EmitStateTransitions(
+ case_statement->AddCaseArm(fsm_state.state_value()), state_next);
+ }
+ // If the number of states is not a power of two then add an unreachable
+ // default case which sets the next state to X. This ensures all values of
+ // the case are covered.
+ if (states_.size() != 1 << StateRegisterWidth()) {
+ StatementBlock* statements = case_statement->AddCaseArm(DefaultSentinel());
+ statements->Add(
+ state_next, file_->Make(StateRegisterWidth()));
+ }
+ return absl::OkStatus();
+}
+
+UnconditionalFsmBlock& ConditionalFsmBlock::FindOrAddFinalAlternate() {
+ ConditionalFsmBlock* alternate = this;
+ while (alternate->next_alternate_ != nullptr) {
+ alternate = alternate->next_alternate_.get();
+ }
+ if (alternate->final_alternate_ != nullptr) {
+ return *alternate->final_alternate_;
+ }
+ return alternate->Else();
+}
+
+absl::Status FsmBlockBase::AddDefaultOutputAssignments(
+ const FsmOutput& output) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "AddDefaultOutputAssignments for output %s in block \"%s\"",
+ output.logic_ref->GetName(), debug_name());
+ // The count of the assignments along any code path through the block.
+ int64 assignment_count = 0;
+ for (const Assignment& assignment : assignments_) {
+ if (assignment.lhs == output.logic_ref) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Output is unconditionally assigned %s in block \"%s\"",
+ assignment.rhs->Emit(), debug_name());
+ assignment_count++;
+ }
+ }
+ for (ConditionalFsmBlock& cond_block : conditional_blocks_) {
+ if (!cond_block.HasAssignmentToOutput(output)) {
+ continue;
+ }
+ // The conditional block has an assignment to the output somewhere beneath
+ // it. Make sure there is an assignment on each alternate of the
+ // conditional.
+ XLS_VLOG(3) << "Conditional block " << cond_block.debug_name()
+ << " assigns output " << output.logic_ref->GetName();
+ cond_block.FindOrAddFinalAlternate();
+ XLS_RETURN_IF_ERROR(cond_block.ForEachAlternate(
+ [&](FsmBlockBase* alternate) -> absl::Status {
+ return alternate->AddDefaultOutputAssignments(output);
+ }));
+ assignment_count++;
+ }
+ if (assignment_count > 1) {
+ return absl::InvalidArgumentError(absl::StrFormat(
+ "Output \"%s\" may be assigned more than once along a code path.",
+ output.logic_ref->GetName()));
+ }
+ if (assignment_count == 0) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Adding assignment of %s to default value %s in block \"%s\"",
+ output.logic_ref->Emit(), output.default_value->Emit(), debug_name());
+ AddAssignment(output.logic_ref, output.default_value);
+ }
+ return absl::OkStatus();
+}
+
+absl::Status ConditionalFsmBlock::ForEachAlternate(
+ std::function f) {
+ for (ConditionalFsmBlock* alternate = this; alternate != nullptr;
+ alternate = alternate->next_alternate_.get()) {
+ XLS_RETURN_IF_ERROR(f(alternate));
+ if (alternate->final_alternate_ != nullptr) {
+ return f(alternate->final_alternate_.get());
+ }
+ }
+ return absl::OkStatus();
+}
+
+absl::Status FsmBlockBase::RemoveAssignment(LogicRef* logic_ref) {
+ int64 size_before = assignments_.size();
+ assignments_.erase(
+ std::remove_if(assignments_.begin(), assignments_.end(),
+ [&](const Assignment& a) { return a.lhs == logic_ref; }),
+ assignments_.end());
+ if (size_before == assignments_.size()) {
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Assignment to %s does not exist in block \"%s\".",
+ logic_ref->GetName(), debug_name()));
+ }
+ if (size_before > assignments_.size() + 1) {
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Multiple assignment to %s exist in block \"%s\".",
+ logic_ref->GetName(), debug_name()));
+ }
+ return absl::OkStatus();
+}
+
+namespace {
+
+// Returns true iff the given expressions are all non-null and the same.
+// Sameness means same pointer value or expressions are literals with same
+// underlying Bits value. Literals require this special handled because literals
+// are typically created on the fly for each use. So a 1'h1 in one part of the
+// code will generally not refer to the same Literal object as a 1'h1 in another
+// part of the code.
+bool AllSameAndNonNull(absl::Span exprs) {
+ Expression* same_expr = nullptr;
+ for (Expression* expr : exprs) {
+ if (expr == nullptr) {
+ return false;
+ }
+ if (same_expr == nullptr) {
+ same_expr = expr;
+ continue;
+ }
+ if (expr != same_expr && !(expr->IsLiteral() && same_expr->IsLiteral() &&
+ expr->AsLiteralOrDie()->bits() ==
+ same_expr->AsLiteralOrDie()->bits())) {
+ return false;
+ }
+ }
+ return true;
+}
+
+} // namespace
+
+xabsl::StatusOr FsmBlockBase::HoistCommonConditionalAssignments(
+ const FsmOutput& output) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "HoistCommonConditionalAssignments for output %s in block \"%s\"",
+ output.logic_ref->GetName(), debug_name());
+
+ for (const Assignment& assignment : assignments_) {
+ if (assignment.lhs == output.logic_ref) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Output is unconditionally assigned %s in block \"%s\"",
+ assignment.rhs->Emit(), debug_name());
+ return assignment.rhs;
+ }
+ }
+
+ for (ConditionalFsmBlock& cond_block : conditional_blocks_) {
+ if (!cond_block.HasAssignmentToOutput(output)) {
+ continue;
+ }
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Conditional block \"%s\" assigns output %s", cond_block.debug_name(),
+ output.logic_ref->GetName());
+ std::vector rhses;
+ XLS_RETURN_IF_ERROR(cond_block.ForEachAlternate(
+ [&](FsmBlockBase* alternate) -> absl::Status {
+ XLS_ASSIGN_OR_RETURN(
+ Expression * rhs,
+ alternate->HoistCommonConditionalAssignments(output));
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Alternate block \"%s\" assigns output %s to %s",
+ cond_block.debug_name(), output.logic_ref->GetName(),
+ rhs == nullptr ? "nullptr" : rhs->Emit());
+ rhses.push_back(rhs);
+ return absl::OkStatus();
+ }));
+ if (!AllSameAndNonNull(rhses)) {
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Not all conditional block assign output %s to same value",
+ output.logic_ref->GetName());
+ return nullptr;
+ }
+
+ XLS_VLOG(3) << absl::StreamFormat(
+ "Conditional block assigns output %s to same value %s on all "
+ "alternates",
+ output.logic_ref->GetName(), rhses.front()->Emit());
+ XLS_RETURN_IF_ERROR(cond_block.ForEachAlternate(
+ [&](FsmBlockBase* alternate) -> absl::Status {
+ return alternate->RemoveAssignment(output.logic_ref);
+ }));
+ AddAssignment(output.logic_ref, rhses.front());
+ return rhses.front();
+ }
+ return nullptr;
+}
+
+absl::Status FsmBuilder::BuildOutputLogic(LogicRef* state) {
+ if (registers_.empty() && outputs_.empty() && counters_.empty()) {
+ return absl::OkStatus();
+ }
+
+ // Construct an always block encapsulating the combinational logic for
+ // determining state transitions.
+ module_->Add();
+ module_->Add("FSM output logic.");
+
+ AlwaysBase* ac;
+ if (use_system_verilog_) {
+ ac = module_->Add(file_);
+ } else {
+ ac = module_->Add(file_, std::vector(
+ {ImplicitEventExpression()}));
+ }
+
+ for (const FsmRegister& reg : registers_) {
+ ac->statements()->Add(reg.next, reg.logic_ref);
+ }
+
+ // For each state there should exactly one assignment to each output along any
+ // code path. This prevents infinite looping during simulation caused by the
+ // "glitch" of assigning a value twice to the reg. See:
+ // https://github.com/steveicarus/iverilog/issues/321. This single assignment
+ // propertry is achieved by sinking the assignments to the default value into
+ // conditional blocks to exactly cover those code paths which have no
+ // assignment. Flopped regs such as the next state and next counter values do
+ // not need this treatment because their value only changes on clock edges
+ // which avoids any propagate of a multi-assignment glitch during simulation.
+ for (FsmState& fsm_state : states_) {
+ XLS_VLOG(3) << "Adding default assignments for state " << fsm_state.name();
+ for (const FsmOutput& output : outputs_) {
+ XLS_RETURN_IF_ERROR(fsm_state.AddDefaultOutputAssignments(output));
+ XLS_RETURN_IF_ERROR(
+ fsm_state.HoistCommonConditionalAssignments(output).status());
+ }
+ }
+
+ for (const FsmCounter& counter : counters_) {
+ ac->statements()->Add(
+ counter.next, file_->Sub(counter.logic_ref, file_->PlainLiteral(1)));
+ }
+ Case* case_statement = ac->statements()->Add(file_, state);
+ for (const auto& fsm_state : states_) {
+ fsm_state.EmitAssignments(
+ case_statement->AddCaseArm(fsm_state.state_value()));
+ }
+
+ // If the state vector is wide enough to allow values not encoded in the state
+ // enum add a default case and assign outputs to the default value.
+ if (states_.size() != 1 << StateRegisterWidth()) {
+ StatementBlock* statements = case_statement->AddCaseArm(DefaultSentinel());
+ for (const FsmOutput& output : outputs_) {
+ statements->Add(output.logic_ref,
+ output.default_value);
+ }
+ }
+
+ return absl::OkStatus();
+}
+
+absl::Status FsmBuilder::Build() {
+ if (is_built_) {
+ return absl::InternalError("FSM has already been built.");
+ }
+ is_built_ = true;
+
+ module_->Add();
+ module_->Add(absl::StrCat(name_, " ", "FSM:"));
+
+ LocalParamItemRef* state_bits = module_->Add(file_)->AddItem(
+ "StateBits", file_->PlainLiteral(StateRegisterWidth()));
+
+ // For each state, define its numeric encoding as a LocalParam gathered in
+ // state_values.
+ module_->AddModuleMember(state_local_param_);
+
+ Expression* initial_state_value = states_.front().state_value();
+ LogicRef* state =
+ module_->AddRegAsExpression("state", state_bits, initial_state_value);
+ LogicRef* state_next = module_->AddRegAsExpression("state_next", state_bits,
+ initial_state_value);
+ for (RegDef* def : defs_) {
+ module_->AddModuleMember(def);
+ }
+
+ XLS_RETURN_IF_ERROR(BuildStateTransitionLogic(state, state_next));
+ XLS_RETURN_IF_ERROR(BuildOutputLogic(state));
+
+ AlwaysFlop* af = module_->Add(file_, clk_, reset_);
+ if (reset_.has_value()) {
+ af->AddRegister(state, state_next, /*reset_value=*/initial_state_value);
+ } else {
+ af->AddRegister(state, state_next);
+ }
+ for (const FsmRegister& reg : registers_) {
+ af->AddRegister(reg.logic_ref, reg.next, /*reset_value=*/reg.reset_value);
+ }
+ for (const FsmCounter& counter : counters_) {
+ af->AddRegister(counter.logic_ref, counter.next);
+ }
+
+ return absl::OkStatus();
+}
+
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/finite_state_machine.h b/xls/codegen/finite_state_machine.h
new file mode 100644
index 0000000000..ccc1fa8680
--- /dev/null
+++ b/xls/codegen/finite_state_machine.h
@@ -0,0 +1,429 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef THIRD_PARTY_XLS_CODEGEN_FINITE_STATE_MACHINE_H_
+#define THIRD_PARTY_XLS_CODEGEN_FINITE_STATE_MACHINE_H_
+
+#include
+
+#include "absl/container/flat_hash_map.h"
+#include "absl/status/status.h"
+#include "absl/types/optional.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/casts.h"
+#include "xls/common/logging/logging.h"
+
+namespace xls {
+namespace verilog {
+
+// Encapsulates an output signal driven by finite state machine logic.
+struct FsmOutput {
+ LogicRef* logic_ref;
+ Expression* default_value;
+};
+
+// Encapsulates a registered output signal driven by finite state machine
+// logic.
+struct FsmRegister {
+ LogicRef* logic_ref;
+
+ // The value of the register in the next cycle.
+ LogicRef* next;
+
+ // The expression defining the reset state of the register. May be nullptr in
+ // which case the reset state is undefined.
+ Expression* reset_value;
+};
+
+// Represents a down-counting cycle counter controlled by the finite state
+// machine logic.
+struct FsmCounter {
+ // The value of the counter.
+ LogicRef* logic_ref;
+
+ // The value of the counter in the next cycle.
+ LogicRef* next;
+
+ // Width of the counter in bits.
+ int64 width;
+};
+
+// A single assignment of an FSM output to a value.
+struct Assignment {
+ LogicRef* lhs;
+ Expression* rhs;
+};
+
+class FsmState;
+class ConditionalFsmBlock;
+
+// Abstraction representing a control-flow-equivalent block of logic in an FSM
+// (i.e., a basic block).
+class FsmBlockBase {
+ public:
+ explicit FsmBlockBase(absl::string_view debug_name, VerilogFile* file)
+ : debug_name_(debug_name), file_(file) {}
+ virtual ~FsmBlockBase() = default;
+
+ // Returns true if this block has any output assignments (or state
+ // transitions). This includes any assignments (state transitions) in nested
+ // conditional blocks.
+ virtual bool HasAssignments() const;
+ virtual bool HasStateTransitions() const;
+
+ // Returns true if this block may assign a value to the given output. This
+ // includes any assignments in nested conditional blocks.
+ virtual bool HasAssignmentToOutput(const FsmOutput& output) const;
+
+ // Emits the output assignments contained in this block as blocking
+ // assignments in the given VAST StatementBlock including any nested
+ // conditional assignments.
+ void EmitAssignments(StatementBlock* statement_block) const;
+
+ // Emits the state transition (if any) contained in this block as a blocking
+ // assignment in the given VAST StatementBlock including any nested state
+ // transitions.
+ void EmitStateTransitions(StatementBlock* statement_block,
+ LogicRef* state_next_var) const;
+
+ protected:
+ friend class FsmBuilder;
+
+ std::string debug_name() const { return debug_name_; }
+
+ // Adds the assignment of 'logic_ref' to 'value' to the block.
+ void AddAssignment(LogicRef* logic_ref, Expression* value) {
+ for (const auto& assignment : assignments_) {
+ XLS_CHECK_NE(logic_ref, assignment.lhs)
+ << logic_ref->GetName() << " already assigned.";
+ }
+ assignments_.push_back(Assignment{logic_ref, value});
+ }
+
+ // Remove the assignment of the given LogicRef from the unconditional
+ // assignments in this block. Does not recurse into contained conditional
+ // blocks. Returns an error if there is not exactly one assignment to the
+ // LogicRef in the block.
+ absl::Status RemoveAssignment(LogicRef* logic_ref);
+
+ // Adds assignments of the given output to its default value along all code
+ // paths which do not have an assignment of the output. Returns an error if
+ // the output may be assigned more than once on any code path. Upon completion
+ // of this function, the output will be assigned exactly once on all code
+ // paths through the block.
+ absl::Status AddDefaultOutputAssignments(const FsmOutput& output);
+
+ // Hoists conditional assignments which are identical along all paths in the
+ // block into a single assignment. For example, given:
+ //
+ // if (foo) begin
+ // a = 1;
+ // b = 1;
+ // end else begin
+ // a = 1;
+ // b = 0;
+ // end
+ //
+ // After hoisting the code will look like:
+ //
+ // a = 1;
+ // if (foo) begin
+ // b = 1;
+ // end else begin
+ // b = 0;
+ // end
+ //
+ xabsl::StatusOr HoistCommonConditionalAssignments(
+ const FsmOutput& output);
+
+ // An name which is used to uniquely identify the block in log messages. The
+ // name does not affect the emitted Verilog.
+ std::string debug_name_;
+ VerilogFile* file_;
+
+ FsmState* next_state_ = nullptr;
+ std::vector assignments_;
+
+ // The conditional blocks within this block (if any). This lowers to a
+ // sequence of 'if' statements. A std::list is used for pointer stability.
+ std::list conditional_blocks_;
+};
+
+// Base class for curiously recurring template pattern to support polymorphic
+// chaining. This class holds fluent style methods for constructing the
+// finite state machine.
+template
+class FsmBlock : public FsmBlockBase {
+ public:
+ explicit FsmBlock(absl::string_view debug_name, VerilogFile* file)
+ : FsmBlockBase(debug_name, file) {}
+ virtual ~FsmBlock() = default;
+
+ // Sets the next state to transition to.
+ T& NextState(FsmState* next_state) {
+ XLS_CHECK(next_state_ == nullptr);
+ next_state_ = next_state;
+ return down_cast(*this);
+ }
+
+ // Sets the given output to the given value. This occurs immediately and
+ // asynchronously.
+ T& SetOutput(FsmOutput* output, int64 value) {
+ return SetOutputAsExpression(output, file_->PlainLiteral(value));
+ }
+ T& SetOutputAsExpression(FsmOutput* output, Expression* value) {
+ AddAssignment(output->logic_ref, value);
+ return down_cast(*this);
+ }
+
+ // Sets the given register to the given value in the next cycle.
+ T& SetRegisterNext(FsmRegister* reg, int64 value) {
+ return SetRegisterNextAsExpression(reg, file_->PlainLiteral(value));
+ }
+ T& SetRegisterNextAsExpression(FsmRegister* reg, Expression* value) {
+ AddAssignment(reg->next, value);
+ return down_cast(*this);
+ }
+
+ // Sets the given counter to the given value in the next cycle.
+ T& SetCounter(FsmCounter* counter, int64 value) {
+ return SetCounterAsExpression(counter, file_->PlainLiteral(value));
+ }
+ T& SetCounterAsExpression(FsmCounter* counter, Expression* value) {
+ AddAssignment(counter->next, value);
+ return down_cast(*this);
+ }
+
+ // Adds a conditional statement using the given condition to the block.
+ // Returns the resulting conditional block.
+ ConditionalFsmBlock& OnCondition(Expression* condition) {
+ conditional_blocks_.emplace_back(
+ absl::StrFormat("%s: if (%s)", debug_name(), condition->Emit()), file_,
+ condition);
+ return conditional_blocks_.back();
+ }
+
+ // Adds a conditional statement based on the given counter equal to
+ // zero. Returns the resulting conditional block.
+ ConditionalFsmBlock& OnCounterIsZero(FsmCounter* counter) {
+ conditional_blocks_.emplace_back(
+ absl::StrFormat("%s: if counter %s == 0", debug_name(),
+ counter->logic_ref->GetName()),
+ file_, file_->Equals(counter->logic_ref, file_->PlainLiteral(0)));
+ return conditional_blocks_.back();
+ }
+};
+
+// An unconditional block of logic within an FSM state.
+class UnconditionalFsmBlock : public FsmBlock {
+ public:
+ explicit UnconditionalFsmBlock(absl::string_view debug_name,
+ VerilogFile* file)
+ : FsmBlock(debug_name, file) {}
+};
+
+// An unconditional block of logic within an FSM state.
+class ConditionalFsmBlock : public FsmBlock {
+ public:
+ explicit ConditionalFsmBlock(absl::string_view debug_name, VerilogFile* file,
+ Expression* condition)
+ : FsmBlock(debug_name, file),
+ condition_(condition) {}
+
+ // Appends an "else if" to the conditional ladder. Returns the resulting
+ // conditional block.
+ ConditionalFsmBlock& ElseOnCondition(Expression* condition);
+
+ // Terminates the conditional ladder with an "else". Returns the resulting
+ // block.
+ UnconditionalFsmBlock& Else();
+
+ Expression* condition() const { return condition_; }
+
+ bool HasAssignments() const override;
+ bool HasStateTransitions() const override;
+ bool HasAssignmentToOutput(const FsmOutput& output) const override;
+
+ protected:
+ friend class FsmBlockBase;
+
+ // Emits the VAST conditional ladder for this conditional block and the nested
+ // assignments (state transitions). 'conditional' is the VAST conditional
+ // statement corresponding to this conditional block.
+ void EmitConditionalAssignments(Conditional* conditional,
+ StatementBlock* statement_block) const;
+ void EmitConditionalStateTransitions(Conditional* conditional,
+ StatementBlock* statement_block,
+ LogicRef* state_next_var) const;
+
+ // Calls the given function on each alternate in this conditional block. For
+ // example, if the conditional block represents:
+ //
+ // if (a) begin
+ // ...Block A...
+ // end else if (b) begin
+ // ...Block B...
+ // end else begin
+ // ...Block C...
+ // end
+ //
+ // The function will be called on blocks A, B, and C.
+ absl::Status ForEachAlternate(std::function f);
+
+ // If the conditional block has a final alternate (unconditional else block)
+ // then it is returned. Otherwise a final alternate is created and returned.
+ UnconditionalFsmBlock& FindOrAddFinalAlternate();
+
+ Expression* condition_;
+
+ // The next alternate (else if) of the conditional ladder. Only one of
+ // next_alternate_ or final_alternate_ may be non-null. Might be representable
+ // as an absl::variant but an absl::variant of std::unique_ptrs is awkward to
+ // manipulate.
+ std::unique_ptr next_alternate_;
+
+ // The final alternate (else) of the conditional ladder.
+ std::unique_ptr final_alternate_;
+};
+
+// Abstraction representing a state in the FSM. For convenience derives from
+// UnconditionalFsmBlock which exposes the UnconditionalFsmBlock interface (eg,
+// NextState). This enables code like the following:
+//
+// auto st = fsm.NewState(...);
+// st->SetOutput(x, value).NextState(next_st);
+class FsmState : public UnconditionalFsmBlock {
+ public:
+ explicit FsmState(absl::string_view name, VerilogFile* file,
+ Expression* state_value)
+ : UnconditionalFsmBlock(name, file),
+ name_(name),
+ state_value_(state_value) {}
+
+ std::string name() const { return name_; }
+
+ // The VAST expression of the numeric encoding of this state in the FSM state
+ // variable.
+ Expression* state_value() const { return state_value_; }
+
+ protected:
+ std::string name_;
+ Expression* state_value_;
+};
+
+// Abstraction for building finite state machines in Verilog using VAST.
+class FsmBuilder {
+ public:
+ FsmBuilder(absl::string_view name, Module* module, LogicRef* clk,
+ bool use_system_verilog,
+ absl::optional reset = absl::nullopt)
+ : name_(name),
+ module_(module),
+ file_(module->parent()),
+ clk_(clk),
+ use_system_verilog_(use_system_verilog),
+ reset_(reset) {}
+
+ // Adds an FSM-controled signal to the FSM with the given name. A RegDef named
+ // 'name' is added to the module.
+ FsmOutput* AddOutput(absl::string_view name, int64 width,
+ int64 default_value) {
+ return AddOutputAsExpression(name, file_->PlainLiteral(width),
+ file_->PlainLiteral(default_value));
+ }
+ FsmOutput* AddOutputAsExpression(absl::string_view name, Expression* width,
+ Expression* default_value);
+
+ FsmOutput* AddOutput1(absl::string_view name, int64 default_value) {
+ return AddOutputAsExpression(name, /*width=*/file_->PlainLiteral(1),
+ file_->PlainLiteral(default_value));
+ }
+
+ // Overload which adds a previously defined reg as a FSM-controlled signal.
+ FsmOutput* AddExistingOutput(LogicRef* logic_ref, Expression* default_value);
+
+ // Adds a FSM-driven register with the given name. RegDefs named 'name' and
+ // 'name_next' are added to the module. The state of the register is affected
+ // by calling SetRegisterNext.
+ FsmRegister* AddRegister(absl::string_view name, int64 width,
+ absl::optional reset_value = absl::nullopt);
+ FsmRegister* AddRegisterAsExpression(absl::string_view name,
+ Expression* width,
+ Expression* reset_value = nullptr);
+
+ FsmRegister* AddRegister1(absl::string_view name,
+ absl::optional reset_value = absl::nullopt);
+
+ // Overload which adds a previously defined reg as an FSM-controlled signal. A
+ // RegDef named "*_next" is added to the module where "*" is the name of the
+ // given LogicRef.
+ FsmRegister* AddExistingRegister(LogicRef* reg);
+
+ // Add a cycle down-counter with the given name and width.
+ FsmCounter* AddDownCounter(absl::string_view name, int64 width);
+
+ // Add a new state to the FSM.
+ FsmState* AddState(absl::string_view name);
+
+ // Builds the FSM in the module.
+ absl::Status Build();
+
+ private:
+ // Creates a RegDef of the given name, width and optional initial
+ // value. Returns a LogicRef referring to it. The RegDef is added to the
+ // module inline with the FSM logic when Build is called.
+ LogicRef* AddRegDef(absl::string_view name, Expression* width,
+ RegInit init = UninitializedSentinel());
+
+ // Build the always block containing the logic for state transitions.
+ absl::Status BuildStateTransitionLogic(LogicRef* state, LogicRef* state_next);
+
+ // Build the always block containing the logic for the FSM outputs.
+ absl::Status BuildOutputLogic(LogicRef* state);
+
+ // Returns the state register width.
+ int64 StateRegisterWidth() const {
+ return std::max(int64{1}, Bits::MinBitCountUnsigned(states_.size() - 1));
+ }
+
+ std::string name_;
+ Module* module_;
+ VerilogFile* file_;
+ LogicRef* clk_;
+ bool use_system_verilog_;
+ absl::optional reset_;
+
+ // Output and registers defined by the FSM prior to called Build (such as
+ // AddOutput and AddRegister). These are added to the module when Build is
+ // called. Delaying insertion of the RegDefs enables placing them inline with
+ // the rest of the FSM logic.
+ std::vector defs_;
+
+ // The localparam statement defining the concrete values for each state.
+ LocalParam* state_local_param_ = nullptr;
+
+ // Whether the build method has been called on this FsmBuilder. The build
+ // method may only be called once.
+ bool is_built_ = false;
+
+ std::list states_;
+ std::list counters_;
+ std::list outputs_;
+ std::list registers_;
+};
+
+} // namespace verilog
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_FINITE_STATE_MACHINE_H_
diff --git a/xls/codegen/finite_state_machine_test.cc b/xls/codegen/finite_state_machine_test.cc
new file mode 100644
index 0000000000..d7bdd44834
--- /dev/null
+++ b/xls/codegen/finite_state_machine_test.cc
@@ -0,0 +1,345 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/finite_state_machine.h"
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/matchers.h"
+#include "xls/simulation/verilog_test_base.h"
+
+namespace xls {
+namespace verilog {
+namespace {
+
+using status_testing::StatusIs;
+using ::testing::HasSubstr;
+
+constexpr char kTestName[] = "finite_state_machine_test";
+constexpr char kTestdataPath[] = "xls/codegen/testdata";
+
+class FiniteStateMachineTest : public VerilogTestBase {};
+
+TEST_P(FiniteStateMachineTest, TrivialFsm) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef* clk = module->AddInput("clk");
+ FsmBuilder fsm("TrivialFsm", module, clk, UseSystemVerilog());
+ auto foo = fsm.AddState("Foo");
+ auto bar = fsm.AddState("Bar");
+
+ foo->NextState(bar);
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, TrivialFsmWithOutputs) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef* clk = module->AddInput("clk");
+ FsmBuilder fsm("TrivialFsm", module, clk, UseSystemVerilog());
+ auto foo = fsm.AddState("Foo");
+ auto bar = fsm.AddState("Bar");
+
+ auto baz_out = fsm.AddOutput1("baz", /*default_value=*/false);
+ auto qux_out = fsm.AddRegister("qux", 7);
+
+ foo->NextState(bar);
+ foo->SetOutput(baz_out, 1);
+
+ bar->NextState(foo);
+ // qux counts how many times the state "foo" has been entered.
+ bar->SetRegisterNextAsExpression(
+ qux_out, f.Add(qux_out->logic_ref, f.PlainLiteral(1)));
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, SimpleFsm) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst_n = module->AddInput("rst_n");
+ LogicRef* ready_in = module->AddInput("ready_in");
+ LogicRef* done_out = module->AddOutput("done_out");
+
+ // The "done" output is a wire, create a reg copy for assignment in the FSM.
+ LogicRef* done = module->AddReg1("done");
+ module->Add(done_out, done);
+
+ FsmBuilder fsm("SimpleFsm", module, clk, UseSystemVerilog(),
+ Reset{rst_n, /*async=*/false, /*active_low=*/true});
+ auto idle_state = fsm.AddState("Idle");
+ auto busy_state = fsm.AddState("Busy");
+ auto done_state = fsm.AddState("Done");
+
+ auto fsm_done_out =
+ fsm.AddExistingOutput(done,
+ /*default_value=*/f.PlainLiteral(0));
+
+ idle_state->OnCondition(ready_in).NextState(busy_state);
+ busy_state->NextState(done_state);
+ done_state->SetOutput(fsm_done_out, 1);
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, FsmWithNestedLogic) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst_n = module->AddInput("rst_n");
+ LogicRef* foo = module->AddInput("foo");
+ LogicRef* bar = module->AddInput("bar");
+ LogicRef* qux = module->AddOutput("qux_out");
+
+ FsmBuilder fsm("NestLogic", module, clk, UseSystemVerilog(),
+ Reset{rst_n, /*async=*/false, /*active_low=*/true});
+ auto a_state = fsm.AddState("A");
+ auto b_state = fsm.AddState("B");
+
+ auto fsm_qux_out = fsm.AddOutput("qux", /*width=*/8,
+ /*default_value=*/0);
+
+ a_state->OnCondition(foo)
+ .NextState(b_state)
+
+ // Nested Conditional
+ .OnCondition(bar)
+ .SetOutput(fsm_qux_out, 42)
+ .Else()
+ .SetOutput(fsm_qux_out, 123);
+ b_state->OnCondition(f.LogicalAnd(foo, bar)).NextState(a_state);
+
+ XLS_ASSERT_OK(fsm.Build());
+
+ module->Add(qux, fsm_qux_out->logic_ref);
+
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, CounterFsm) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst = module->AddInput("rst");
+ FsmBuilder fsm("CounterFsm", module, clk, UseSystemVerilog(),
+ Reset{rst, /*async=*/true, /*active_low=*/false});
+ auto foo = fsm.AddState("Foo");
+ auto bar = fsm.AddState("Bar");
+ auto qux = fsm.AddState("Qux");
+
+ auto counter = fsm.AddDownCounter("counter", 6);
+ foo->SetCounter(counter, 42).NextState(bar);
+ bar->OnCounterIsZero(counter).NextState(qux);
+ qux->NextState(foo);
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, ComplexFsm) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef* clk = module->AddInput("clk");
+ LogicRef* foo_in = module->AddInput("foo_in");
+ LogicRef* bar_in = module->AddOutput("bar_in");
+ LogicRef* qux_in = module->AddOutput("qux_in");
+
+ FsmBuilder fsm("ComplexFsm", module, clk, UseSystemVerilog());
+ auto hungry = fsm.AddState("Hungry");
+ auto sad = fsm.AddState("Sad");
+ auto happy = fsm.AddState("Happy");
+ auto awake = fsm.AddState("Awake");
+ auto sleepy = fsm.AddState("Sleepy");
+
+ auto sleep = fsm.AddOutput1("sleep", 0);
+ auto walk = fsm.AddOutput1("walk", 0);
+ auto run = fsm.AddOutput1("run", 1);
+ auto die = fsm.AddOutput1("die", 1);
+
+ hungry->OnCondition(foo_in).NextState(happy).Else().NextState(sad);
+ hungry->OnCondition(qux_in).SetOutput(walk, 0).SetOutput(die, 1);
+
+ sad->NextState(awake);
+ sad->SetOutput(walk, 0);
+ sad->SetOutput(run, 1);
+
+ awake->NextState(sleepy);
+
+ sleepy->OnCondition(bar_in)
+ .NextState(hungry)
+ .ElseOnCondition(qux_in)
+ .NextState(sad);
+
+ happy->OnCondition(bar_in).SetOutput(die, 0);
+ happy->OnCondition(foo_in).NextState(hungry).SetOutput(sleep, 1);
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, OutputAssignments) {
+ // Test various conditional and unconditional assignments of output regs in
+ // different states. Verify the proper insertion of assignment of default
+ // values to the outputs such that each code path has exactly one assignment
+ // per output.
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst_n = module->AddInput("rst_n");
+
+ LogicRef* a = module->AddInput("a");
+ LogicRef* b = module->AddInput("b");
+
+ FsmBuilder fsm("SimpleFsm", module, clk, UseSystemVerilog(),
+ Reset{rst_n, /*async=*/false, /*active_low=*/true});
+ auto out_42 = fsm.AddOutput("out_42", /*width=*/8, /*default_value=*/42);
+ auto out_123 = fsm.AddOutput("out_123", /*width=*/8, /*default_value=*/123);
+
+ auto idle_state = fsm.AddState("Idle");
+ idle_state->NextState(idle_state);
+
+ {
+ auto state = fsm.AddState("AssignmentToDefaultValue");
+ state->SetOutput(out_42, 42);
+ state->SetOutput(out_123, 123);
+ state->NextState(idle_state);
+ }
+
+ {
+ auto state = fsm.AddState("AssignmentToNondefaultValue");
+ state->SetOutput(out_42, 33);
+ state->SetOutput(out_123, 22);
+ state->NextState(idle_state);
+ }
+
+ {
+ auto state = fsm.AddState("ConditionalAssignToDefaultValue");
+ state->OnCondition(a).SetOutput(out_42, 42);
+ state->OnCondition(b).SetOutput(out_123, 123);
+ state->NextState(idle_state);
+ }
+
+ {
+ auto state = fsm.AddState("ConditionalAssignToNondefaultValue");
+ state->OnCondition(a).SetOutput(out_42, 1);
+ state->OnCondition(b).SetOutput(out_123, 2).Else().SetOutput(out_123, 4);
+ state->NextState(idle_state);
+ }
+
+ {
+ auto state = fsm.AddState("NestedConditionalAssignToNondefaultValue");
+ state->OnCondition(a).OnCondition(b).SetOutput(out_42, 1).Else().SetOutput(
+ out_123, 7);
+ state->NextState(idle_state);
+ }
+
+ {
+ auto state = fsm.AddState("AssignToNondefaultValueAtDifferentDepths");
+ ConditionalFsmBlock& if_a = state->OnCondition(a);
+ if_a.SetOutput(out_42, 1);
+ if_a.Else().OnCondition(b).SetOutput(out_42, 77);
+ state->NextState(idle_state);
+ }
+
+ XLS_ASSERT_OK(fsm.Build());
+ XLS_VLOG(1) << f.Emit();
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ f.Emit());
+}
+
+TEST_P(FiniteStateMachineTest, MultipleAssignments) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst_n = module->AddInput("rst_n");
+
+ LogicRef* a = module->AddInput("a");
+
+ FsmBuilder fsm("SimpleFsm", module, clk, UseSystemVerilog(),
+ Reset{rst_n, /*async=*/false, /*active_low=*/true});
+ auto out = fsm.AddOutput("out", /*width=*/8, /*default_value=*/42);
+
+ auto state = fsm.AddState("State");
+ state->SetOutput(out, 123);
+ state->OnCondition(a).SetOutput(out, 44);
+
+ XLS_VLOG(1) << f.Emit();
+ EXPECT_THAT(
+ fsm.Build(),
+ StatusIs(absl::StatusCode::kInvalidArgument,
+ HasSubstr("Output \"out\" may be assigned more than once")));
+}
+
+TEST_P(FiniteStateMachineTest, MultipleConditionalAssignments) {
+ VerilogFile f;
+ Module* module = f.Add(f.Make(TestBaseName(), &f));
+
+ LogicRef1* clk = module->AddInput("clk");
+ LogicRef1* rst_n = module->AddInput("rst_n");
+
+ LogicRef* a = module->AddInput("a");
+ LogicRef* b = module->AddInput("b");
+
+ FsmBuilder fsm("SimpleFsm", module, clk, UseSystemVerilog(),
+ Reset{rst_n, /*async=*/false, /*active_low=*/true});
+ auto out = fsm.AddOutput("out", /*width=*/8, /*default_value=*/42);
+
+ auto state = fsm.AddState("State");
+ state->OnCondition(a).SetOutput(out, 44);
+ // Even setting output to same value is an error.
+ state->OnCondition(b).SetOutput(out, 44);
+
+ XLS_VLOG(1) << f.Emit();
+ EXPECT_THAT(
+ fsm.Build(),
+ StatusIs(absl::StatusCode::kInvalidArgument,
+ HasSubstr("Output \"out\" may be assigned more than once")));
+}
+
+INSTANTIATE_TEST_SUITE_P(FiniteStateMachineTestInstantiation,
+ FiniteStateMachineTest,
+ testing::ValuesIn(kDefaultSimulationTargets),
+ ParameterizedTestName);
+
+} // namespace
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/flattening.cc b/xls/codegen/flattening.cc
new file mode 100644
index 0000000000..89319dab00
--- /dev/null
+++ b/xls/codegen/flattening.cc
@@ -0,0 +1,170 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/flattening.h"
+
+#include "absl/status/status.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/status_macros.h"
+#include "xls/ir/bits_ops.h"
+#include "xls/ir/package.h"
+
+namespace xls {
+
+// Gathers the Bits objects at the leaves of the Value.
+static void GatherValueLeaves(const Value& value, std::vector* leaves) {
+ switch (value.kind()) {
+ case ValueKind::kBits:
+ leaves->push_back(value.bits());
+ break;
+ case ValueKind::kTuple:
+ case ValueKind::kArray:
+ for (const Value& e : value.elements()) {
+ GatherValueLeaves(e, leaves);
+ }
+ break;
+ default:
+ XLS_LOG(FATAL) << "Invalid value kind: " << value.kind();
+ }
+}
+
+Bits FlattenValueToBits(const Value& value) {
+ std::vector leaves;
+ GatherValueLeaves(value, &leaves);
+ return bits_ops::Concat(leaves);
+}
+
+xabsl::StatusOr UnflattenBitsToValue(const Bits& bits,
+ const Type* type) {
+ if (bits.bit_count() != type->GetFlatBitCount()) {
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Cannot unflatten input. Has %d bits, expected %d bits",
+ bits.bit_count(), type->GetFlatBitCount()));
+ }
+ if (type->IsBits()) {
+ return Value(bits);
+ }
+ if (type->IsTuple()) {
+ std::vector elements;
+ const TupleType* tuple_type = type->AsTupleOrDie();
+ for (int64 i = 0; i < tuple_type->size(); ++i) {
+ Type* element_type = tuple_type->element_type(i);
+ XLS_ASSIGN_OR_RETURN(
+ Value element, UnflattenBitsToValue(
+ bits.Slice(GetFlatBitIndexOfElement(tuple_type, i),
+ element_type->GetFlatBitCount()),
+ element_type));
+ elements.push_back(element);
+ }
+ return Value::Tuple(elements);
+ }
+ if (type->IsArray()) {
+ std::vector elements;
+ const ArrayType* array_type = type->AsArrayOrDie();
+ for (int64 i = 0; i < array_type->size(); ++i) {
+ XLS_ASSIGN_OR_RETURN(
+ Value element,
+ UnflattenBitsToValue(
+ bits.Slice(GetFlatBitIndexOfElement(array_type, i),
+ array_type->element_type()->GetFlatBitCount()),
+ array_type->element_type()));
+ elements.push_back(element);
+ }
+ return Value::Array(elements);
+ }
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Invalid type: %s", type->ToString()));
+}
+
+xabsl::StatusOr UnflattenBitsToValue(const Bits& bits,
+ const TypeProto& type_proto) {
+ // Create a dummy package for converting a TypeProto into a Type*.
+ Package p("unflatten_dummy");
+ XLS_ASSIGN_OR_RETURN(Type * type, p.GetTypeFromProto(type_proto));
+ return UnflattenBitsToValue(bits, type);
+}
+
+int64 GetFlatBitIndexOfElement(const TupleType* tuple_type, int64 index) {
+ XLS_CHECK_GE(index, 0);
+ XLS_CHECK_LT(index, tuple_type->size());
+ int64 flat_index = 0;
+ for (int64 i = tuple_type->size() - 1; i > index; --i) {
+ flat_index += tuple_type->element_type(i)->GetFlatBitCount();
+ }
+ return flat_index;
+}
+
+int64 GetFlatBitIndexOfElement(const ArrayType* array_type, int64 index) {
+ XLS_CHECK_GE(index, 0);
+ XLS_CHECK_LT(index, array_type->size());
+ return (array_type->size() - index - 1) *
+ array_type->element_type()->GetFlatBitCount();
+}
+
+// Recursive helper for Unflatten functions.
+verilog::Expression* UnflattenArrayHelper(int64 flat_index_offset,
+ verilog::IndexableExpression* input,
+ ArrayType* array_type,
+ verilog::VerilogFile* file) {
+ std::vector elements;
+ const int64 element_width = array_type->element_type()->GetFlatBitCount();
+ for (int64 i = 0; i < array_type->size(); ++i) {
+ const int64 element_start =
+ flat_index_offset + GetFlatBitIndexOfElement(array_type, i);
+ if (array_type->element_type()->IsArray()) {
+ elements.push_back(UnflattenArrayHelper(
+ element_start, input, array_type->element_type()->AsArrayOrDie(),
+ file));
+ } else {
+ elements.push_back(
+ file->Slice(input, element_start + element_width - 1, element_start));
+ }
+ }
+ return file->ArrayAssignmentPattern(elements);
+}
+
+verilog::Expression* UnflattenArray(verilog::IndexableExpression* input,
+ ArrayType* array_type,
+ verilog::VerilogFile* file) {
+ return UnflattenArrayHelper(/*flat_index_offset=*/0, input, array_type, file);
+}
+
+verilog::Expression* UnflattenArrayShapedTupleElement(
+ verilog::IndexableExpression* input, TupleType* tuple_type,
+ int64 tuple_index, verilog::VerilogFile* file) {
+ XLS_CHECK(tuple_type->element_type(tuple_index)->IsArray());
+ ArrayType* array_type = tuple_type->element_type(tuple_index)->AsArrayOrDie();
+ return UnflattenArrayHelper(
+ /*flat_index_offset=*/GetFlatBitIndexOfElement(tuple_type, tuple_index),
+ input, array_type, file);
+}
+
+verilog::Expression* FlattenArray(verilog::IndexableExpression* input,
+ ArrayType* array_type,
+ verilog::VerilogFile* file) {
+ std::vector elements;
+ for (int64 i = 0; i < array_type->size(); ++i) {
+ verilog::IndexableExpression* element =
+ file->Index(input, i); // array_type->size() - i - 1);
+ if (array_type->element_type()->IsArray()) {
+ elements.push_back(FlattenArray(
+ element, array_type->element_type()->AsArrayOrDie(), file));
+ } else {
+ elements.push_back(element);
+ }
+ }
+ return file->Concat(elements);
+}
+
+} // namespace xls
diff --git a/xls/codegen/flattening.h b/xls/codegen/flattening.h
new file mode 100644
index 0000000000..670abd615f
--- /dev/null
+++ b/xls/codegen/flattening.h
@@ -0,0 +1,72 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Library defining how arrays and tuples are lowered into vectors of bits by
+// the generators.
+#ifndef THIRD_PARTY_XLS_CODEGEN_FLATTENING_H_
+#define THIRD_PARTY_XLS_CODEGEN_FLATTENING_H_
+
+#include "absl/types/span.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/status/statusor.h"
+#include "xls/ir/bits.h"
+#include "xls/ir/type.h"
+#include "xls/ir/value.h"
+#include "xls/ir/xls_type.pb.h"
+
+namespace xls {
+
+// Flattens this arbitrarily-typed Value to a bits type containing the same
+// total number of bits. Tuples are flattened by concatenating all of the leaf
+// elements. The zero-th tuple element ends up in the highest-indexed bits in
+// the resulting vector. Similarly, in a flattened array the zero-th element
+// ends up in the highest index bits. This is in line with the behavior of
+// Verilog concatenate operation.
+Bits FlattenValueToBits(const Value& value);
+
+// Unflattens the given Bits to a Value of the given type. This is the inverse
+// of FlattenValueToBits.
+xabsl::StatusOr UnflattenBitsToValue(const Bits& bits, const Type* type);
+xabsl::StatusOr UnflattenBitsToValue(const Bits& bits,
+ const TypeProto& type_proto);
+
+// Returns the index of the first bit of tuple element at 'index' where the
+// tuple is flattened into a vector of bits.
+int64 GetFlatBitIndexOfElement(const TupleType* tuple_type, int64 index);
+
+// Overload which returns the index of an element for an array type.
+int64 GetFlatBitIndexOfElement(const ArrayType* array_type, int64 index);
+
+// Unflattens the given VAST expression into a unpacked array
+// representation. 'array_type' is the underlying XLS type of the expression.
+// Uses the SystemVerilog-only array assignment construct.
+verilog::Expression* UnflattenArray(verilog::IndexableExpression* input,
+ ArrayType* array_type,
+ verilog::VerilogFile* file);
+
+// Flattens the given VAST expression into a flat bit vector. 'input' must be an
+// unpacked array. 'array_type' is the underlying XLS type of the expression.
+verilog::Expression* FlattenArray(verilog::IndexableExpression* input,
+ ArrayType* array_type,
+ verilog::VerilogFile* file);
+
+// Unflattens the array element at the given index of 'input', a flattened
+// tuple. 'tuple_type' is the underlying XLS type of the tuple.
+verilog::Expression* UnflattenArrayShapedTupleElement(
+ verilog::IndexableExpression* input, TupleType* tuple_type,
+ int64 tuple_index, verilog::VerilogFile* file);
+
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_FLATTENING_H_
diff --git a/xls/codegen/flattening_test.cc b/xls/codegen/flattening_test.cc
new file mode 100644
index 0000000000..b3763593c5
--- /dev/null
+++ b/xls/codegen/flattening_test.cc
@@ -0,0 +1,163 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/flattening.h"
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "xls/common/status/matchers.h"
+#include "xls/ir/ir_test_base.h"
+#include "xls/ir/type.h"
+
+namespace xls {
+namespace {
+
+using status_testing::IsOkAndHolds;
+
+class ValueFlatteningTest : public IrTestBase {};
+
+TEST_F(ValueFlatteningTest, FlatIndexing) {
+ Package p(TestName());
+ Type* b0 = p.GetBitsType(0);
+ Type* b42 = p.GetBitsType(42);
+ BitsType* b5 = p.GetBitsType(5);
+
+ TupleType* t_empty = p.GetTupleType({});
+ EXPECT_EQ(t_empty->GetFlatBitCount(), 0);
+
+ TupleType* t1 = p.GetTupleType({b42});
+ EXPECT_EQ(t1->GetFlatBitCount(), 42);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t1, 0), 0);
+
+ TupleType* t2 = p.GetTupleType({b42, b0, b5, b5, b0});
+ EXPECT_EQ(t2->GetFlatBitCount(), 52);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t2, 0), 10);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t2, 1), 10);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t2, 2), 5);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t2, 3), 0);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t2, 4), 0);
+
+ ArrayType* a_of_b5 = p.GetArrayType(32, b5);
+ EXPECT_EQ(a_of_b5->GetFlatBitCount(), 160);
+ EXPECT_EQ(GetFlatBitIndexOfElement(a_of_b5, 0), 155);
+ EXPECT_EQ(GetFlatBitIndexOfElement(a_of_b5, 15), 80);
+ EXPECT_EQ(GetFlatBitIndexOfElement(a_of_b5, 31), 0);
+
+ ArrayType* array_2d = p.GetArrayType(4, a_of_b5);
+ EXPECT_EQ(array_2d->GetFlatBitCount(), 640);
+ EXPECT_EQ(GetFlatBitIndexOfElement(array_2d, 0), 480);
+ EXPECT_EQ(GetFlatBitIndexOfElement(array_2d, 2), 160);
+
+ // Nested tuple with a nested array.
+ TupleType* t3 = p.GetTupleType({t2, b5, b42, array_2d});
+ EXPECT_EQ(t3->GetFlatBitCount(), 739);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t3, 0), 687);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t3, 1), 682);
+ EXPECT_EQ(GetFlatBitIndexOfElement(t3, 2), 640);
+}
+
+TEST_F(ValueFlatteningTest, FlattenValues) {
+ Package p(TestName());
+
+ Bits empty_bits;
+ EXPECT_EQ(empty_bits, FlattenValueToBits(Value(empty_bits)));
+ EXPECT_THAT(UnflattenBitsToValue(empty_bits, p.GetBitsType(0)),
+ IsOkAndHolds(Value(empty_bits)));
+
+ Bits forty_two = UBits(42, 123);
+ EXPECT_EQ(forty_two, FlattenValueToBits(Value(forty_two)));
+ EXPECT_THAT(UnflattenBitsToValue(forty_two, p.GetBitsType(123)),
+ IsOkAndHolds(Value(forty_two)));
+
+ // Empty tuple should flatten to a zero-bit Bits object.
+ EXPECT_EQ(empty_bits, FlattenValueToBits(Value::Tuple({})));
+ EXPECT_THAT(UnflattenBitsToValue(empty_bits, p.GetTupleType({})),
+ IsOkAndHolds(Value::Tuple({})));
+
+ Bits abc = UBits(0xabcdef, 24);
+ Value tuple_abc = Value::Tuple(
+ {Value(UBits(0xab, 8)), Value(UBits(0xc, 4)), Value(UBits(0xdef, 12))});
+ EXPECT_EQ(abc, FlattenValueToBits(tuple_abc));
+ EXPECT_THAT(UnflattenBitsToValue(abc, p.GetTypeForValue(tuple_abc)),
+ IsOkAndHolds(tuple_abc));
+
+ XLS_ASSERT_OK_AND_ASSIGN(
+ Value arr, Value::Array({Value(UBits(0x12, 8)), Value(UBits(0x34, 8))}));
+ EXPECT_EQ(UBits(0x1234, 16), FlattenValueToBits(arr));
+ EXPECT_THAT(UnflattenBitsToValue(UBits(0x1234, 16), p.GetTypeForValue(arr)),
+ IsOkAndHolds(arr));
+
+ // Two-element array of tuples.
+ Bits abc123 = UBits(0xabcdef123456ULL, 48);
+ Value tuple_123 = Value::Tuple(
+ {Value(UBits(0x12, 8)), Value(UBits(0x3, 4)), Value(UBits(0x456, 12))});
+ XLS_ASSERT_OK_AND_ASSIGN(Value abc_array,
+ Value::Array({tuple_abc, tuple_123}));
+ EXPECT_EQ(abc123, FlattenValueToBits(abc_array));
+ EXPECT_THAT(UnflattenBitsToValue(abc123, p.GetTypeForValue(abc_array)),
+ IsOkAndHolds(abc_array));
+}
+
+TEST_F(ValueFlatteningTest, ExpressionFlattening) {
+ Package p(TestName());
+ Type* b5 = p.GetBitsType(5);
+ ArrayType* a_of_b5 = p.GetArrayType(3, b5);
+ ArrayType* array_2d = p.GetArrayType(2, a_of_b5);
+
+ verilog::VerilogFile f;
+ verilog::Module* m = f.AddModule(TestName());
+
+ EXPECT_EQ(FlattenArray(m->AddUnpackedArrayReg("foo", f.PlainLiteral(5),
+ {f.PlainLiteral(3)}),
+ a_of_b5, &f)
+ ->Emit(),
+ "{foo[0], foo[1], foo[2]}");
+ EXPECT_EQ(
+ FlattenArray(
+ m->AddUnpackedArrayReg("foo", f.PlainLiteral(5),
+ {f.PlainLiteral(2), f.PlainLiteral(3)}),
+ array_2d, &f)
+ ->Emit(),
+ "{{foo[0][0], foo[0][1], foo[0][2]}, {foo[1][0], foo[1][1], foo[1][2]}}");
+}
+
+TEST_F(ValueFlatteningTest, ExpressionUnflattening) {
+ Package p(TestName());
+ Type* b5 = p.GetBitsType(5);
+ ArrayType* a_of_b5 = p.GetArrayType(3, b5);
+ ArrayType* array_2d = p.GetArrayType(2, a_of_b5);
+
+ verilog::VerilogFile f;
+ verilog::Module* m = f.AddModule(TestName());
+
+ EXPECT_EQ(UnflattenArray(m->AddReg("foo", 15), a_of_b5, &f)->Emit(),
+ "'{foo[14:10], foo[9:5], foo[4:0]}");
+ EXPECT_EQ(UnflattenArray(m->AddReg("foo", 30), array_2d, &f)->Emit(),
+ "'{'{foo[29:25], foo[24:20], foo[19:15]}, '{foo[14:10], foo[9:5], "
+ "foo[4:0]}}");
+
+ TupleType* tuple_type = p.GetTupleType({array_2d, b5, a_of_b5});
+ EXPECT_EQ(
+ UnflattenArrayShapedTupleElement(m->AddReg("foo", 50), tuple_type, 0, &f)
+ ->Emit(),
+ "'{'{foo[49:45], foo[44:40], foo[39:35]}, '{foo[34:30], foo[29:25], "
+ "foo[24:20]}}");
+ EXPECT_EQ(
+ UnflattenArrayShapedTupleElement(m->AddReg("foo", 50), tuple_type, 2, &f)
+ ->Emit(),
+ "'{foo[14:10], foo[9:5], foo[4:0]}");
+}
+
+} // namespace
+} // namespace xls
diff --git a/xls/codegen/module_builder.cc b/xls/codegen/module_builder.cc
new file mode 100644
index 0000000000..49e92fb5a5
--- /dev/null
+++ b/xls/codegen/module_builder.cc
@@ -0,0 +1,595 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/module_builder.h"
+
+#include "absl/status/status.h"
+#include "absl/strings/str_cat.h"
+#include "xls/codegen/flattening.h"
+#include "xls/codegen/node_expressions.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/ret_check.h"
+#include "xls/common/status/status_macros.h"
+#include "xls/ir/nodes.h"
+#include "xls/ir/package.h"
+
+namespace xls {
+namespace verilog {
+
+namespace {
+
+// Returns the bounds of the potentially-nested array type as a vector of
+// int64. Ordering of the vector is outer-most bound to inner-most. For example,
+// given array type 'bits[32][4][5]' yields {5, 4, 32}.
+std::vector NestedArrayBounds(ArrayType* type) {
+ std::vector bounds;
+ Type* t = type;
+ while (t->IsArray()) {
+ bounds.push_back(t->AsArrayOrDie()->size());
+ t = t->AsArrayOrDie()->element_type();
+ }
+ return bounds;
+}
+
+// Creates UnpackedArrayBounds corresponding to the given array type. If
+// use_system_verilog is true, the bound are expressed using "sizes" (e.g.,
+// "[3][4][5]") other wise it is expressed using ranges (e.g.,
+// "[0:2][0:3][0:4]").
+std::vector MakeUnpackedArrayBounds(
+ ArrayType* type, VerilogFile* file, bool use_system_verilog) {
+ std::vector bounds;
+ for (int64 size : NestedArrayBounds(type)) {
+ if (use_system_verilog) {
+ bounds.push_back(UnpackedArrayBound(file->PlainLiteral(size)));
+ } else {
+ bounds.push_back(UnpackedArrayBound(
+ std::make_pair(file->PlainLiteral(0), file->PlainLiteral(size - 1))));
+ }
+ }
+ return bounds;
+}
+
+// Returns the width of the element of the potentially nested array type. For
+// example, given array type 'bits[32][4][5]' yields 32.
+int64 NestedElementWidth(ArrayType* type) {
+ Type* t = type;
+ while (t->IsArray()) {
+ t = t->AsArrayOrDie()->element_type();
+ }
+ return t->GetFlatBitCount();
+}
+
+// Flattens a value into a single bits-typed expression. Tuples and arrays are
+// represented as a concatenation of their elements.
+xabsl::StatusOr FlattenValueToExpression(const Value& value,
+ VerilogFile* file) {
+ XLS_RET_CHECK_GT(value.GetFlatBitCount(), 0);
+ if (value.IsBits()) {
+ return file->Literal(value.bits());
+ }
+ // Compound types are represented as a concatentation of their elements.
+ std::vector elements;
+ for (const Value& element : value.elements()) {
+ if (element.GetFlatBitCount() > 0) {
+ XLS_ASSIGN_OR_RETURN(Expression * element_expr,
+ FlattenValueToExpression(element, file));
+ elements.push_back(element_expr);
+ }
+ }
+ return file->Concat(elements);
+}
+
+// Returns the given array value as an array assignment pattern. For example,
+// the array:
+//
+// [bits[8]:42, bits[8]:10, bits[8]:2]
+//
+// would produce:
+//
+// '{8'h42, 8'h10, 8'h2}
+xabsl::StatusOr ValueToArrayAssignmentPattern(
+ const Value& value, VerilogFile* file) {
+ XLS_RET_CHECK(value.IsArray());
+ std::vector pieces;
+ for (const Value& element : value.elements()) {
+ Expression* element_expr;
+ if (element.IsArray()) {
+ XLS_ASSIGN_OR_RETURN(element_expr,
+ ValueToArrayAssignmentPattern(element, file));
+ } else {
+ XLS_ASSIGN_OR_RETURN(element_expr,
+ FlattenValueToExpression(element, file));
+ }
+ pieces.push_back(element_expr);
+ }
+ return file->Make(pieces);
+}
+
+} // namespace
+
+absl::Status ModuleBuilder::AddAssignment(
+ Expression* lhs, Expression* rhs, Type* xls_type,
+ std::function add_assignment_statement) {
+ // Array assignment is only supported in SystemVerilog. In Verilog, arrays
+ // must be assigned element-by-element.
+ if (!use_system_verilog_ && xls_type != nullptr && xls_type->IsArray()) {
+ ArrayType* array_type = xls_type->AsArrayOrDie();
+ for (int64 i = 0; i < array_type->size(); ++i) {
+ XLS_RETURN_IF_ERROR(
+ AddAssignment(file_->Index(lhs->AsIndexableExpressionOrDie(), i),
+ file_->Index(rhs->AsIndexableExpressionOrDie(), i),
+ array_type->element_type(), add_assignment_statement));
+ }
+ } else {
+ add_assignment_statement(lhs, rhs);
+ }
+ return absl::OkStatus();
+}
+
+absl::Status ModuleBuilder::AddAssignmentFromValue(
+ Expression* lhs, const Value& value,
+ std::function add_assignment_statement) {
+ if (value.IsArray()) {
+ if (use_system_verilog_) {
+ // If using system verilog emit using an array assignment pattern like so:
+ // logic [4:0] foo [0:4][0:1] = '{'{5'h0, 5'h1}, '{..}, ...}
+ XLS_ASSIGN_OR_RETURN(Expression * rhs,
+ ValueToArrayAssignmentPattern(value, file_));
+ add_assignment_statement(lhs, rhs);
+ } else {
+ for (int64 i = 0; i < value.size(); ++i) {
+ XLS_RETURN_IF_ERROR(AddAssignmentFromValue(
+ file_->Index(lhs->AsIndexableExpressionOrDie(), i),
+ value.element(i), add_assignment_statement));
+ }
+ }
+ } else {
+ XLS_ASSIGN_OR_RETURN(Expression * flattened_expr,
+ FlattenValueToExpression(value, file_));
+ add_assignment_statement(lhs, flattened_expr);
+ }
+ return absl::OkStatus();
+}
+
+ModuleBuilder::ModuleBuilder(absl::string_view name, VerilogFile* file,
+ bool use_system_verilog)
+ : module_name_(SanitizeIdentifier(name)),
+ file_(file),
+ use_system_verilog_(use_system_verilog) {
+ module_ = file_->AddModule(module_name_);
+ functions_section_ = module_->Add(file_);
+ constants_section_ = module_->Add(file_);
+ input_section_ = module_->Add(file_);
+ declaration_and_assignment_section_ = module_->Add(file_);
+ output_section_ = module_->Add(file_);
+
+ NewDeclarationAndAssignmentSections();
+}
+
+void ModuleBuilder::NewDeclarationAndAssignmentSections() {
+ declaration_subsections_.push_back(
+ declaration_and_assignment_section_->Add(file_));
+ assignment_subsections_.push_back(
+ declaration_and_assignment_section_->Add(file_));
+}
+
+LogicRef* ModuleBuilder::DeclareUnpackedArrayWire(absl::string_view name,
+ ArrayType* array_type,
+ ModuleSection* section) {
+ return file_->Make(section->Add(
+ name, file_->PlainLiteral(NestedElementWidth(array_type)),
+ MakeUnpackedArrayBounds(array_type, file_, use_system_verilog_)));
+}
+
+LogicRef* ModuleBuilder::DeclareUnpackedArrayReg(absl::string_view name,
+ ArrayType* array_type,
+ ModuleSection* section) {
+ return file_->Make(section->Add(
+ name, file_->PlainLiteral(NestedElementWidth(array_type)),
+ MakeUnpackedArrayBounds(array_type, file_, use_system_verilog_)));
+}
+
+absl::Status ModuleBuilder::AssignFromSlice(
+ Expression* lhs, Expression* rhs, Type* xls_type, int64 slice_start,
+ std::function add_assignment_statement) {
+ if (xls_type->IsArray()) {
+ ArrayType* array_type = xls_type->AsArrayOrDie();
+ for (int64 i = 0; i < array_type->size(); ++i) {
+ XLS_RETURN_IF_ERROR(
+ AssignFromSlice(file_->Index(lhs->AsIndexableExpressionOrDie(), i),
+ rhs, array_type->element_type(),
+ slice_start + GetFlatBitIndexOfElement(array_type, i),
+ add_assignment_statement));
+ }
+ } else {
+ add_assignment_statement(
+ lhs, file_->Slice(rhs->AsIndexableExpressionOrDie(),
+ /*hi=*/slice_start + xls_type->GetFlatBitCount() - 1,
+ /*lo=*/slice_start));
+ }
+ return absl::OkStatus();
+}
+
+xabsl::StatusOr ModuleBuilder::AddInputPort(absl::string_view name,
+ Type* type) {
+ LogicRef* port = module_->AddPort(Direction::kInput, SanitizeIdentifier(name),
+ type->GetFlatBitCount());
+ if (!type->IsArray()) {
+ return port;
+ }
+ // All inputs are flattened so unflatten arrays with a sequence of
+ // assignments.
+ LogicRef* ar = DeclareUnpackedArrayWire(
+ absl::StrCat(SanitizeIdentifier(name), "_unflattened"),
+ type->AsArrayOrDie(), input_section());
+ XLS_RETURN_IF_ERROR(AssignFromSlice(
+ ar, port, type->AsArrayOrDie(), 0, [&](Expression* lhs, Expression* rhs) {
+ input_section()->Add(lhs, rhs);
+ }));
+ return ar;
+}
+
+LogicRef* ModuleBuilder::AddInputPort(absl::string_view name, int64 bit_count) {
+ return module_->AddPort(Direction::kInput, SanitizeIdentifier(name),
+ bit_count);
+}
+
+absl::Status ModuleBuilder::AddOutputPort(absl::string_view name, Type* type,
+ Expression* value) {
+ LogicRef* output_port = module_->AddPort(
+ Direction::kOutput, SanitizeIdentifier(name), type->GetFlatBitCount());
+ if (type->IsArray()) {
+ // The output is flattened so flatten arrays with a sequence of assignments.
+ XLS_RET_CHECK(value->IsIndexableExpression());
+ output_section()->Add(
+ output_port, FlattenArray(value->AsIndexableExpressionOrDie(),
+ type->AsArrayOrDie(), file_));
+ } else {
+ output_section()->Add(output_port, value);
+ }
+ return absl::OkStatus();
+}
+
+absl::Status ModuleBuilder::AddOutputPort(absl::string_view name,
+ int64 bit_count, Expression* value) {
+ LogicRef* output_port =
+ module_->AddPort(Direction::kOutput, SanitizeIdentifier(name), bit_count);
+ output_section()->Add(output_port, value);
+ return absl::OkStatus();
+}
+
+xabsl::StatusOr ModuleBuilder::DeclareModuleConstant(
+ absl::string_view name, const Value& value) {
+ // To generate XLS types we need a package.
+ // TODO(meheff): There should be a way of generating a Type for a value
+ // without instantiating a package.
+ Package p("TypeGenerator");
+ Type* type = p.GetTypeForValue(value);
+ LogicRef* ref;
+ if (type->IsArray()) {
+ ref = DeclareUnpackedArrayWire(SanitizeIdentifier(name),
+ type->AsArrayOrDie(), constants_section());
+ } else {
+ ref = module_->AddWire(SanitizeIdentifier(name), type->GetFlatBitCount(),
+ constants_section());
+ }
+ XLS_RETURN_IF_ERROR(
+ AddAssignmentFromValue(ref, value, [&](Expression* lhs, Expression* rhs) {
+ constants_section()->Add(lhs, rhs);
+ }));
+ return ref;
+}
+
+LogicRef* ModuleBuilder::DeclareVariable(absl::string_view name, Type* type) {
+ if (type->IsArray()) {
+ return DeclareUnpackedArrayWire(
+ SanitizeIdentifier(name), type->AsArrayOrDie(), declaration_section());
+ }
+ return module_->AddWire(SanitizeIdentifier(name), type->GetFlatBitCount(),
+ declaration_section());
+}
+
+bool ModuleBuilder::CanEmitAsInlineExpression(
+ Node* node, absl::optional> users_of_expression) {
+ if (node->GetType()->IsArray()) {
+ // TODO(meheff): With system verilog we can do array assignment.
+ return false;
+ }
+ absl::Span users =
+ users_of_expression.has_value() ? *users_of_expression : node->users();
+ for (Node* user : users) {
+ for (int64 i = 0; i < user->operand_count(); ++i) {
+ if (user->operand(i) == node && OperandMustBeNamedReference(user, i)) {
+ return false;
+ }
+ }
+ }
+ // To sidestep Verilog's jolly bit-width inference rules, emit arithmetic
+ // expressions as assignments. This gives the results of these expression
+ // explicit bit-widths.
+ switch (node->op()) {
+ case Op::kAdd:
+ case Op::kSub:
+ case Op::kSMul:
+ case Op::kUMul:
+ case Op::kSDiv:
+ case Op::kUDiv:
+ return false;
+ default:
+ break;
+ }
+ return true;
+}
+
+xabsl::StatusOr ModuleBuilder::EmitAsInlineExpression(
+ Node* node, absl::Span inputs) {
+ if (MustEmitAsFunction(node)) {
+ XLS_ASSIGN_OR_RETURN(VerilogFunction * func, DefineFunction(node));
+ return file_->Make(func, inputs);
+ }
+ return NodeToExpression(node, inputs, file_);
+}
+
+xabsl::StatusOr ModuleBuilder::EmitAsAssignment(
+ absl::string_view name, Node* node, absl::Span inputs) {
+ LogicRef* ref = DeclareVariable(name, node->GetType());
+ if (node->GetType()->IsArray()) {
+ // Array-shaped operations are handled specially. XLS arrays are represented
+ // as unpacked arrays in Verilog/SystemVerilog and unpacked arrays must be
+ // assigned element-by-element in Verilog.
+ ArrayType* array_type = node->GetType()->AsArrayOrDie();
+ switch (node->op()) {
+ case Op::kArray: {
+ for (int64 i = 0; i < inputs.size(); ++i) {
+ XLS_RETURN_IF_ERROR(AddAssignment(
+ file_->Index(ref, file_->PlainLiteral(i)), inputs[i],
+ array_type->element_type(),
+ [&](Expression* lhs, Expression* rhs) {
+ assignment_section()->Add(lhs, rhs);
+ }));
+ }
+ break;
+ }
+ case Op::kArrayIndex:
+ XLS_RETURN_IF_ERROR(AddAssignment(
+ ref,
+ file_->Index(inputs[0]->AsIndexableExpressionOrDie(), inputs[1]),
+ array_type, [&](Expression* lhs, Expression* rhs) {
+ assignment_section()->Add(lhs, rhs);
+ }));
+ break;
+ case Op::kTupleIndex:
+ XLS_RETURN_IF_ERROR(AssignFromSlice(
+ ref, inputs[0], array_type,
+ GetFlatBitIndexOfElement(
+ node->operand(0)->GetType()->AsTupleOrDie(),
+ node->As()->index()),
+ [&](Expression* lhs, Expression* rhs) {
+ assignment_section()->Add(lhs, rhs);
+ }));
+ break;
+ default:
+ return absl::UnimplementedError(
+ absl::StrCat("Unsupported array-shaped op: ", node->ToString()));
+ }
+ } else {
+ XLS_ASSIGN_OR_RETURN(Expression * expr,
+ EmitAsInlineExpression(node, inputs));
+ XLS_RETURN_IF_ERROR(Assign(ref, expr, node->GetType()));
+ }
+ return ref;
+}
+
+absl::Status ModuleBuilder::Assign(LogicRef* lhs, Expression* rhs, Type* type) {
+ XLS_RETURN_IF_ERROR(
+ AddAssignment(lhs, rhs, type, [&](Expression* lhs, Expression* rhs) {
+ assignment_section()->Add(lhs, rhs);
+ }));
+ return absl::OkStatus();
+}
+
+xabsl::StatusOr ModuleBuilder::DeclareRegister(
+ absl::string_view name, Type* type, Expression* next,
+ absl::optional reset_value) {
+ LogicRef* reg;
+ if (type->IsArray()) {
+ // Currently, an array register requires SystemVerilog because there is an
+ // array assignment in the always flop block.
+ reg = DeclareUnpackedArrayReg(SanitizeIdentifier(name),
+ type->AsArrayOrDie(), declaration_section());
+ } else {
+ reg = module_->AddReg(SanitizeIdentifier(name), type->GetFlatBitCount(),
+ /*init=*/absl::nullopt, declaration_section());
+ }
+ return Register{
+ .ref = reg,
+ .next = next,
+ .reset_value = reset_value.has_value() ? reset_value.value() : nullptr,
+ .xls_type = type};
+}
+
+xabsl::StatusOr ModuleBuilder::DeclareRegister(
+ absl::string_view name, int64 bit_count, Expression* next,
+ absl::optional reset_value) {
+ return Register{
+ .ref = module_->AddReg(SanitizeIdentifier(name), bit_count,
+ /*init=*/absl::nullopt, declaration_section()),
+ .next = next,
+ .reset_value = reset_value.has_value() ? reset_value.value() : nullptr,
+ .xls_type = nullptr};
+}
+
+absl::Status ModuleBuilder::AssignRegisters(
+ LogicRef* clk, absl::Span registers,
+ Expression* load_enable, absl::optional rst) {
+ // Construct an always_ff block.
+ std::vector sensitivity_list;
+ sensitivity_list.push_back(file_->Make(clk));
+ if (rst.has_value()) {
+ if (rst->active_low) {
+ sensitivity_list.push_back(file_->Make(rst->signal));
+ } else {
+ sensitivity_list.push_back(file_->Make(rst->signal));
+ }
+ }
+ AlwaysBase* always;
+ if (use_system_verilog_) {
+ always = assignment_section()->Add(file_, sensitivity_list);
+ } else {
+ always = assignment_section()->Add(file_, sensitivity_list);
+ }
+ // assignment_block is the block in which the foo <= foo_next assignments
+ // go. It can either be conditional (if there is a reset signal) or
+ // unconditional.
+ StatementBlock* assignment_block = always->statements();
+ if (rst.has_value()) {
+ // Registers have a reset signal. Conditionally assign the registers based
+ // on whether the reset signal is asserted.
+ Expression* rst_condition;
+ if (rst->active_low) {
+ rst_condition = file_->LogicalNot(rst->signal);
+ } else {
+ rst_condition = rst->signal;
+ }
+ Conditional* conditional =
+ always->statements()->Add(file_, rst_condition);
+ for (const Register& reg : registers) {
+ XLS_RET_CHECK_NE(reg.reset_value, nullptr);
+ XLS_RETURN_IF_ERROR(AddAssignment(
+ reg.ref, reg.reset_value, reg.xls_type,
+ [&](Expression* lhs, Expression* rhs) {
+ conditional->consequent()->Add(lhs, rhs);
+ }));
+ }
+ assignment_block = conditional->AddAlternate();
+ }
+ // Assign registers to the next value for the non-reset case (either no
+ // reset signal or reset signal is not asserted).
+ for (const Register& reg : registers) {
+ XLS_RETURN_IF_ERROR(AddAssignment(
+ reg.ref, reg.next, reg.xls_type, [&](Expression* lhs, Expression* rhs) {
+ assignment_block->Add(
+ lhs, load_enable == nullptr
+ ? rhs
+ : file_->Ternary(load_enable, rhs, lhs));
+ }));
+ }
+ return absl::OkStatus();
+}
+
+bool ModuleBuilder::MustEmitAsFunction(Node* node) {
+ switch (node->op()) {
+ case Op::kSMul:
+ case Op::kUMul:
+ return true;
+ default:
+ return false;
+ }
+}
+
+std::string ModuleBuilder::VerilogFunctionName(Node* node) {
+ switch (node->op()) {
+ case Op::kSMul:
+ case Op::kUMul:
+ // Multiplies may be mixed width so include result and operand widths in
+ // the name.
+ return absl::StrFormat(
+ "%s%db_%db_x_%db", OpToString(node->op()), node->BitCountOrDie(),
+ node->operand(0)->BitCountOrDie(), node->operand(1)->BitCountOrDie());
+ default:
+ XLS_LOG(FATAL) << "Cannot emit node as function: " << node->ToString();
+ }
+}
+
+namespace {
+
+// Defines and returns a function which implements the given SMul node.
+VerilogFunction* DefineSmulFunction(Node* node, absl::string_view function_name,
+ ModuleSection* section) {
+ XLS_CHECK_EQ(node->op(), Op::kSMul);
+ VerilogFile* file = section->file();
+
+ VerilogFunction* func =
+ section->Add(function_name, node->BitCountOrDie(), file);
+ XLS_CHECK_EQ(node->operand_count(), 2);
+ Expression* lhs = func->AddArgument("lhs", node->operand(0)->BitCountOrDie());
+ Expression* rhs = func->AddArgument("rhs", node->operand(1)->BitCountOrDie());
+ // The code conservatively assigns signed-casted inputs to temporary
+ // variables, uses them in the multiply expression which is assigned to
+ // another signed temporary. Finally, this is unsign-casted and assigned to
+ // the return value of the function. These shenanigans ensure no surprising
+ // sign/zero extensions of any values.
+ LogicRef* signed_lhs = func->AddRegDef(
+ "signed_lhs", file->PlainLiteral(node->operand(0)->BitCountOrDie()),
+ /*init=*/UninitializedSentinel(), /*is_signed=*/true);
+ LogicRef* signed_rhs = func->AddRegDef(
+ "signed_rhs", file->PlainLiteral(node->operand(1)->BitCountOrDie()),
+ /*init=*/UninitializedSentinel(), /*is_signed=*/true);
+ LogicRef* signed_result = func->AddRegDef(
+ "signed_result", file->PlainLiteral(node->BitCountOrDie()),
+ /*init=*/UninitializedSentinel(), /*is_signed=*/true);
+ func->AddStatement(signed_lhs,
+ file->Make(lhs));
+ func->AddStatement(signed_rhs,
+ file->Make(rhs));
+ func->AddStatement(signed_result,
+ file->Mul(signed_lhs, signed_rhs));
+ func->AddStatement(
+ func->return_value_ref(), file->Make(signed_result));
+
+ return func;
+}
+
+// Defines and returns a function which implements the given UMul node.
+VerilogFunction* DefineUmulFunction(Node* node, absl::string_view function_name,
+ ModuleSection* section) {
+ XLS_CHECK_EQ(node->op(), Op::kUMul);
+ VerilogFile* file = section->file();
+
+ VerilogFunction* func =
+ section->Add(function_name, node->BitCountOrDie(), file);
+ XLS_CHECK_EQ(node->operand_count(), 2);
+ Expression* lhs = func->AddArgument("lhs", node->operand(0)->BitCountOrDie());
+ Expression* rhs = func->AddArgument("rhs", node->operand(1)->BitCountOrDie());
+ func->AddStatement(func->return_value_ref(),
+ file->Mul(lhs, rhs));
+
+ return func;
+}
+
+} // namespace
+
+xabsl::StatusOr ModuleBuilder::DefineFunction(Node* node) {
+ std::string function_name = VerilogFunctionName(node);
+ if (node_functions_.contains(function_name)) {
+ return node_functions_.at(function_name);
+ }
+ VerilogFunction* func;
+ switch (node->op()) {
+ case Op::kSMul:
+ func = DefineSmulFunction(node, function_name, functions_section_);
+ break;
+ case Op::kUMul:
+ func = DefineUmulFunction(node, function_name, functions_section_);
+ break;
+ default:
+ XLS_LOG(FATAL) << "Cannot define node as function: " << node->ToString();
+ }
+ node_functions_[function_name] = func;
+ return func;
+}
+
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/module_builder.h b/xls/codegen/module_builder.h
new file mode 100644
index 0000000000..e7cdffb0bd
--- /dev/null
+++ b/xls/codegen/module_builder.h
@@ -0,0 +1,266 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef THIRD_PARTY_XLS_CODEGEN_MODULE_BUILDER_H_
+#define THIRD_PARTY_XLS_CODEGEN_MODULE_BUILDER_H_
+
+#include
+
+#include "absl/container/flat_hash_map.h"
+#include "absl/status/status.h"
+#include "absl/strings/string_view.h"
+#include "absl/types/span.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/status/statusor.h"
+#include "xls/ir/node.h"
+#include "xls/ir/type.h"
+#include "xls/ir/value.h"
+
+namespace xls {
+namespace verilog {
+
+// An abstraction wrapping a VAST module which assists with lowering of XLS IR
+// into Verilog. Key functionality:
+// (1) Handles mapping of XLS types to Verilog types.
+// (2) Hides Verilog vs. SystemVerilog differences and enables targeting
+// either from same code.
+// (3) Imposes common organization to the module.
+class ModuleBuilder {
+ public:
+ ModuleBuilder(absl::string_view name, VerilogFile* file,
+ bool use_system_verilog);
+
+ // Returns the underlying module being constructed.
+ Module* module() { return module_; }
+
+ // Add an input port of the given XLS type to the module.
+ xabsl::StatusOr AddInputPort(absl::string_view name, Type* type);
+
+ // Add an input port of the given width.
+ LogicRef* AddInputPort(absl::string_view name, int64 bit_count);
+
+ // Add an output port of the given XLS type to the module. The output is
+ // assigned the given value.
+ absl::Status AddOutputPort(absl::string_view name, Type* type,
+ Expression* value);
+
+ // Add an output port of the given width to the module. The output is assigned
+ // the given value.
+ absl::Status AddOutputPort(absl::string_view name, int64 bit_count,
+ Expression* value);
+
+ // Returns whether the given node can be emitted as an inline expression in
+ // Verilog (the alternative is to assign the expression of node to a temporary
+ // variable). Generally operations on bits-typed values can be emitted inline
+ // (for example, Op::kAnd). Operations on compound types such as arrays and
+ // tuples may require declaration of temporary variables and one or more
+ // assignment statements. Also, the users of a node may also force the node to
+ // be emitted as a temporary variable, if, for example, the emitted code for
+ // the user indexes into the node's value. 'users_of_expression', if given,
+ // are the users 'node' in the emitted Verilog to consider when determining
+ // whether node can be emitted inline. If not specified all users of node are
+ // considered.
+ bool CanEmitAsInlineExpression(Node* node,
+ absl::optional>
+ users_of_expression = absl::nullopt);
+
+ // Returns the given node as a Verilog expression. 'inputs' contains the
+ // operand expressions for the node.
+ xabsl::StatusOr EmitAsInlineExpression(
+ Node* node, absl::Span inputs);
+
+ // Emits the node as one or more assignments to a newly declared variable with
+ // the given name. 'inputs' contains the operand expressions for the
+ // node. Returns a reference to the declared variable.
+ xabsl::StatusOr EmitAsAssignment(
+ absl::string_view name, Node* node, absl::Span inputs);
+
+ // Declares a variable with the given name and XLS type. Returns a reference
+ // to the variable.
+ LogicRef* DeclareVariable(absl::string_view name, Type* type);
+
+ // Assigns the rhs to the lhs using continuous assignment where both sides
+ // have the given XLS type. The emitted verilog may require multiple
+ // assignment statements for compound types such as arrays.
+ absl::Status Assign(LogicRef* lhs, Expression* rhs, Type* type);
+
+ // Declares variable with the given name and assigns the given value to
+ // it. Returns a reference to the variable.
+ xabsl::StatusOr DeclareModuleConstant(absl::string_view name,
+ const Value& Value);
+
+ // Data structure describing a register (collection of flops).
+ struct Register {
+ // Reference to the declared logic/reg variable holding the register value.
+ LogicRef* ref;
+
+ // The expression to assign to the register at each clock.
+ Expression* next;
+
+ // The register value upon reset. Should be non-null iff AssignRegisters is
+ // called with non-null Reset argument.
+ Expression* reset_value;
+
+ // Optional XLS type of this register. Can be null.
+ Type* xls_type;
+ };
+
+ // Declares a register of the given XLS type. Arguments:
+ // name: name of the declared Verilog register.
+ // type: XLS type of the register.
+ // next: The expression to assign to the register each clock.
+ // reset_value: The value of the register on reset. Should be non-null iff
+ // the corresponding AssignRegisters call includes a non-null Reset
+ // argument.
+ //
+ // Declared registers must be passed to a subsequent AssignRegisters call for
+ // assignment within an always block.
+ xabsl::StatusOr DeclareRegister(
+ absl::string_view name, Type* type, Expression* next,
+ absl::optional reset_value = absl::nullopt);
+
+ // As above, but declares a register of a given bit width.
+ xabsl::StatusOr DeclareRegister(
+ absl::string_view name, int64 bit_count, Expression* next,
+ absl::optional reset_value = absl::nullopt);
+
+ // Construct an always block to assign values to the registers. Arguments:
+ // clk: Clock signal to use for registers.
+ // registers: Registers to assign within this block.
+ // load_enable: Optional load enable signal. The register is loaded only if
+ // this signal is asserted.
+ // rst: Optional reset signal.
+ absl::Status AssignRegisters(LogicRef* clk,
+ absl::Span registers,
+ Expression* load_enable = nullptr,
+ absl::optional rst = absl::nullopt);
+
+ // For organization (not functionality) the module is divided into several
+ // sections. The emitted module has the following structure:
+ //
+ // module foo(
+ // ...
+ // );
+ // { functions_section }
+ // // definitions of functions used in module.
+ // { constants_section }
+ // // declarations of module-level constants.
+ // { input_section }
+ // // converts potentially flattened input values to
+ // // module-internal form (e.g. unpacked array).
+ // { declarations_sections_[0] }
+ // // declarations of module variables.
+ // { assignments_sections_[0] }
+ // // assignments to module variables and always_ff sections.
+ // { declarations_sections_[1] } // Optional
+ // { assignments_sections_[1] } // Optional
+ // ...
+ // { output_section }
+ // // assigns the output port(s) including any flattening.
+ // endmodule
+ //
+ // The declarations and assignment sections appear as a pair and more than one
+ // instance of this pair of sections can be added to the module by calling
+ // NewDeclarationAndAssignmentSections.
+
+ // Creates new declaration and assignment sections immediately after the
+ // current declaration and assignment sections.
+ void NewDeclarationAndAssignmentSections();
+
+ // Methods to returns one of the various sections in the module.
+ ModuleSection* declaration_section() const {
+ return declaration_subsections_.back();
+ }
+ ModuleSection* assignment_section() const {
+ return assignment_subsections_.back();
+ }
+ ModuleSection* functions_section() const { return functions_section_; }
+ ModuleSection* constants_section() const { return constants_section_; }
+ ModuleSection* input_section() const { return input_section_; }
+ ModuleSection* output_section() const { return output_section_; }
+
+ private:
+ // Declares an unpacked array wire/reg variable of the given XLS array type in
+ // the given ModuleSection.
+ LogicRef* DeclareUnpackedArrayWire(absl::string_view name,
+ ArrayType* array_type,
+ ModuleSection* section);
+ LogicRef* DeclareUnpackedArrayReg(absl::string_view name,
+ ArrayType* array_type,
+ ModuleSection* section);
+
+ // Assigns 'rhs' to 'lhs'. Depending upon the type this may require multiple
+ // assignment statements (e.g., for array assignments in Verilog). The
+ // function add_assignment_statement should add a single assignment
+ // statement. This function argument enables customization of the type of
+ // assignment (continuous, blocking, or non-blocking) as well as the location
+ // where the assignment statements are added.
+ absl::Status AddAssignment(
+ Expression* lhs, Expression* rhs, Type* xls_type,
+ std::function add_assignment_statement);
+
+ // Assigns the arbitrarily-typed Value 'value' to 'lhs'. Depending upon the
+ // type this may require multiple assignment statements. The function
+ // add_assignment_statement should add a single assignment statement.
+ absl::Status AddAssignmentFromValue(
+ Expression* lhs, const Value& value,
+ std::function add_assignment_statement);
+
+ // Extracts a slice from the bits-typed 'rhs' and assigns it to 'lhs' in
+ // unflattened form. Depending upon the type this may require multiple
+ // assignment statements. The function add_assignment_statement should add a
+ // single assignment statement.
+ absl::Status AssignFromSlice(
+ Expression* lhs, Expression* rhs, Type* xls_type, int64 slice_start,
+ std::function add_assignment_statement);
+
+ // Returns true if the node must be emitted as a function.
+ bool MustEmitAsFunction(Node* node);
+
+ // Returns the name of the function which implements node. The function name
+ // should encapsulate all metainformation about the node (opcode, bitwidth,
+ // etc) because a function definition may be reused to implement multiple
+ // identical nodes (for example, two different 32-bit multiplies may map to
+ // the same function).
+ std::string VerilogFunctionName(Node* node);
+
+ // Defines a function which implements the given node. If a function already
+ // exists which implements this node then the existing function is returned.
+ xabsl::StatusOr DefineFunction(Node* node);
+
+ std::string module_name_;
+ VerilogFile* file_;
+
+ // True if SystemVerilog constructs can be used. Otherwise the emitted code is
+ // strictly Verilog.
+ bool use_system_verilog_;
+
+ Module* module_;
+ ModuleSection* functions_section_;
+ ModuleSection* constants_section_;
+ ModuleSection* input_section_;
+ ModuleSection* declaration_and_assignment_section_;
+ std::vector declaration_subsections_;
+ std::vector assignment_subsections_;
+ ModuleSection* output_section_;
+
+ // Verilog functions defined inside the module. Map is indexed by the function
+ // name.
+ absl::flat_hash_map node_functions_;
+};
+
+} // namespace verilog
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_MODULE_BUILDER_H_
diff --git a/xls/codegen/module_builder_test.cc b/xls/codegen/module_builder_test.cc
new file mode 100644
index 0000000000..2c3bd85fe3
--- /dev/null
+++ b/xls/codegen/module_builder_test.cc
@@ -0,0 +1,309 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/module_builder.h"
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/status/matchers.h"
+#include "xls/ir/bits.h"
+#include "xls/ir/function_builder.h"
+#include "xls/ir/package.h"
+#include "xls/ir/type.h"
+#include "xls/ir/value.h"
+#include "xls/simulation/verilog_test_base.h"
+
+namespace xls {
+namespace verilog {
+namespace {
+
+constexpr char kTestName[] = "module_builder_test";
+constexpr char kTestdataPath[] = "xls/codegen/testdata";
+
+Value Make1DArray(int64 element_width, absl::Span elements) {
+ std::vector values;
+ for (int64 element : elements) {
+ values.push_back(Value(UBits(element, element_width)));
+ }
+ return Value::ArrayOrDie(values);
+}
+
+Value Make2DArray(int64 element_width,
+ absl::Span> elements) {
+ std::vector rows;
+ for (const auto& row : elements) {
+ rows.push_back(Make1DArray(element_width, row));
+ }
+ return Value::ArrayOrDie(rows);
+}
+
+class ModuleBuilderTest : public VerilogTestBase {};
+
+TEST_P(ModuleBuilderTest, AddTwoNumbers) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x,
+ mb.AddInputPort("x", p.GetBitsType(32)));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y,
+ mb.AddInputPort("y", p.GetBitsType(32)));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", p.GetBitsType(32), file.Add(x, y)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, NewSections) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+
+ LogicRef* a = mb.DeclareVariable("a", u32);
+ XLS_ASSERT_OK(mb.Assign(a, file.Add(x, y), u32));
+
+ mb.NewDeclarationAndAssignmentSections();
+ LogicRef* b = mb.DeclareVariable("b", u32);
+ XLS_ASSERT_OK(mb.Assign(b, file.Add(a, y), u32));
+
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u32, file.Negate(b)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, Registers) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ LogicRef* clk = mb.AddInputPort("clk", 1);
+
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleBuilder::Register a,
+ mb.DeclareRegister("a", u32, file.Add(x, y)));
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleBuilder::Register b,
+ mb.DeclareRegister("b", u32, y));
+ XLS_ASSERT_OK(mb.AssignRegisters(clk, {a, b}));
+
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u32, file.Add(a.ref, b.ref)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, RegisterWithReset) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ LogicRef* clk = mb.AddInputPort("clk", 1);
+ LogicRef* rst = mb.AddInputPort("rst", 1);
+
+ XLS_ASSERT_OK_AND_ASSIGN(
+ ModuleBuilder::Register a,
+ mb.DeclareRegister("a", u32, file.Add(x, y),
+ /*reset_value=*/file.Literal(UBits(0, 32))));
+ XLS_ASSERT_OK_AND_ASSIGN(
+ ModuleBuilder::Register b,
+ mb.DeclareRegister("b", u32, y,
+ /*reset_value=*/file.Literal(UBits(0x42, 32))));
+ XLS_ASSERT_OK(mb.AssignRegisters(clk, {a, b},
+ /*load_enable=*/nullptr,
+ Reset{.signal = rst->AsLogicRefNOrDie<1>(),
+ .asynchronous = false,
+ .active_low = false}));
+
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u32, file.Add(a.ref, b.ref)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, RegisterWithLoadEnable) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ LogicRef* clk = mb.AddInputPort("clk", 1);
+ LogicRef* load_enable = mb.AddInputPort("le", 1);
+
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleBuilder::Register a,
+ mb.DeclareRegister("a", u32, file.Add(x, y)));
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleBuilder::Register b,
+ mb.DeclareRegister("b", u32, y));
+ XLS_ASSERT_OK(mb.AssignRegisters(clk, {a, b}, load_enable));
+
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u32, file.Add(a.ref, b.ref)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, RegisterWithLoadEnableAndReset) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ LogicRef* clk = mb.AddInputPort("clk", 1);
+ LogicRef* rst = mb.AddInputPort("rstn", 1);
+ LogicRef* load_enable = mb.AddInputPort("le", 1);
+
+ XLS_ASSERT_OK_AND_ASSIGN(
+ ModuleBuilder::Register a,
+ mb.DeclareRegister("a", u32, file.Add(x, y),
+ /*reset_value=*/file.Literal(UBits(0, 32))));
+ XLS_ASSERT_OK_AND_ASSIGN(
+ ModuleBuilder::Register b,
+ mb.DeclareRegister("b", u32, y,
+ /*reset_value=*/file.Literal(UBits(0x42, 32))));
+ XLS_ASSERT_OK(mb.AssignRegisters(clk, {a, b}, load_enable,
+ Reset{.signal = rst->AsLogicRefNOrDie<1>(),
+ .asynchronous = true,
+ .active_low = true}));
+
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u32, file.Add(a.ref, b.ref)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, ComplexComputation) {
+ VerilogFile file;
+ Package p(TestBaseName());
+ Type* u32 = p.GetBitsType(32);
+ Type* u16 = p.GetBitsType(16);
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ mb.declaration_section()->Add("Declaration section.");
+ mb.assignment_section()->Add("Assignment section.");
+ LogicRef* a = mb.DeclareVariable("a", u32);
+ LogicRef* b = mb.DeclareVariable("b", u16);
+ LogicRef* c = mb.DeclareVariable("c", u16);
+ XLS_ASSERT_OK(mb.Assign(a, file.Shrl(x, y), u32));
+ XLS_ASSERT_OK(mb.Assign(b, file.Slice(y, 16, 0), u16));
+ XLS_ASSERT_OK(mb.Assign(c, file.Add(b, b), u16));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", u16, file.Add(b, c)));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, ReturnConstantArray) {
+ VerilogFile file;
+ // The XLS IR package is just used for type management.
+ Package package(TestBaseName());
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ Value ar_value = Make2DArray(7, {{0x33, 0x12, 0x42}, {0x1, 0x2, 0x3}});
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * ar,
+ mb.DeclareModuleConstant("ar", ar_value));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", package.GetTypeForValue(ar_value), ar));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, PassThroughArray) {
+ VerilogFile file;
+ // The XLS IR package is just used for type management.
+ Package package(TestBaseName());
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ ArrayType* ar_type = package.GetArrayType(4, package.GetBitsType(13));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * a, mb.AddInputPort("a", ar_type));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", ar_type, a));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, ReturnConstantTuple) {
+ VerilogFile file;
+ // The XLS IR package is just used for type management.
+ Package package(TestBaseName());
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ Value tuple =
+ Value::Tuple({Value(UBits(0x8, 8)), Make1DArray(24, {0x3, 0x6, 0x9}),
+ Value(UBits(0xab, 16))});
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * t, mb.DeclareModuleConstant("t", tuple));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", package.GetTypeForValue(tuple), t));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, PassThroughTuple) {
+ VerilogFile file;
+ // The XLS IR package is just used for type management.
+ Package package(TestBaseName());
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ TupleType* tuple_type = package.GetTupleType(
+ {package.GetBitsType(42), package.GetArrayType(7, package.GetBitsType(6)),
+ package.GetTupleType({})});
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * a, mb.AddInputPort("a", tuple_type));
+ XLS_ASSERT_OK(mb.AddOutputPort("out", tuple_type, a));
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+
+TEST_P(ModuleBuilderTest, SmulAsFunction) {
+ VerilogFile file;
+ Package package(TestBaseName());
+ FunctionBuilder fb(TestBaseName(), &package);
+ Type* u32 = package.GetBitsType(32);
+ BValue x_smul_y = fb.SMul(fb.Param("x", u32), fb.Param("y", u32));
+ BValue z_smul_z = fb.SMul(fb.Param("z", u32), fb.Param("z", u32));
+
+ ModuleBuilder mb(TestBaseName(), &file,
+ /*use_system_verilog=*/UseSystemVerilog());
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * x, mb.AddInputPort("x", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * y, mb.AddInputPort("y", u32));
+ XLS_ASSERT_OK_AND_ASSIGN(LogicRef * z, mb.AddInputPort("z", u32));
+ XLS_ASSERT_OK(
+ mb.EmitAsAssignment("x_smul_y", x_smul_y.node(), {x, y}).status());
+ XLS_ASSERT_OK(
+ mb.EmitAsAssignment("z_smul_z", z_smul_z.node(), {z, z}).status());
+
+ ExpectVerilogEqualToGoldenFile(GoldenFilePath(kTestName, kTestdataPath),
+ file.Emit());
+}
+INSTANTIATE_TEST_SUITE_P(ModuleBuilderTestInstantiation, ModuleBuilderTest,
+ testing::ValuesIn(kDefaultSimulationTargets),
+ ParameterizedTestName);
+
+} // namespace
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/module_signature.cc b/xls/codegen/module_signature.cc
new file mode 100644
index 0000000000..d13976acff
--- /dev/null
+++ b/xls/codegen/module_signature.cc
@@ -0,0 +1,274 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/module_signature.h"
+
+#include "absl/container/flat_hash_set.h"
+#include "absl/status/status.h"
+#include "absl/strings/str_cat.h"
+#include "absl/strings/str_format.h"
+#include "absl/strings/str_join.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/ret_check.h"
+#include "xls/common/status/status_macros.h"
+#include "xls/ir/package.h"
+
+namespace xls {
+namespace verilog {
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithClock(
+ absl::string_view name) {
+ XLS_CHECK(!proto_.has_clock_name());
+ proto_.set_clock_name(ToProtoString(name));
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithReset(
+ absl::string_view name, bool asynchronous, bool active_low) {
+ XLS_CHECK(!proto_.has_reset());
+ ResetProto* reset = proto_.mutable_reset();
+ reset->set_name(ToProtoString(name));
+ reset->set_asynchronous(asynchronous);
+ reset->set_active_low(active_low);
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithReadyValidInterface(
+ absl::string_view input_ready, absl::string_view input_valid,
+ absl::string_view output_ready, absl::string_view output_valid) {
+ XLS_CHECK_EQ(proto_.interface_oneof_case(),
+ ModuleSignatureProto::INTERFACE_ONEOF_NOT_SET);
+ ReadyValidInterface* interface = proto_.mutable_ready_valid();
+ interface->set_input_ready(ToProtoString(input_ready));
+ interface->set_input_valid(ToProtoString(input_valid));
+ interface->set_output_ready(ToProtoString(output_ready));
+ interface->set_output_valid(ToProtoString(output_valid));
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithFixedLatencyInterface(
+ int64 latency) {
+ XLS_CHECK_EQ(proto_.interface_oneof_case(),
+ ModuleSignatureProto::INTERFACE_ONEOF_NOT_SET);
+ FixedLatencyInterface* interface = proto_.mutable_fixed_latency();
+ interface->set_latency(latency);
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithCombinationalInterface() {
+ XLS_CHECK_EQ(proto_.interface_oneof_case(),
+ ModuleSignatureProto::INTERFACE_ONEOF_NOT_SET);
+ proto_.mutable_combinational();
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithPipelineInterface(
+ int64 latency, int64 initiation_interval,
+ absl::optional pipeline_control) {
+ XLS_CHECK_EQ(proto_.interface_oneof_case(),
+ ModuleSignatureProto::INTERFACE_ONEOF_NOT_SET);
+ PipelineInterface* interface = proto_.mutable_pipeline();
+ interface->set_latency(latency);
+ interface->set_initiation_interval(initiation_interval);
+ if (pipeline_control.has_value()) {
+ *interface->mutable_pipeline_control() = *pipeline_control;
+ }
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::WithFunctionType(
+ FunctionType* function_type) {
+ XLS_CHECK(!proto_.has_function_type());
+ *proto_.mutable_function_type() = function_type->ToProto();
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::AddDataInput(
+ absl::string_view name, int64 width) {
+ PortProto* port = proto_.add_data_ports();
+ port->set_direction(DIRECTION_INPUT);
+ port->set_name(ToProtoString(name));
+ port->set_width(width);
+ return *this;
+}
+
+ModuleSignatureBuilder& ModuleSignatureBuilder::AddDataOutput(
+ absl::string_view name, int64 width) {
+ PortProto* port = proto_.add_data_ports();
+ port->set_direction(DIRECTION_OUTPUT);
+ port->set_name(ToProtoString(name));
+ port->set_width(width);
+ return *this;
+}
+
+xabsl::StatusOr ModuleSignatureBuilder::Build() {
+ return ModuleSignature::FromProto(proto_);
+}
+
+/*static*/ xabsl::StatusOr ModuleSignature::FromProto(
+ const ModuleSignatureProto& proto) {
+ // TODO(meheff): do more validation here.
+ // Validate widths/number of function type.
+ if ((proto.has_pipeline() || proto.has_ready_valid()) &&
+ !proto.has_clock_name()) {
+ return absl::InvalidArgumentError("Missing clock signal");
+ }
+
+ ModuleSignature signature;
+ signature.proto_ = proto;
+ for (const PortProto& port : proto.data_ports()) {
+ if (port.direction() == DIRECTION_INPUT) {
+ signature.data_inputs_.push_back(port);
+ } else if (port.direction() == DIRECTION_OUTPUT) {
+ signature.data_outputs_.push_back(port);
+ } else {
+ return absl::InvalidArgumentError("Invalid port direction.");
+ }
+ }
+ return signature;
+}
+
+int64 ModuleSignature::TotalDataInputBits() const {
+ int64 total = 0;
+ for (const PortProto& port : data_inputs()) {
+ total += port.width();
+ }
+ return total;
+}
+
+int64 ModuleSignature::TotalDataOutputBits() const {
+ int64 total = 0;
+ for (const PortProto& port : data_outputs()) {
+ total += port.width();
+ }
+ return total;
+}
+
+// Checks that the given inputs match one-to-one to the input ports (matched by
+// name). Returns a vector containing the inputs in the same order as the input
+// ports.
+template
+static xabsl::StatusOr> CheckAndReturnOrderedInputs(
+ absl::Span input_ports,
+ const absl::flat_hash_map& inputs) {
+ absl::flat_hash_set port_names;
+ std::vector ordered_inputs;
+ for (const PortProto& port : input_ports) {
+ port_names.insert(port.name());
+
+ if (!inputs.contains(port.name())) {
+ return absl::InvalidArgumentError(absl::StrFormat(
+ "Input '%s' was not passed as an argument.", port.name()));
+ }
+ ordered_inputs.push_back(&inputs.at(port.name()));
+ }
+
+ // Verify every passed in input is accounted for.
+ for (const auto& pair : inputs) {
+ if (!port_names.contains(pair.first)) {
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Unexpected input value named '%s'.", pair.first));
+ }
+ }
+ return ordered_inputs;
+}
+
+absl::Status ModuleSignature::ValidateInputs(
+ const absl::flat_hash_map& input_bits) const {
+ XLS_ASSIGN_OR_RETURN(std::vector ordered_inputs,
+ CheckAndReturnOrderedInputs(data_inputs(), input_bits));
+ for (int64 i = 0; i < ordered_inputs.size(); ++i) {
+ const PortProto& port = data_inputs()[i];
+ const Bits* input = ordered_inputs[i];
+ if (port.width() != input->bit_count()) {
+ return absl::InvalidArgumentError(
+ absl::StrFormat("Expected input '%s' to have width %d, has width %d",
+ port.name(), port.width(), input->bit_count()));
+ }
+ }
+ return absl::OkStatus();
+}
+
+static std::string TypeProtoToString(const TypeProto& proto) {
+ // Create a dummy package for creating Type*'s from a proto.
+ // TODO(meheff): Find a better way to manage types. We need types disconnected
+ // from any IR package.
+ Package p("dummy_package");
+ auto type_status = p.GetTypeFromProto(proto);
+ if (!type_status.ok()) {
+ return "";
+ }
+ return type_status.value()->ToString();
+}
+
+static xabsl::StatusOr TypeProtosEqual(const TypeProto& a,
+ const TypeProto& b) {
+ // Create a dummy package for creating Type*'s from a proto.
+ // TODO(meheff): Find a better way to manage types. We need types disconnected
+ // from any IR package.
+ Package p("dummy_package");
+ XLS_ASSIGN_OR_RETURN(Type * a_type, p.GetTypeFromProto(a));
+ XLS_ASSIGN_OR_RETURN(Type * b_type, p.GetTypeFromProto(b));
+ return a_type == b_type;
+}
+
+absl::Status ModuleSignature::ValidateInputs(
+ const absl::flat_hash_map& input_values) const {
+ if (!proto().has_function_type()) {
+ return absl::InvalidArgumentError(
+ "Cannot validate Value inputs because signature has no function_type "
+ "field");
+ }
+ XLS_ASSIGN_OR_RETURN(
+ std::vector ordered_inputs,
+ CheckAndReturnOrderedInputs(data_inputs(), input_values));
+ XLS_RET_CHECK_EQ(data_inputs().size(),
+ proto().function_type().parameters_size());
+ for (int64 i = 0; i < ordered_inputs.size(); ++i) {
+ const Value* input = ordered_inputs[i];
+ const TypeProto& expected_type_proto =
+ proto().function_type().parameters(i);
+ XLS_ASSIGN_OR_RETURN(TypeProto value_type_proto, input->TypeAsProto());
+ XLS_ASSIGN_OR_RETURN(bool types_equal, TypeProtosEqual(expected_type_proto,
+ value_type_proto));
+ if (!types_equal) {
+ return absl::InvalidArgumentError(absl::StrFormat(
+ "Input value '%s' is wrong type. Expected '%s', got '%s'",
+ data_inputs()[i].name(), TypeProtoToString(expected_type_proto),
+ TypeProtoToString(value_type_proto)));
+ }
+ }
+ return absl::OkStatus();
+}
+
+xabsl::StatusOr>
+ModuleSignature::ToKwargs(absl::Span inputs) const {
+ if (inputs.size() != data_inputs().size()) {
+ return absl::InvalidArgumentError(absl::StrFormat(
+ "Expected %d arguments, got %d.", data_inputs().size(), inputs.size()));
+ }
+ absl::flat_hash_map kwargs;
+ for (int64 i = 0; i < data_inputs().size(); ++i) {
+ kwargs[data_inputs()[i].name()] = inputs[i];
+ }
+ return kwargs;
+}
+
+std::ostream& operator<<(std::ostream& os, const ModuleSignature& signature) {
+ os << signature.ToString();
+ return os;
+}
+
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/module_signature.h b/xls/codegen/module_signature.h
new file mode 100644
index 0000000000..bd765fd7d9
--- /dev/null
+++ b/xls/codegen/module_signature.h
@@ -0,0 +1,144 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef THIRD_PARTY_XLS_CODEGEN_MODULE_SIGNATURE_H_
+#define THIRD_PARTY_XLS_CODEGEN_MODULE_SIGNATURE_H_
+
+#include
+
+#include "absl/container/flat_hash_map.h"
+#include "absl/types/optional.h"
+#include "xls/codegen/module_signature.pb.h"
+#include "xls/codegen/vast.h"
+#include "xls/common/status/statusor.h"
+#include "xls/ir/type.h"
+#include "xls/ir/value.h"
+
+namespace xls {
+namespace verilog {
+
+class ModuleSignature;
+
+inline std::string ToProtoString(absl::string_view s) {
+ return std::string(s);
+}
+
+// A builder for constructing ModuleSignatures (descriptions of Verilog module
+// interfaces).
+class ModuleSignatureBuilder {
+ public:
+ explicit ModuleSignatureBuilder(absl::string_view module_name) {
+ proto_.set_module_name(ToProtoString(module_name));
+ }
+
+ // Sets the clock as having the given name.
+ ModuleSignatureBuilder& WithClock(absl::string_view name);
+
+ // Sets the reset signal as having the given name and properties.
+ ModuleSignatureBuilder& WithReset(absl::string_view name, bool asynchronous,
+ bool active_low);
+
+ // Defines the module interface as using ready/valid flow control with signals
+ // of the given names.
+ ModuleSignatureBuilder& WithReadyValidInterface(
+ absl::string_view input_ready, absl::string_view input_valid,
+ absl::string_view output_ready, absl::string_view output_valid);
+
+ // Defines the module interface as fixed latency.
+ ModuleSignatureBuilder& WithFixedLatencyInterface(int64 latency);
+
+ // Defines the module interface as pipelined with the given latency and
+ // initiation interval.
+ ModuleSignatureBuilder& WithPipelineInterface(
+ int64 latency, int64 initiation_interval,
+ absl::optional pipeline_control = absl::nullopt);
+
+ // Defines the module interface as purely combinational.
+ ModuleSignatureBuilder& WithCombinationalInterface();
+
+ // Sets the type of the function to the given string. The expected form is
+ // defined by xls::FunctionType::ToString.
+ ModuleSignatureBuilder& WithFunctionType(FunctionType* function_type);
+
+ // Add data input/outputs to the interface. Control signals such as the clock,
+ // reset, ready/valid signals, etc should not be added using these methods.
+ ModuleSignatureBuilder& AddDataInput(absl::string_view name, int64 width);
+ ModuleSignatureBuilder& AddDataOutput(absl::string_view name, int64 width);
+
+ xabsl::StatusOr Build();
+
+ private:
+ ModuleSignatureProto proto_;
+};
+
+// An abstraction describing the interface to a Verilog module. At the moment
+// this is a thin wrapper around a proto and most of the fields are accessed
+// directly through the proto (ModuleSignature::proto). However the class has
+// the benefit of invariant enforcement, convenience methods, and is a framework
+// to expand the interface.
+class ModuleSignature {
+ public:
+ static xabsl::StatusOr FromProto(
+ const ModuleSignatureProto& proto);
+
+ const std::string& module_name() const { return proto_.module_name(); }
+
+ const ModuleSignatureProto& proto() const { return proto_; }
+
+ // Returns the data inputs/outputs of module. This does not include clock,
+ // reset, etc. These ports necessarily exist in the proto as well but are
+ // duplicated here for convenience.
+ absl::Span data_inputs() const { return data_inputs_; }
+ absl::Span data_outputs() const { return data_outputs_; }
+
+ // Returns the total number of bits of the data input/outputs.
+ int64 TotalDataInputBits() const;
+ int64 TotalDataOutputBits() const;
+
+ std::string ToString() const { return proto_.DebugString(); }
+
+ // Verifies that the given data input Bits(Values) are exactly the expected
+ // set and of the appropriate type for the module.
+ absl::Status ValidateInputs(
+ const absl::flat_hash_map& input_bits) const;
+ absl::Status ValidateInputs(
+ const absl::flat_hash_map& input_values) const;
+
+ // Converts the ordered set of Value arguments to the module of the signature
+ // into an argument name-value map.
+ xabsl::StatusOr> ToKwargs(
+ absl::Span inputs) const;
+
+ private:
+ ModuleSignatureProto proto_;
+
+ // These ports also exist in the proto, but are duplicated here to enable the
+ // convenience methods data_inputs() and data_outputs().
+ std::vector data_inputs_;
+ std::vector data_outputs_;
+};
+
+// Abstraction gathering the Verilog text and module signature produced by the
+// generator.
+struct ModuleGeneratorResult {
+ std::string verilog_text;
+ ModuleSignature signature;
+};
+
+std::ostream& operator<<(std::ostream& os, const ModuleSignature& signature);
+
+} // namespace verilog
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_MODULE_SIGNATURE_H_
diff --git a/xls/codegen/module_signature.proto b/xls/codegen/module_signature.proto
new file mode 100644
index 0000000000..f802ad6724
--- /dev/null
+++ b/xls/codegen/module_signature.proto
@@ -0,0 +1,129 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+syntax = "proto2";
+
+package xls.verilog;
+
+import "xls/ir/xls_type.proto";
+
+enum DirectionProto {
+ DIRECTION_INVALID = 0;
+ DIRECTION_INPUT = 1;
+ DIRECTION_OUTPUT = 2;
+}
+
+message PortProto {
+ optional DirectionProto direction = 1;
+ optional string name = 2;
+ // The width of a port may be zero corresponding to zero-width XLS data types
+ // such as empty tuples. These zero-width PortPorts have no corresponding port
+ // in the Verilog module as Verilog does not support zero-width data
+ // types. However, having zero-width PortProtos maintains a one-to-one
+ // correspondence between ports in the signature and parameters in the XLS
+ // function.
+ optional int64 width = 3;
+}
+
+// Module produces its result in a fixed number of cycles without flow control.
+message FixedLatencyInterface {
+ // Latency (in number of cycles) to produce an output after being presented an
+ // input.
+ optional int64 latency = 1;
+}
+
+// Module uses ready/valid flow control on the input and output.
+message ReadyValidInterface {
+ // Port names for input and output ready/valid signaling.
+ optional string input_ready = 1;
+ optional string input_valid = 2;
+ optional string output_ready = 3;
+ optional string output_valid = 4;
+}
+
+// Describes a "valid" signal control scheme of pipeline registers. A single bit
+// "valid" input is added to the module. This signal should be asserted when the
+// data input ports(s) to the module are driven. The valid signal is passed
+// along the pipeline registers and serves as the load enable for the pipeline
+// registers.
+message ValidProto {
+ // Input valid signal name to use on the module interface. Required.
+ optional string input_name = 1;
+
+ // Name for the "valid" output that has been passed through the pipe stages;
+ // i.e. the input_name signal presented at cycle 0 shows up at output_name
+ // after L cycles with a pipeline of latency L. If not specified then the
+ // valid signal is not output from the module.
+ optional string output_name = 2;
+}
+
+// Proto describing manual control scheme of pipeline registers. With this
+// control scheme, the module includes an input with one bit per stage in the
+// pipeline. Bit N of this input controls the load-enable of the pipeline
+// registers of the N-th pipeline stage.
+message ManualPipelineControl {
+ optional string input_name = 1;
+}
+
+// Describes how the pipeline registers are controlled.
+message PipelineControl {
+ oneof interface_oneof {
+ ValidProto valid = 1;
+ ManualPipelineControl manual = 2;
+ }
+}
+
+// Module with a pipelined device function.
+message PipelineInterface {
+ optional int64 latency = 1;
+ optional int64 initiation_interval = 2;
+
+ // Describes how the pipeline registers are controlled (load enables). If not
+ // specified then the registers are loaded every cycle.
+ optional PipelineControl pipeline_control = 3;
+}
+
+// Module with purely combinational logic.
+message CombinationalInterface {}
+
+message ResetProto {
+ optional string name = 1;
+ optional bool asynchronous = 2;
+ optional bool active_low = 3;
+}
+
+message ModuleSignatureProto {
+ // Name of the module.
+ optional string module_name = 1;
+
+ // The data ports of the module. This does not include control ports such as
+ // clk, ready/valid, etc.
+ repeated PortProto data_ports = 2;
+
+ // Name of the clock port (if any).
+ optional string clock_name = 3;
+
+ // Describes the reset signal (if any).
+ optional ResetProto reset = 4;
+
+ oneof interface_oneof {
+ FixedLatencyInterface fixed_latency = 5;
+ ReadyValidInterface ready_valid = 6;
+ PipelineInterface pipeline = 7;
+ CombinationalInterface combinational = 8;
+ }
+
+ // The XLS function type that it generated a module for.
+ optional FunctionTypeProto function_type = 9;
+}
diff --git a/xls/codegen/module_signature_test.cc b/xls/codegen/module_signature_test.cc
new file mode 100644
index 0000000000..7a0d182a73
--- /dev/null
+++ b/xls/codegen/module_signature_test.cc
@@ -0,0 +1,130 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/module_signature.h"
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "xls/common/status/matchers.h"
+#include "xls/ir/bits.h"
+#include "xls/ir/value.h"
+
+namespace xls {
+namespace verilog {
+namespace {
+
+using status_testing::StatusIs;
+using ::testing::HasSubstr;
+
+std::string TestName() {
+ return ::testing::UnitTest::GetInstance()->current_test_info()->name();
+}
+
+TEST(ModuleSignatureTest, SimpledFixedLatencyInterface) {
+ ModuleSignatureBuilder b(TestName());
+
+ b.AddDataInput("x", 42).AddDataOutput("y", 2).WithFixedLatencyInterface(123);
+
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleSignature signature, b.Build());
+ ASSERT_EQ(signature.data_inputs().size(), 1);
+ EXPECT_EQ(signature.data_inputs().front().width(), 42);
+ EXPECT_EQ(signature.data_inputs().front().name(), "x");
+ EXPECT_EQ(signature.TotalDataInputBits(), 42);
+
+ ASSERT_EQ(signature.data_outputs().size(), 1);
+ EXPECT_EQ(signature.data_outputs().front().width(), 2);
+ EXPECT_EQ(signature.data_outputs().front().name(), "y");
+ EXPECT_EQ(signature.TotalDataOutputBits(), 2);
+
+ ASSERT_TRUE(signature.proto().has_fixed_latency());
+ EXPECT_EQ(signature.proto().fixed_latency().latency(), 123);
+}
+
+TEST(ModuleSignatureTest, ReadyValidInterface) {
+ ModuleSignatureBuilder b(TestName());
+
+ b.WithReadyValidInterface("input_rdy", "input_vld", "output_rdy",
+ "output_vld")
+ .WithClock("the_clk")
+ .WithReset("reset_me", /*asynchronous=*/true, /*active_low=*/false)
+ .AddDataInput("x", 42)
+ .AddDataInput("y", 2)
+ .AddDataInput("z", 44444)
+ .AddDataOutput("o1", 1)
+ .AddDataOutput("o2", 3);
+
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleSignature signature, b.Build());
+ ASSERT_TRUE(signature.proto().has_ready_valid());
+ EXPECT_EQ(signature.proto().ready_valid().input_ready(), "input_rdy");
+ EXPECT_EQ(signature.proto().ready_valid().input_valid(), "input_vld");
+ EXPECT_EQ(signature.proto().ready_valid().output_ready(), "output_rdy");
+ EXPECT_EQ(signature.proto().ready_valid().output_valid(), "output_vld");
+
+ EXPECT_EQ(signature.TotalDataInputBits(), 44488);
+ EXPECT_EQ(signature.TotalDataOutputBits(), 4);
+
+ EXPECT_EQ(signature.proto().clock_name(), "the_clk");
+ EXPECT_TRUE(signature.proto().has_reset());
+ EXPECT_EQ(signature.proto().reset().name(), "reset_me");
+ EXPECT_TRUE(signature.proto().reset().asynchronous());
+ EXPECT_FALSE(signature.proto().reset().active_low());
+
+ EXPECT_EQ(signature.data_inputs().size(), 3);
+ EXPECT_EQ(signature.data_outputs().size(), 2);
+}
+
+TEST(ModuleSignatureTest, PipelineInterface) {
+ ModuleSignatureBuilder b(TestName());
+
+ b.WithPipelineInterface(/*latency=*/2, /*initiation_interval=*/3)
+ .WithClock("clk")
+ .AddDataInput("in", 4)
+ .AddDataOutput("out", 5);
+
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleSignature signature, b.Build());
+ ASSERT_TRUE(signature.proto().has_pipeline());
+ EXPECT_EQ(signature.proto().pipeline().latency(), 2);
+ EXPECT_EQ(signature.proto().pipeline().initiation_interval(), 3);
+}
+
+TEST(ModuleSignatureTest, PipelineInterfaceMissingClock) {
+ ModuleSignatureBuilder b(TestName());
+
+ b.WithPipelineInterface(/*latency=*/2, /*initiation_interval=*/3)
+ .AddDataInput("in", 4)
+ .AddDataOutput("out", 5);
+
+ EXPECT_THAT(b.Build(), StatusIs(absl::StatusCode::kInvalidArgument,
+ HasSubstr("Missing clock")));
+}
+
+TEST(ModuleSignatureTest, ToKwargs) {
+ ModuleSignatureBuilder b(TestName());
+ b.AddDataInput("x", 42)
+ .AddDataInput("y", 2)
+ .AddDataOutput("z", 32)
+ .WithFixedLatencyInterface(123);
+ XLS_ASSERT_OK_AND_ASSIGN(ModuleSignature signature, b.Build());
+
+ absl::flat_hash_map kwargs;
+ XLS_ASSERT_OK_AND_ASSIGN(
+ kwargs, signature.ToKwargs({Value(UBits(7, 42)), Value(UBits(0, 2))}));
+ EXPECT_THAT(kwargs, testing::UnorderedElementsAre(
+ testing::Pair("x", Value(UBits(7, 42))),
+ testing::Pair("y", Value(UBits(0, 2)))));
+}
+
+} // namespace
+} // namespace verilog
+} // namespace xls
diff --git a/xls/codegen/name_to_bit_count.h b/xls/codegen/name_to_bit_count.h
new file mode 100644
index 0000000000..ab16317a31
--- /dev/null
+++ b/xls/codegen/name_to_bit_count.h
@@ -0,0 +1,37 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Helpful typedefs for common mappings that resolve names into bit-values or
+// bit-counts.
+//
+// Note that these types are unordered, so stabilizing sorts must be performed
+// on their keys if reproducible traversals are required.
+
+#ifndef THIRD_PARTY_XLS_CODEGEN_NAME_TO_BIT_COUNT_H_
+#define THIRD_PARTY_XLS_CODEGEN_NAME_TO_BIT_COUNT_H_
+
+#include "absl/container/flat_hash_map.h"
+#include "absl/strings/string_view.h"
+#include "xls/common/integral_types.h"
+#include "xls/ir/bits.h"
+#include "xls/ir/type.h"
+
+namespace xls {
+
+using NameToBitCount = absl::flat_hash_map;
+using NameToBits = absl::flat_hash_map;
+
+} // namespace xls
+
+#endif // THIRD_PARTY_XLS_CODEGEN_NAME_TO_BIT_COUNT_H_
diff --git a/xls/codegen/node_expressions.cc b/xls/codegen/node_expressions.cc
new file mode 100644
index 0000000000..76c8434ea5
--- /dev/null
+++ b/xls/codegen/node_expressions.cc
@@ -0,0 +1,571 @@
+// Copyright 2020 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include "xls/codegen/node_expressions.h"
+
+#include "absl/status/status.h"
+#include "absl/strings/str_format.h"
+#include "xls/codegen/flattening.h"
+#include "xls/common/logging/logging.h"
+#include "xls/common/status/ret_check.h"
+#include "xls/common/status/status_macros.h"
+#include "xls/ir/nodes.h"
+#include "xls/ir/type.h"
+
+namespace xls {
+namespace verilog {
+
+bool OperandMustBeNamedReference(Node* node, int64 operand_no) {
+ // Returns true if the emitted expression for the specified operand is
+ // necessarily indexable. Generally, if the expression emitted for a node is
+ // an indexing operation and the operand is emitted as an indexable expression
+ // then there is no need to make the operand a declared expression because
+ // indexing/slicing can be chained.
+ //
+ // For example a kArrayIndex of a kArrayIndex can be emitted as a chained VAST
+ // Index expression like so:
+ //
+ // reg [42:0] foo = bar[42][7]
+ //
+ // In this case, no need to make bar[42] a named temporary.
+ auto operand_is_indexable = [&]() {
+ switch (node->operand(operand_no)->op()) {
+ case Op::kArrayIndex:
+ case Op::kParam:
+ // These operations are emitted as VAST Index operations which
+ // can be indexed.
+ return true;
+ default:
+ return false;
+ }
+ };
+ switch (node->op()) {
+ case Op::kBitSlice:
+ XLS_CHECK_EQ(operand_no, 0);
+ return !operand_is_indexable();
+ case Op::kArrayIndex:
+ return operand_no == 0 && !operand_is_indexable();
+ case Op::kOneHot:
+ case Op::kOneHotSel:
+ return operand_no == 0 && !operand_is_indexable();
+ case Op::kTupleIndex:
+ // Tuples are represented as flat vectors and kTupleIndex operation is a
+ // slice out of the flat vector. The exception is if the element is an
+ // Array. In this case, the element must be unflattened into an unpacked
+ // array which requires that it be a named reference.
+ return node->GetType()->IsArray() || !operand_is_indexable();
+ case Op::kShra:
+ // Shra indexes the sign bit of the zero-th operand.
+ return operand_no == 0;
+ case Op::kSignExt:
+ // For operands wider than one bit, sign extend slices out the sign bit of
+ // the operand so its operand needs to be a reference.
+ // TODO(meheff): It might be better to have a unified place to hold both
+ // the Verilog expression and constraints for the Ops, a la
+ // op_specification.py
+ XLS_CHECK_EQ(operand_no, 0);
+ return node->operand(operand_no)->BitCountOrDie() > 1 &&
+ !operand_is_indexable();
+ case Op::kEncode:
+ // The expression of the encode operation indexes individual bits of the
+ // operand.
+ return true;
+ case Op::kReverse:
+ return true;
+ default:
+ return false;
+ }
+}
+
+namespace {
+
+// Returns given Value as a VAST Literal created in the given file. must_flatten
+// indicates if the value must be emitted as a flat bit vector. This argument is
+// used when invoked recursively for when a tuple includes nested array
+// elements. In this case, the nested array elements must be flattened rather
+// than emitted as an unpacked array.
+Expression* ValueToVastLiteral(const Value& value, VerilogFile* file,
+ bool must_flatten = false) {
+ if (value.IsBits()) {
+ return file->Literal(value.bits());
+ } else if (value.IsTuple()) {
+ std::vector