Skip to content

Commit 19803c6

Browse files
committed
mimxrt10xx: Add info on clock config source
1 parent ff6d9d8 commit 19803c6

File tree

2 files changed

+4
-20
lines changed

2 files changed

+4
-20
lines changed

ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -66,16 +66,6 @@
6666
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
6767
#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
6868

69-
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
70-
*/
71-
//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
72-
/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
73-
*/
74-
//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
75-
/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
76-
*/
77-
//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
78-
7969
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
8070
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
8171
.numerator = 0, /* 30 bit numerator of fractional loop divider */
@@ -90,6 +80,8 @@ const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = {
9080
.enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */
9181
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
9282
};
83+
84+
// Based on the hello_world example in the SDK
9385
void clocks_init(void) {
9486
/* Init RTC OSC clock frequency. */
9587
CLOCK_SetRtcXtalFreq(32768U);

ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -33,16 +33,6 @@
3333
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
3434
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */
3535

36-
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
37-
*/
38-
//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
39-
/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
40-
*/
41-
//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
42-
/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
43-
*/
44-
//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
45-
4636
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
4737
{
4838
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
@@ -60,6 +50,8 @@ const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
6050
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
6151
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
6252
};
53+
54+
// Based on the hello_world example in the SDK
6355
void clocks_init(void) {
6456
/* Init RTC OSC clock frequency. */
6557
CLOCK_SetRtcXtalFreq(32768U);

0 commit comments

Comments
 (0)