Designing a system that acts as a low-pass filter in Verilog.
- Filter Design & Analysis Tool (
FDATool
) inMATLAB 2023a
. Xilinx Vivado v2020.1
for designing and synthesizing the system.
To obtain the filter coefficients, MATLAB's FDATool was used. These were the design parameters:
Along with this, I applied some other preprocessing steps before using these values;
- Replace all negative values with zeros.
- Scale all numbers by a factor of
255
. This number was chosen because all coefficients had to be represented in 8 bits according to the specifications - Round all numbers to the nearest integer.
To apply the filter, the input signal was simply shifted after every multiplication and accumulation operation.
The input signals for this task were obtained from the output of a Direct Digital Synthesizer.
The input signals along with their filtered output are shown below. According to the parameters, all frequencies below 50KHz should be allowed to pass, and all frequencies above 110Khz should be completely blocked.
For 10KHz:
For 40Khz:
For 125Khz:
For 250Khz:
Contributions: All of the code in this repository is written by Samiya Ali Zaidi.