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Merge pull request #1969 from sayantn/fix-kadd
use `wrapping_add` for `_kadd` intrinsics
2 parents 7fb504f + c9e9b01 commit 16826ee

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crates/core_arch/src/x86/avx512bw.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10254,7 +10254,7 @@ pub fn _cvtu32_mask32(a: u32) -> __mmask32 {
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#[target_feature(enable = "avx512bw")]
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#[stable(feature = "stdarch_x86_avx512", since = "1.89")]
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pub fn _kadd_mask32(a: __mmask32, b: __mmask32) -> __mmask32 {
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a + b
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a.wrapping_add(b)
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}
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1026010260
/// Add 64-bit masks in a and b, and store the result in k.
@@ -10264,7 +10264,7 @@ pub fn _kadd_mask32(a: __mmask32, b: __mmask32) -> __mmask32 {
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#[target_feature(enable = "avx512bw")]
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#[stable(feature = "stdarch_x86_avx512", since = "1.89")]
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pub fn _kadd_mask64(a: __mmask64, b: __mmask64) -> __mmask64 {
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a + b
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a.wrapping_add(b)
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}
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/// Compute the bitwise AND of 32-bit masks a and b, and store the result in k.

crates/core_arch/src/x86/avx512dq.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4486,7 +4486,7 @@ pub fn _cvtu32_mask8(a: u32) -> __mmask8 {
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#[target_feature(enable = "avx512dq")]
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#[stable(feature = "stdarch_x86_avx512", since = "1.89")]
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pub fn _kadd_mask16(a: __mmask16, b: __mmask16) -> __mmask16 {
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a + b
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a.wrapping_add(b)
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}
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44924492
/// Add 8-bit masks a and b, and store the result in dst.
@@ -4496,7 +4496,7 @@ pub fn _kadd_mask16(a: __mmask16, b: __mmask16) -> __mmask16 {
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#[target_feature(enable = "avx512dq")]
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#[stable(feature = "stdarch_x86_avx512", since = "1.89")]
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pub fn _kadd_mask8(a: __mmask8, b: __mmask8) -> __mmask8 {
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a + b
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a.wrapping_add(b)
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}
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45024502
/// Bitwise AND of 8-bit masks a and b, and store the result in dst.

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