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AmanieuAmanieu
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Stabilize AArch64 AES/SHA1/SHA2 intrinsics
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‎crates/core_arch/src/arm_shared/crypto.rs

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,10 @@ use stdarch_test::assert_instr;
5858
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "aes"))]
5959
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
6060
#[cfg_attr(test, assert_instr(aese))]
61+
#[cfg_attr(
62+
not(target_arch = "arm"),
63+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
64+
)]
6165
pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
6266
vaeseq_u8_(data, key)
6367
}
@@ -69,6 +73,10 @@ pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
6973
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "aes"))]
7074
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
7175
#[cfg_attr(test, assert_instr(aesd))]
76+
#[cfg_attr(
77+
not(target_arch = "arm"),
78+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
79+
)]
7280
pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
7381
vaesdq_u8_(data, key)
7482
}
@@ -80,6 +88,10 @@ pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
8088
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "aes"))]
8189
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
8290
#[cfg_attr(test, assert_instr(aesmc))]
91+
#[cfg_attr(
92+
not(target_arch = "arm"),
93+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
94+
)]
8395
pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
8496
vaesmcq_u8_(data)
8597
}
@@ -91,6 +103,10 @@ pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
91103
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "aes"))]
92104
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
93105
#[cfg_attr(test, assert_instr(aesimc))]
106+
#[cfg_attr(
107+
not(target_arch = "arm"),
108+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
109+
)]
94110
pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
95111
vaesimcq_u8_(data)
96112
}
@@ -102,6 +118,10 @@ pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
102118
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
103119
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
104120
#[cfg_attr(test, assert_instr(sha1h))]
121+
#[cfg_attr(
122+
not(target_arch = "arm"),
123+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
124+
)]
105125
pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 {
106126
vsha1h_u32_(hash_e)
107127
}
@@ -113,6 +133,10 @@ pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 {
113133
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
114134
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
115135
#[cfg_attr(test, assert_instr(sha1c))]
136+
#[cfg_attr(
137+
not(target_arch = "arm"),
138+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
139+
)]
116140
pub unsafe fn vsha1cq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
117141
vsha1cq_u32_(hash_abcd, hash_e, wk)
118142
}
@@ -124,6 +148,10 @@ pub unsafe fn vsha1cq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
124148
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
125149
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
126150
#[cfg_attr(test, assert_instr(sha1m))]
151+
#[cfg_attr(
152+
not(target_arch = "arm"),
153+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
154+
)]
127155
pub unsafe fn vsha1mq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
128156
vsha1mq_u32_(hash_abcd, hash_e, wk)
129157
}
@@ -135,6 +163,10 @@ pub unsafe fn vsha1mq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
135163
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
136164
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
137165
#[cfg_attr(test, assert_instr(sha1p))]
166+
#[cfg_attr(
167+
not(target_arch = "arm"),
168+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
169+
)]
138170
pub unsafe fn vsha1pq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
139171
vsha1pq_u32_(hash_abcd, hash_e, wk)
140172
}
@@ -146,6 +178,10 @@ pub unsafe fn vsha1pq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
146178
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
147179
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
148180
#[cfg_attr(test, assert_instr(sha1su0))]
181+
#[cfg_attr(
182+
not(target_arch = "arm"),
183+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
184+
)]
149185
pub unsafe fn vsha1su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t) -> uint32x4_t {
150186
vsha1su0q_u32_(w0_3, w4_7, w8_11)
151187
}
@@ -157,6 +193,10 @@ pub unsafe fn vsha1su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_
157193
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
158194
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
159195
#[cfg_attr(test, assert_instr(sha1su1))]
196+
#[cfg_attr(
197+
not(target_arch = "arm"),
198+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
199+
)]
160200
pub unsafe fn vsha1su1q_u32(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t {
161201
vsha1su1q_u32_(tw0_3, w12_15)
162202
}
@@ -168,6 +208,10 @@ pub unsafe fn vsha1su1q_u32(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t
168208
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
169209
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
170210
#[cfg_attr(test, assert_instr(sha256h))]
211+
#[cfg_attr(
212+
not(target_arch = "arm"),
213+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
214+
)]
171215
pub unsafe fn vsha256hq_u32(
172216
hash_abcd: uint32x4_t,
173217
hash_efgh: uint32x4_t,
@@ -183,6 +227,10 @@ pub unsafe fn vsha256hq_u32(
183227
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
184228
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
185229
#[cfg_attr(test, assert_instr(sha256h2))]
230+
#[cfg_attr(
231+
not(target_arch = "arm"),
232+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
233+
)]
186234
pub unsafe fn vsha256h2q_u32(
187235
hash_efgh: uint32x4_t,
188236
hash_abcd: uint32x4_t,
@@ -198,6 +246,10 @@ pub unsafe fn vsha256h2q_u32(
198246
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
199247
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
200248
#[cfg_attr(test, assert_instr(sha256su0))]
249+
#[cfg_attr(
250+
not(target_arch = "arm"),
251+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
252+
)]
201253
pub unsafe fn vsha256su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t {
202254
vsha256su0q_u32_(w0_3, w4_7)
203255
}
@@ -209,6 +261,10 @@ pub unsafe fn vsha256su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t
209261
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "sha2"))]
210262
#[cfg_attr(target_arch = "arm", target_feature(enable = "crypto,v8"))]
211263
#[cfg_attr(test, assert_instr(sha256su1))]
264+
#[cfg_attr(
265+
not(target_arch = "arm"),
266+
stable(feature = "neon_intrinsics", since = "CURRENT_RUSTC_VERSION")
267+
)]
212268
pub unsafe fn vsha256su1q_u32(
213269
tw0_3: uint32x4_t,
214270
w8_11: uint32x4_t,

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