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compiler: Make c_int_width an integer #142352

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Jun 12, 2025
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8 changes: 4 additions & 4 deletions compiler/rustc_codegen_ssa/src/traits/type_.rs
Original file line number Diff line number Diff line change
Expand Up @@ -44,10 +44,10 @@ pub trait DerivedTypeCodegenMethods<'tcx>:
BaseTypeCodegenMethods + MiscCodegenMethods<'tcx> + HasTyCtxt<'tcx> + HasTypingEnv<'tcx>
{
fn type_int(&self) -> Self::Type {
match &self.sess().target.c_int_width[..] {
"16" => self.type_i16(),
"32" => self.type_i32(),
"64" => self.type_i64(),
match &self.sess().target.c_int_width {
16 => self.type_i16(),
32 => self.type_i32(),
64 => self.type_i64(),
width => bug!("Unsupported c_int_width: {}", width),
}
}
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/base/xtensa.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ pub(crate) fn opts() -> TargetOptions {
TargetOptions {
os: "none".into(),
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
executables: true,
panic_strategy: PanicStrategy::Abort,
Expand Down
8 changes: 7 additions & 1 deletion compiler/rustc_target/src/spec/json.rs
Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,12 @@ impl Target {
base.$key_name = s;
}
} );
($key_name:ident = $json_name:expr, u64 as $int_ty:ty) => ( {
let name = $json_name;
if let Some(s) = obj.remove(name).and_then(|b| b.as_u64()) {
base.$key_name = s as $int_ty;
}
} );
($key_name:ident, bool) => ( {
let name = (stringify!($key_name)).replace("_", "-");
if let Some(s) = obj.remove(&name).and_then(|b| b.as_bool()) {
Expand Down Expand Up @@ -554,7 +560,7 @@ impl Target {
}
}

key!(c_int_width = "target-c-int-width");
key!(c_int_width = "target-c-int-width", u64 as u16);
key!(c_enum_min_bits, Option<u64>); // if None, matches c_int_width
key!(os);
key!(env);
Expand Down
20 changes: 6 additions & 14 deletions compiler/rustc_target/src/spec/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2213,18 +2213,10 @@ impl Target {
});
}

dl.c_enum_min_size = self
.c_enum_min_bits
.map_or_else(
|| {
self.c_int_width
.parse()
.map_err(|_| String::from("failed to parse c_int_width"))
},
Ok,
)
.and_then(|i| Integer::from_size(Size::from_bits(i)))
.map_err(|err| TargetDataLayoutErrors::InvalidBitsSize { err })?;
dl.c_enum_min_size = Integer::from_size(Size::from_bits(
self.c_enum_min_bits.unwrap_or(self.c_int_width as _),
))
.map_err(|err| TargetDataLayoutErrors::InvalidBitsSize { err })?;

Ok(dl)
}
Expand Down Expand Up @@ -2286,7 +2278,7 @@ pub struct TargetOptions {
/// Used as the `target_endian` `cfg` variable. Defaults to little endian.
pub endian: Endian,
/// Width of c_int type. Defaults to "32".
pub c_int_width: StaticCow<str>,
pub c_int_width: u16,
/// OS name to use for conditional compilation (`target_os`). Defaults to "none".
/// "none" implies a bare metal target without `std` library.
/// A couple of targets having `std` also use "unknown" as an `os` value,
Expand Down Expand Up @@ -2783,7 +2775,7 @@ impl Default for TargetOptions {
fn default() -> TargetOptions {
TargetOptions {
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
os: "none".into(),
env: "".into(),
abi: "".into(),
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
os: "vita".into(),
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
env: "newlib".into(),
vendor: "sony".into(),
abi: "eabihf".into(),
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/targets/avr_none.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
llvm_target: "avr-unknown-unknown".into(),
pointer_width: 16,
options: TargetOptions {
c_int_width: "16".into(),
c_int_width: 16,
exe_suffix: ".elf".into(),
linker: Some("avr-gcc".into()),
eh_frame_header: false,
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/targets/msp430_none_elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
arch: "msp430".into(),

options: TargetOptions {
c_int_width: "16".into(),
c_int_width: 16,

// The LLVM backend currently can't generate object files. To
// workaround this LLVM generates assembly files which then we feed
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {

options: TargetOptions {
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
families: cvs!["unix"],
os: "espidf".into(),
env: "newlib".into(),
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {

options: TargetOptions {
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
families: cvs!["unix"],
os: "espidf".into(),
env: "newlib".into(),
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {

options: TargetOptions {
endian: Endian::Little,
c_int_width: "32".into(),
c_int_width: 32,
families: cvs!["unix"],
os: "espidf".into(),
env: "newlib".into(),
Expand Down
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