Remove `avx512dq` and `avx512vl` implication for `avx512fp16` #140389

sayantn · 2025-04-28T11:34:47Z

According to Intel, avx512fp16 requires only avx512bw, but LLVM also enables avx512vl and avx512dq when avx512fp16 is active. This is relic code, and will be fixed in LLVM soon. We should remove this from Rust too asap, especially before the stabilization of AVX512

Update: the LLVM fix has been merged

cc @rust-lang/wg-llvm will it be possible to update the rustc llvm version to something after llvm/llvm-project#137450

rustbot · 2025-04-28T11:34:56Z

⚠️ Warning ⚠️

Some commits in this PR modify submodules.

sayantn · 2025-04-28T13:06:16Z

cc @a4lg there seems to be some doc errors in the is_riscv_feature_detected macro. Could you look into the pls.

PS: I am quite confused how they weren't caught in the stdarch CI

sayantn · 2025-04-28T13:20:36Z

On hindsight, this seems like a bug in rustdoc with cg_gcc. Still I am retrying the CI

cc @rust-lang/rustdoc @rust-lang/wg-gcc-backend

edit: not spurious

a4lg · 2025-04-29T02:47:39Z

@sayantn
That's odd.

It seems the Linkcheck tool on the CI does its own job and the error itself seems valid.

However, multiple references to a single footnote is mandatory for simplicity of the new macro documentation with the platform guide.
And I thought this is allowed. While duplicate ID for footnote references is not ideal (of course) but at least tested in tests/rustdoc/footnote-reference-in-footnote-def.rs which has two duplicate IDs on footnote references to [^a].
So I suppose this is a rustdoc bug to be fixed (give each reference to a footnote unique ID as a long term solution).

If you prefer the short term solution to pass CI, you may revert rust-lang/stdarch#1779.

.gitmodules

a4lg · 2025-04-29T07:17:59Z

I created a rustdoc PR #140434 (implementing it was easier than I thought) to enable adopting rust-lang/stdarch#1779 in the future. I'm not sure whether adoption of this PR will result in immediate success (considering the default stage for building docs (stage 0), it might not be immediate) but I hope this is accepted.

a4lg · 2025-04-30T05:32:13Z

I opened a PR rust-lang/stdarch#1792 that will revert rust-lang/stdarch#1779 for now. If this PR is applied, stdarch should be safely merged into the master branch.

Even if #140434 is merged now, because the CI failure says this is caused by the stage0 compiler, we have to wait the next beta to merge rust-lang/stdarch#1779.

sayantn · 2025-04-30T16:37:52Z

Will the recent changes to the bootstrapping process help this? I am talking about #119899

sayantn · 2025-05-01T00:17:46Z

I am trying this out with rust-lang/stdarch#1792

a4lg · 2025-05-01T01:59:25Z

I'm glad to see that this change is working! (I miss carefully designed tables and guides though)

sayantn · 2025-05-01T06:02:13Z

Nice, I will ask someone to start a try job to further make sure nothing is breaking

update: try runs are not needed, as most tests are already done. we don't need to do crater runs because this is (still) unstable

I'm glad to see that this change is working! (I miss carefully designed tables and guides though)

We can re-update stdarch with your PR after the Rustdoc fix is merged, and do another stdarch update. In the meantime, could you re-open that PR so that we don't forget about it? Thanks

a4lg · 2025-05-01T15:32:18Z

@sayantn I filed a new issue on stdarch instead (rust-lang/stdarch#1793).
This is because merged PR cannot be reopened and re-opening closed PR requires effectively substituting everything in the PR.

Amanieu · 2025-05-01T15:53:33Z

@bors r+ rollup=iffy

bors · 2025-05-01T15:53:36Z

📌 Commit 7443d03 has been approved by Amanieu

It is now in the queue for this repository.

Remove `avx512dq` and `avx512vl` implication for `avx512fp16` According to Intel, `avx512fp16` requires only `avx512bw`, but LLVM also enables `avx512vl` and `avx512dq` when `avx512fp16` is active. This is relic code, and will be fixed in LLVM soon. We should remove this from Rust too asap, especially before the stabilization of AVX512 Related: - llvm/llvm-project#136209 - rust-lang#138940 - rust-lang/stdarch#1781 - rust-lang#111137 `@rustbot` label O-x86_64 O-x86_32 A-SIMD A-target-feature T-compiler -T-libs r? `@Amanieu` **Update: the LLVM fix has been merged** cc `@rust-lang/wg-llvm` will it be possible to update the rustc llvm version to something after llvm/llvm-project#137450

Rollup of 12 pull requests Successful merges: - rust-lang#134034 (handle paren in macro expand for let-init-else expr) - rust-lang#137474 (pretty-print: Print shebang at the top of the output) - rust-lang#138872 (rustc_target: RISC-V `Zfinx` is incompatible with `{ILP32,LP64}[FD]` ABIs) - rust-lang#139046 (Improve `Lifetime::suggestion`) - rust-lang#139206 (std: use the address of `errno` to identify threads in `unique_thread_exit`) - rust-lang#139608 (Clarify `async` block behaviour) - rust-lang#139847 (Delegate to inner `vec::IntoIter` from `env::ArgsOs`) - rust-lang#140159 (Avoid redundant WTF-8 checks in `PathBuf`) - rust-lang#140197 (Document breaking out of a named code block) - rust-lang#140389 (Remove `avx512dq` and `avx512vl` implication for `avx512fp16`) - rust-lang#140430 (Improve test coverage of HIR pretty printing.) - rust-lang#140507 (rustc_target: RISC-V: feature addition batch 3) r? `@ghost` `@rustbot` modify labels: rollup

Rollup merge of rust-lang#140389 - sayantn:avx512fp16, r=Amanieu Remove `avx512dq` and `avx512vl` implication for `avx512fp16` According to Intel, `avx512fp16` requires only `avx512bw`, but LLVM also enables `avx512vl` and `avx512dq` when `avx512fp16` is active. This is relic code, and will be fixed in LLVM soon. We should remove this from Rust too asap, especially before the stabilization of AVX512 Related: - llvm/llvm-project#136209 - rust-lang#138940 - rust-lang/stdarch#1781 - rust-lang#111137 ``@rustbot`` label O-x86_64 O-x86_32 A-SIMD A-target-feature T-compiler -T-libs r? ``@Amanieu`` **Update: the LLVM fix has been merged** cc ``@rust-lang/wg-llvm`` will it be possible to update the rustc llvm version to something after llvm/llvm-project#137450

bors · 2025-05-02T17:34:42Z

⌛ Testing commit 7443d03 with merge 7c96085...

Remove `avx512dq` and `avx512vl` implication for `avx512fp16` According to Intel, `avx512fp16` requires only `avx512bw`, but LLVM also enables `avx512vl` and `avx512dq` when `avx512fp16` is active. This is relic code, and will be fixed in LLVM soon. We should remove this from Rust too asap, especially before the stabilization of AVX512 Related: - llvm/llvm-project#136209 - rust-lang#138940 - rust-lang/stdarch#1781 - rust-lang#111137 ``@rustbot`` label O-x86_64 O-x86_32 A-SIMD A-target-feature T-compiler -T-libs r? ``@Amanieu`` **Update: the LLVM fix has been merged** cc ``@rust-lang/wg-llvm`` will it be possible to update the rustc llvm version to something after llvm/llvm-project#137450

rustbot assigned Amanieu Apr 28, 2025

rustbot removed the T-libs Relevant to the library team, which will review and decide on the PR/issue. label Apr 28, 2025

sayantn mentioned this pull request Apr 28, 2025

Remove avx512dq and avx512vl implication for avx512fp16 #140002

Closed

This comment has been minimized.

Sign in to view

sayantn force-pushed the avx512fp16 branch from d79110c to 8eac4d2 Compare April 28, 2025 12:01

This was referenced Apr 28, 2025

Require fma and f16c for avx512f in std_detect rust-lang/stdarch#1781

Merged

Stabilize the avx512 target features #138940

Merged

Fix errors in decoupling avx512vl and avx512dq from avx512fp16 rust-lang/stdarch#1788

Merged

This comment has been minimized.

Sign in to view

sayantn force-pushed the avx512fp16 branch from 8eac4d2 to 602a3ef Compare April 28, 2025 13:22

This comment has been minimized.

Sign in to view

a4lg mentioned this pull request Apr 29, 2025

RISC-V: Remove footnote from the Zcb extension rust-lang/stdarch#1789

Closed

a4lg suggested changes Apr 29, 2025

View reviewed changes

.gitmodules Outdated Show resolved Hide resolved

a4lg mentioned this pull request Apr 29, 2025

rustdoc: Allow multiple references to a single footnote #140434

Open

sayantn force-pushed the avx512fp16 branch 2 times, most recently from 082ec44 to dd281cb Compare April 29, 2025 14:42

This comment has been minimized.

Sign in to view

a4lg approved these changes Apr 30, 2025

View reviewed changes

a4lg mentioned this pull request Apr 30, 2025

Revert "std_detect: RISC-V platform guide documentation" (#1779) rust-lang/stdarch#1792

Merged

Remove avx512dq and avx512vl implication for avx512fp16

1157b78

sayantn force-pushed the avx512fp16 branch from dd281cb to 4a2a09c Compare May 1, 2025 00:12

Update stdarch

7443d03

sayantn force-pushed the avx512fp16 branch from 4a2a09c to 7443d03 Compare May 1, 2025 14:32

bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels May 1, 2025

VlaDexa mentioned this pull request May 2, 2025

Rollup of 40 pull requests #140573

Closed

Zalathar mentioned this pull request May 2, 2025

Rollup of 12 pull requests #140581

Merged

bors merged commit 27d419a into rust-lang:master May 2, 2025
6 checks passed

rustbot added this to the 1.88.0 milestone May 2, 2025

sayantn deleted the avx512fp16 branch May 6, 2025 06:23

sayantn mentioned this pull request May 14, 2025

Stabilize sha512. sm3 and sm4 for x86 #140767

Open

a4lg mentioned this pull request May 14, 2025

Check cfg on features that stage0 compiler support rust-lang/stdarch#1798

Open

Remove avx512dq and avx512vl implication for avx512fp16 #140389

Remove avx512dq and avx512vl implication for avx512fp16 #140389

Uh oh!

Conversation

sayantn commented Apr 28, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

rustbot commented Apr 28, 2025

Uh oh!

This comment has been minimized.

This comment has been minimized.

sayantn commented Apr 28, 2025

Uh oh!

sayantn commented Apr 28, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

This comment has been minimized.

a4lg commented Apr 29, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

Uh oh!

a4lg commented Apr 29, 2025

Uh oh!

This comment has been minimized.

a4lg commented Apr 30, 2025

Uh oh!

sayantn commented Apr 30, 2025

Uh oh!

sayantn commented May 1, 2025

Uh oh!

a4lg commented May 1, 2025

Uh oh!

sayantn commented May 1, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

a4lg commented May 1, 2025

Uh oh!

Amanieu commented May 1, 2025

Uh oh!

bors commented May 1, 2025

Uh oh!

Uh oh!

bors commented May 2, 2025

Uh oh!

Uh oh!

Remove `avx512dq` and `avx512vl` implication for `avx512fp16` #140389

Remove `avx512dq` and `avx512vl` implication for `avx512fp16` #140389

sayantn commented Apr 28, 2025 •

edited

Loading

sayantn commented Apr 28, 2025 •

edited

Loading

a4lg commented Apr 29, 2025 •

edited

Loading

sayantn commented May 1, 2025 •

edited

Loading