Stabilize s390x inline assembly

[taiki-e]

This stabilizes inline assembly for s390x (SystemZ).

Corresponding reference PR: rust-lang/reference#1643

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From the requirements of stabilization mentioned in #93335

Each architecture needs to be reviewed before stabilization:

• It must have clobber_abi.

Done in #130630.

• It must be possible to clobber every register that is normally clobbered by a function call.

Done in the PR that added support for clobber_abi.

• Generally review that the exposed register classes make sense.

The followings can be used as input/output:

• reg (r[0-10], r[12-14]): General-purpose register

• reg_addr (r[1-10], r[12-14]): General-purpose register except r0 which is evaluated as zero in an address context

  This class is needed because r0, which may be allocated when using the reg class, cannot be used as a register in certain contexts. This is identical to the a constraint in LLVM and GCC. See Support reg_addr register class in s390x inline assembly #119431 for details.

• freg (f[0-15]): Floating-point register

The followings are clobber-only:

• vreg (v[0-31]): Vector register

  Technically vreg should be able to accept #[repr(simd)] types as input/output if the unstable vector target feature added is enabled, but core::arch has no s390x vector type and both #[repr(simd)] and core::simd are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (s390x vector facilities support #130869 tracks unstable stuff here)

• areg (a[2-15]): Access register

All of the above register classes except reg_addr are needed for clobber_abi.

The followings cannot be used as operands for inline asm (see also getReservedRegs and SystemZELFRegisters in LLVM):

• r11: frame pointer
• r15: stack pointer
• a0, a1: Reserved for system use
• c[0-15] (control register) Reserved by the kernel

Although not listed in the above requirements, preserves_flags is implemented in #111331.

---

cc @uweigand

r? @Amanieu

@rustbot label +O-SystemZ +A-inline-assembly

[Amanieu]

LGTM, but stabilization needs a T-lang FCP.

[taiki-e]

r? lang for FCP

[workingjubilee]

@taiki-e

The followings are clobber-only:

• vreg (v[0-31]): Vector register

Technically vreg should be able to accept #[repr(simd)] types as input/output if the unstable vector target feature added is enabled, but core::arch has no s390x vector type and both #[repr(simd)] and core::simd are unstable. Everything related is unstable, so the fact that this is currently a clobber-only should not be considered a stabilization blocker. (#130869 tracks unstable stuff here)

Just to confirm: this is mostly a fairly ordinary "packed SIMD" ISA extension, right? The registers at least are not some exotic ambiguously-sized vector like RISCV's V or AArch64's SVE, but instead have some known fixed size?

[tgross35]

Per #131781 (comment):

@rustbot labels +I-lang-nominated

[taiki-e]

@workingjubilee

Just to confirm: this is mostly a fairly ordinary "packed SIMD" ISA extension, right?

Yes. s390x vector facility is fixed-size (packed) SIMD ISA and each vector register is 128 bits long.

[joshtriplett]

@rfcbot merge

[rfcbot]

Team member @joshtriplett has proposed to merge this. The next step is review by the rest of the tagged team members:

• @joshtriplett
• @nikomatsakis
• @pnkfelix
• @scottmcm
• @tmandry
• @traviscross

No concerns currently listed.

Once a majority of reviewers approve (and at most 2 approvals are outstanding), this will enter its final comment period. If you spot a major issue that hasn't been raised at any point in this process, please speak up!

cc @rust-lang/lang-advisors: FCP proposed for lang, please feel free to register concerns.
See this document for info about what commands tagged team members can give me.

[traviscross]

@rfcbot reviewed

[nikomatsakis]

Glad to see the reference PR as well. I feel good about this. I agree with the general point that it would be good to have a group of people actively maintaining this architecture who can look this over and vet it, but that has more to do with the requirements to be Tier 2 than anything specific to this PR.

@rfcbot required

[tmandry]

@rfcbot reviewed

[rfcbot]

🔔 This is now entering its final comment period, as per the review above. 🔔

[RalfJung]

would be good to have a group of people actively maintaining this architecture who can look this over and vet it, but that has more to do with the requirements to be Tier 2 than anything specific to this PR.

Also see #113739.

[uweigand]

would be good to have a group of people actively maintaining this architecture who can look this over and vet it, but that has more to do with the requirements to be Tier 2 than anything specific to this PR.

Also see #113739.

Not sure what the formal process / requirement for a Tier 2 target maintainer would be - but in any case please feel free to ping me for any s390x related questions.

[bors]

☔ The latest upstream changes (presumably #132470) made this pull request unmergeable. Please resolve the merge conflicts.

[bors]

☔ The latest upstream changes (presumably #131341) made this pull request unmergeable. Please resolve the merge conflicts.

[bors]

☔ The latest upstream changes (presumably #132472) made this pull request unmergeable. Please resolve the merge conflicts.